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* Handle implicit_defs in the register coalescer. I am still trying to produceRafael Espindola2012-06-301-27/+40
| | | | | | a reduced testcase, but this fixes pr13209. llvm-svn: 159479
* revert r159440. As Duncan pointed out, the test for invoke is not needed at ↵Nuno Lopes2012-06-291-2/+1
| | | | | | this point llvm-svn: 159471
* ARM: Clean up optimizeCompare in peephole, no functional change.Manman Ren2012-06-291-80/+73
| | | | | | | | Use getUniqueVRegDef. Replace a loop with existing interfaces: modifiesRegister and readsRegister. Factor out code into inline functions and simplify the code. llvm-svn: 159470
* Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren2012-06-294-36/+51
| | | | | | instructions with two register operands. llvm-svn: 159465
* Clear kill flags in InstrEmitter::EmitSubregNode().Jakob Stoklund Olesen2012-06-292-2/+38
| | | | | | | When a local virtual register is made global, make sure to clear any existing kill flags. llvm-svn: 159461
* Check for extra kill flags on live-out virtual registers.Jakob Stoklund Olesen2012-06-291-0/+14
| | | | | | | This would previously get reported as the misleading "Virtual register def doesn't dominate all uses." llvm-svn: 159460
* CodeGenPrepare: Don't crash when TLI is not available.Benjamin Kramer2012-06-291-1/+2
| | | | | | This happens when codegenprepare is invoked via opt. llvm-svn: 159457
* Add getUniqueVRegDef to MachineRegisterInfo.Manman Ren2012-06-292-0/+16
| | | | | | This comes in handy during peephole optimization. llvm-svn: 159453
* Rework this to clarify where the removal of nodes from the queue isDuncan Sands2012-06-291-8/+9
| | | | | | really happening. No intended functionality change. llvm-svn: 159451
* RefreshCallGraph: ignore 'invoke intrinsic'. IntrinsicInst doesnt not ↵Nuno Lopes2012-06-291-1/+3
| | | | | | recognize invoke, and shouldnt at this point, since the rest of LLVM codebase doesnt expect invoke of intrinsics llvm-svn: 159441
* ignore 'invoke new' in isInstructionTriviallyDead, since most callers are ↵Nuno Lopes2012-06-291-1/+2
| | | | | | not ready to handle invokes. instcombine will take care of this. llvm-svn: 159440
* Cleanup in DwarfDebug - fix a typo and remove two unused functionsAlexey Samsonov2012-06-291-7/+1
| | | | llvm-svn: 159433
* Fix a reassociate crash on sozefx when compiling with dragonegg+gcc-4.7 due toDuncan Sands2012-06-292-5/+24
| | | | | | | the optimizers producing a multiply expression with more multiplications than the original (!). llvm-svn: 159426
* Move llvm/Support/IRBuilder.h -> llvm/IRBuilder.hChandler Carruth2012-06-2950-184/+187
| | | | | | | | | | | | | | | | | This was always part of the VMCore library out of necessity -- it deals entirely in the IR. The .cpp file in fact was already part of the VMCore library. This is just a mechanical move. I've tried to go through and re-apply the coding standard's preferred header sort, but at 40-ish files, I may have gotten some wrong. Please let me know if so. I'll be committing the corresponding updates to Clang and Polly, and Duncan has DragonEgg. Thanks to Bill and Eric for giving the green light for this bit of cleanup. llvm-svn: 159421
* Update the CMake files.Bill Wendling2012-06-292-1/+1
| | | | llvm-svn: 159417
* Sphinxify the Atomics documentation.Bill Wendling2012-06-292-569/+441
| | | | llvm-svn: 159416
* The DIBuilder class is just a wrapper around debug info creationBill Wendling2012-06-298-9/+9
| | | | | | | (a.k.a. MDNodes). The module doesn't belong in Analysis. Move it to the VMCore instead. llvm-svn: 159414
* Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-06-299-79/+62
| | | | | | This reverts commit r159406. I noticed a performance regression so I'll back out for now. llvm-svn: 159411
* In the initial exec mode we always do a load to find the address of a variable.Rafael Espindola2012-06-292-9/+10
| | | | | | | | | Before this patch in pic 32 bit code we would add the global base register and not load from that address. This is a really old bug, but before the introduction of the tls attributes we would never select initial exec for pic code. llvm-svn: 159409
* misched: avoid scheduling instructions that can't be dispatched.Andrew Trick2012-06-291-6/+29
| | | | llvm-svn: 159408
* misched: count micro-ops toward the issue limit.Andrew Trick2012-06-292-16/+25
| | | | llvm-svn: 159407
* Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick2012-06-299-63/+81
| | | | | | | | | | | | | | The TargetInstrInfo::getNumMicroOps API does not change, but soon it will be used by MachineScheduler. Now each subtarget can specify the number of micro-ops per itinerary class. For ARM, this is currently always dynamic (-1), because it is used for load/store multiple which depends on the number of register operands. Zero is now a valid number of micro-ops. This can be used for nop pseudo-instructions or instructions that the hardware can squash during dispatch. llvm-svn: 159406
* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-298-39/+231
| | | | | | | | | | | | | | | Corrected type for index of llvm.x86.avx2.gather.d.pd.256 from 256-bit to 128-bit. Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256 from 256-bit to 128-bit. Support the following intrinsics: llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256 llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256 llvm-svn: 159402
* Remove a completely unnecessary mkdir from the CMake build.Chandler Carruth2012-06-291-2/+0
| | | | | | Clang has been getting along fine without this for quite some time. llvm-svn: 159400
* Add a missing common variable to the lit.site.cfg generation. This wasChandler Carruth2012-06-291-0/+1
| | | | | | only used in the Clang tree, but it seems reasonable to support. llvm-svn: 159399
* If the step value is a constant zero, the loop isn't going to terminate. FixesNick Lewycky2012-06-282-1/+28
| | | | | | the assert reported in PR13228! llvm-svn: 159393
* make the verifier accept @llvm.donothing as the only intrinsic that can be ↵Nuno Lopes2012-06-284-26/+69
| | | | | | | | invoked While at it, merge 2 tests and FileCheckize them llvm-svn: 159388
* make simplifyCFG erase invokes to readonly/readnone functionsNuno Lopes2012-06-282-7/+47
| | | | llvm-svn: 159385
* make instcombine produce calls to llvm.donothing instead of a random intrinsicNuno Lopes2012-06-282-8/+5
| | | | llvm-svn: 159384
* add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes2012-06-283-1/+42
| | | | | | CodeGen to ignore calls to it llvm-svn: 159383
* 'Promote' vector [su]int_to_fp should widen elements.Jim Grosbach2012-06-281-3/+54
| | | | | | | | | | | Teach vector legalization how to honor Promote for int to float conversions. The code checking whether to promote the operation knew to look at the operand, but the actual promotion code didn't. This fixes that. The operand is promoted up via [zs]ext. rdar://11762659 llvm-svn: 159378
* Changed the formatting sequence of a curly brace to Jack Carter2012-06-281-2/+2
| | | | | | the comment per code review feedback. llvm-svn: 159376
* Regenerate.Eric Christopher2012-06-281-137/+2
| | | | llvm-svn: 159374
* Remove layering violation #include.Bill Wendling2012-06-281-1/+0
| | | | llvm-svn: 159372
* Fix hexagon gcc builtin names to use '_' instead of '.'.Benjamin Kramer2012-06-281-852/+852
| | | | | | | This way the generated GCC builtin to LLVM intrinsic converter actually works. llvm-svn: 159370
* Enable automatic GCC<->LLVM intrinsic translation for mips.Benjamin Kramer2012-06-281-1/+6
| | | | llvm-svn: 159367
* Define MIPS DSP Rev1 intrinsics. That allows frontend to emit a correct IR.Simon Atanasyan2012-06-282-0/+287
| | | | | | This patch was reviewed in the llvm-commits list by Jim Grosbach. llvm-svn: 159364
* MemoryBuiltins:Nuno Lopes2012-06-282-15/+41
| | | | | | | | - recognize C++ new(std::nothrow) friends - ignore ExtractElement and ExtractValue instructions in size/offset analysis (all easy cases are probably folded away before we get here) - also recognize realloc as noalias llvm-svn: 159356
* make LazyValueInfo analyze the default case of switch statements (we know ↵Nuno Lopes2012-06-282-16/+38
| | | | | | that in the default branch the value cannot be any of the switch cases) llvm-svn: 159353
* add ConstantRange::difference (to perform set difference/relative complement)Nuno Lopes2012-06-283-0/+27
| | | | llvm-svn: 159352
* Devirtualize DIScope and subclasses.Benjamin Kramer2012-06-282-39/+0
| | | | | | Nothing in here makes use of the virtuality. llvm-svn: 159349
* [asan] set a hard limit on the number of instructions instrumented pear each ↵Kostya Serebryany2012-06-281-0/+12
| | | | | | BB. This is (hopefully temporary) workaround for PR13225 llvm-svn: 159344
* Sphinxify the bitcode format document.Bill Wendling2012-06-283-1491/+1047
| | | | llvm-svn: 159340
* Fix Windows build after r159281: s/iterator/const_iteratorAlexey Samsonov2012-06-281-1/+1
| | | | llvm-svn: 159334
* Move the setup for variables that are expanded in the lit.site.cfg intoChandler Carruth2012-06-282-49/+55
| | | | | | | a dedicated helper function. This will enable re-using the same logic for Clang's lit setup, etc. llvm-svn: 159333
* Precompute SCEV pointer analysis prior to instruction fusion in BBVectorize.Hal Finkel2012-06-281-10/+51
| | | | | | | | | | | | | When both a load/store and its address computation are being vectorized, it can happen that the address-computation vectorization destroys SCEV's ability to analyize the relative pointer offsets. As a result (like with the aliasing analysis info), we need to precompute the necessary information prior to instruction fusing. This was found during stress testing (running through the test suite with a very low required chain length); unfortunately, I don't have a small test case. llvm-svn: 159332
* Remove a useless check in BBVectorize.Hal Finkel2012-06-281-5/+0
| | | | | | | A shuffle mask will always be a constant, but I did not realize that when I originally wrote the code. llvm-svn: 159331
* Allow BBVectorize to form non-2^n-length vectors.Hal Finkel2012-06-284-134/+571
| | | | | | | | | | | | | | | | | | | | The original algorithm only used recursive pair fusion of equal-length types. This is now extended to allow pairing of any types that share the same underlying scalar type. Because we would still generally prefer the 2^n-length types, those are formed first. Then a second set of iterations form the non-2^n-length types. Also, a call to SimplifyInstructionsInBlock has been added after each pairing iteration. This takes care of DCE (and a few other things) that make the following iterations execute somewhat faster. For the same reason, some of the simple shuffle-combination cases are now handled internally. There is some additional refactoring work to be done, but I've had many requests for this feature, so additional refactoring will come soon in future commits (as will additional test cases). llvm-svn: 159330
* Refactor operation equivalence checking in BBVectorize by extending ↵Hal Finkel2012-06-283-29/+29
| | | | | | | | | | | Instruction::isSameOperationAs. Maintaining this kind of checking in different places is dangerous, extending Instruction::isSameOperationAs consolidates this logic into one place. Here I've added an optional flags parameter and two flags that are important for vectorization: CompareIgnoringAlignment and CompareUsingScalarTypes. llvm-svn: 159329
* Only print out the tag if it's there.Bill Wendling2012-06-281-1/+2
| | | | llvm-svn: 159328
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