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* [ThinLTO] Refactor function body scan during importing into helper (NFC)Teresa Johnson2015-11-241-36/+27
| | | | llvm-svn: 254020
* Fix sphinx-build error when building documentation.Xinliang David Li2015-11-241-16/+10
| | | | | | | Consolidate the description of -binary/-text option description to avoid duplicate ID error by sphinux-build. llvm-svn: 254018
* [RuntimeDyld] Fix a class of arithmetic errors introduced in r253918Sanjoy Das2015-11-241-4/+4
| | | | | | | | | | | r253918 had refactored expressions like "A - B.Address + C" to "A - B.getAddressWithOffset(C)". This is incorrect, since the latter really computes "A - B.Address - C". None of the tests I can run locally on x86 broke due to this bug, but it is the current suspect for breakage on the AArch64 buildbots. llvm-svn: 254017
* [X86][FMA] Optimize FNEG(FMA) PatternsSimon Pilgrim2015-11-242-0/+97
| | | | | | | | | | X86 needs to use its own FMA opcodes, preventing the standard FNEG(FMA) pattern table recognition method used by other platforms. This patch adds support for lowering FNEG(FMA(X,Y,Z)) into a single suitably negated FMA instruction. Fix for PR24364 Differential Revision: http://reviews.llvm.org/D14906 llvm-svn: 254016
* LiveVariables should not clobber MachineOperand::IsDead, ::IsKill on ↵Matthias Braun2015-11-241-2/+6
| | | | | | | | | | reserved physical registers Patch by Nick Johnson <Nicholas.Paul.Johnson@deshawresearch.com> Differential Revision: http://reviews.llvm.org/D14875 llvm-svn: 254012
* [ThinLTO] Enable iterative importing in FunctionImport passTeresa Johnson2015-11-242-2/+46
| | | | | | | | | | | Analyze imported function bodies and add any new external calls to the worklist for importing. Currently no controls on the importing so this will end up importing everything possible in the call tree below the importing module. Basic profitability checks coming next. Update test to check for iteratively inlined functions. llvm-svn: 254011
* [X86] Fix several issues related to X86's psadbw instruction.Cong Hou2015-11-2411-78/+80
| | | | | | | | | | | | | | | | This patch fixes the following issues: 1. Fix the return type of X86psadbw: it should not be the same type of inputs. For vNi8 inputs the output should be vMi64, where M = N/8. 2. Fix the return type of int_x86_avx512_psad_bw_512 accordingly. 3. Fix the definiton of PSADBW, VPSADBW, and VPSADBWY accordingly. 4. Adjust the return type when building a DAG node of X86ISD::PSADBW type. 5. Update related tests. Differential revision: http://reviews.llvm.org/D14897 llvm-svn: 254010
* [ThinLTO] Handle previously imported and promoted locals in module linkerTeresa Johnson2015-11-242-2/+8
| | | | | | | | | | | The new function import pass exposed an issue when we import references to local values on multiple importing passes. They are renamed on each import pass, and we need to ensure that the already promoted and renamed references existing in the dest module are correctly identified and updated so that they aren't spuriously renamed again (due to a perceived conflict with the newly linked reference). llvm-svn: 254009
* [PGO] Introduce value profile data closure type.Xinliang David Li2015-11-241-0/+12
| | | | | | | | | | | | | | | | The closure is designed to abstact away two types of value profile data: - InstrProfRecord which is the primary data structure used to represent profile data in host tools (reader, writer, and profile-use) - value profile runtime data structure suitable to be used by C runtime library. Both sources of data need to serialize to disk/memory-buffer in common format: ValueProfData. The abstraction allows compiler-rt's raw profiler writer to share the same code with indexed profile writer. llvm-svn: 254008
* [Utils] Put includes in correct order. NFC.Weiming Zhao2015-11-248-10/+8
| | | | | | | | | | | | | | | | | | | Summary: Followed the guidelines in: http://llvm.org/docs/CodingStandards.html#include-style However, I noticed that uppercase named headers come before lowercase ones throughout the codebase. So kept them as is. Patch by Mandeep Singh Grang <mgrang@codeaurora.org> Reviewers: majnemer, davide, jmolloy, atrick Subscribers: sanjoy Differential Revision: http://reviews.llvm.org/D14939 llvm-svn: 254005
* [PGO] Small interface change to be profile rt ready Xinliang David Li2015-11-242-28/+31
| | | | | | | | Convert two C++ static member functions to be C APIs. This is one of the many steps to get ready to share VP writer code with profiler runtime. llvm-svn: 253999
* [InstCombine] fix propagation of fast-math-flagsSanjay Patel2015-11-242-16/+11
| | | | | | | Noticed while working on D4583: http://reviews.llvm.org/D4583 llvm-svn: 253997
* use convenience function for copying IR flags; NFCISanjay Patel2015-11-241-12/+2
| | | | llvm-svn: 253996
* Minor refactor to make VP writing more efficientXinliang David Li2015-11-242-7/+11
| | | | llvm-svn: 253994
* Make this test a bit more strict.Rafael Espindola2015-11-241-9/+18
| | | | | | It now tests with files in both orders. llvm-svn: 253993
* Add vector types for intrinsicsKrzysztof Parzyszek2015-11-243-8/+33
| | | | | Author: Ron Lieberman <ronl@codeaurora.org> llvm-svn: 253992
* [ThinLTO] Fix FunctionImport alias checking and testTeresa Johnson2015-11-243-13/+15
| | | | | | | Skip imports for weak_any aliases as well. Fix the test to check non-import of weak aliases and functions, and import of normal alias. llvm-svn: 253991
* Add names for the new vector types in CodeGenTarget.cppKrzysztof Parzyszek2015-11-241-0/+9
| | | | llvm-svn: 253989
* [x86] remove duplicate movq instruction defs (PR25554)Sanjay Patel2015-11-243-29/+13
| | | | | | | | | | | | | | | | | | | | | | | | | We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE: def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))], IIC_SSE_MOVDQ>; def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))], IIC_SSE_MOVDQ>, Sched<[WriteMove]>; As shown in the test case and PR25554: https://llvm.org/bugs/show_bug.cgi?id=25554 This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction. This patch deletes one pair of these defs. Sadly, this won't fix the original test case in the bug report. Something else is still broken. Differential Revision: http://reviews.llvm.org/D14941 llvm-svn: 253988
* [Hexagon] Add missing include of <cctype>Krzysztof Parzyszek2015-11-241-0/+1
| | | | | | | Lack thereof breaks Windows builds due to the use of std::isspace in HexagonInstrInfo.cpp. llvm-svn: 253987
* [Hexagon] Bring HexagonInstrInfo up to dateKrzysztof Parzyszek2015-11-249-1173/+3004
| | | | llvm-svn: 253986
* Add an already passing test.Rafael Espindola2015-11-242-0/+28
| | | | | | | | | This tests that a declaration can resolve to an alias. I broke this locally while prototyping a change and it looks like a nice test to have. llvm-svn: 253984
* Add new vector types for 512-, 1024- and 2048-bit vectorsKrzysztof Parzyszek2015-11-245-142/+242
| | | | | | | | Those types are needed to implement instructions for Hexagon Vector Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16, 64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1. llvm-svn: 253978
* AMDGPU: Split LDS vector loadsMatt Arsenault2015-11-247-94/+73
| | | | | | If properly aligned this could allow using ds_read_b64. llvm-svn: 253975
* AMDGPU: Split x8 and x16 vector loads instead of scalarizeMatt Arsenault2015-11-2410-290/+171
| | | | | | | | The one regression in the builtin tests is in the read2 test which now (again) has many extra copies, but this should be solved once the pass is replaced with a DAG combine. llvm-svn: 253974
* Fix build after r253954Ismail Donmez2015-11-241-1/+1
| | | | llvm-svn: 253969
* Fix non-PIC build after 253959Pavel Labath2015-11-241-1/+1
| | | | | | | | CMAKE_EXE_LINKER_FLAGS is a string. Appending a flag using list(APPEND) introduces an extra semicolon which breaks stuff. Change this to append the value in the same way that everyone else seems to be doing. llvm-svn: 253968
* Let SelectionDAG start to use probability-based interface to add successors.Cong Hou2015-11-2423-277/+335
| | | | | | | | | | | | | | | | | | | | | | | | The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes. 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights. 3. Use new interfaces in all other passes. 4. Remove old interfaces. This the second patch above. In this patch SelectionDAG starts to use probability-based interfaces in MBB to add successors but other MC passes are still using weight-based interfaces. Therefore, we need to maintain correct weight list in MBB even when probability-based interfaces are used. This is done by updating weight list in probability-based interfaces by treating the numerator of probabilities as weights. This change affects many test cases that check successor weight values. I will update those test cases once this patch looks good to you. Differential revision: http://reviews.llvm.org/D14361 llvm-svn: 253965
* [TableGen] Use std::remove_if instead of manually coded loops that call ↵Craig Topper2015-11-241-74/+74
| | | | | | erase multiple times. NFC llvm-svn: 253964
* [TableGen] Use the other version of EnforceVectorEltTypeIs inside the ↵Craig Topper2015-11-241-15/+1
| | | | | | TypeSet version of EnforceVectorEltTypeIs to reduce duplicated code. NFC llvm-svn: 253963
* [TableGen] Fix formatting and use logical OR. NFCCraig Topper2015-11-241-2/+1
| | | | llvm-svn: 253962
* [TableGen] Use std::set_intersection to merge TypeSets. NFCCraig Topper2015-11-241-9/+8
| | | | llvm-svn: 253961
* [TableGen] Use SmallVector::assign instead of a resize and replace element.Craig Topper2015-11-241-2/+1
| | | | llvm-svn: 253960
* [CMake] When disabling PIC, also pass -fno-pie when linking if it is supported.Chris Bieneman2015-11-241-0/+4
| | | | | | Building clang with -fno-pie generates slightly faster code. In my not-very-rigorous testing I saw about a 4% speed up using the clang test-suite sources. llvm-svn: 253959
* Revert change that accidentally snuck into r253955.Craig Topper2015-11-241-2/+1
| | | | llvm-svn: 253956
* [TableGen] Use array_pod_sort. NFCCraig Topper2015-11-241-2/+3
| | | | llvm-svn: 253955
* Add a FunctionImporter helper to perform summary-based cross-module function ↵Mehdi Amini2015-11-248-1/+429
| | | | | | | | | | | | | | | | | importing Summary: This is a helper to perform cross-module import for ThinLTO. Right now it is importing naively every possible called functions. Reviewers: tejohnson Subscribers: dexonsmith, llvm-commits Differential Revision: http://reviews.llvm.org/D14914 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 253954
* Add findFunctionInfoList() accessor to FunctionInfoIndex.Mehdi Amini2015-11-241-0/+5
| | | | | | | | | | | | | | | Summary: This allows to query for a function in the map without creating an entry, allowing to use a const FunctionInfoIndex. Reviewers: tejohnson Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14912 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 253953
* [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.Cong Hou2015-11-244-4/+803
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch detects the AVG pattern in vectorized code, which is simply c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to i32 before any arithmetic operations. The following IR shows such an example: %1 = zext <N x i8> %a to <N x i32> %2 = zext <N x i8> %b to <N x i32> %3 = add nuw nsw <N x i32> %1, <i32 1 x N> %4 = add nuw nsw <N x i32> %3, %2 %5 = lshr <N x i32> %N, <i32 1 x N> %6 = trunc <N x i32> %5 to <N x i8> and with this patch it will be converted to a X86ISD::AVG instruction. The pattern recognition is done when combining instructions just before type legalization during instruction selection. We do it here because after type legalization, it is much more difficult to do pattern recognition based on many instructions that are doing type conversions. Therefore, for target-specific instructions (like X86ISD::AVG), we need to take care of type legalization by ourselves. However, as X86ISD::AVG behaves similarly to ISD::ADD, I am wondering if there is a way to legalize operands and result types of X86ISD::AVG together with ISD::ADD. It seems that the current design doesn't support this idea. Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of variant vector sizes. Differential revision: http://reviews.llvm.org/D14761 llvm-svn: 253952
* [DIE] Make DIE.h NDEBUG conditional-free.Davide Italiano2015-11-242-52/+18
| | | | | | Switch dump()/print() method definitions to LLVM_DUMP_METHOD instead. llvm-svn: 253945
* [CMake] export_executable_symbols also needs to add -rdynamic to the linker ↵Chris Bieneman2015-11-241-0/+4
| | | | | | | | flags on Darwin Without -rdynamic LLVM built with LTO fails to pass "check" due to loadable modules failing. llvm-svn: 253944
* Use make_unique [NFC]Xinliang David Li2015-11-241-1/+2
| | | | llvm-svn: 253942
* Remove trailing space in commentsXinliang David Li2015-11-241-5/+3
| | | | llvm-svn: 253941
* minimize test case but still show the bugSanjay Patel2015-11-241-31/+14
| | | | llvm-svn: 253940
* NFC. Fixing my consistently incorrect spelling.Chris Bieneman2015-11-231-4/+4
| | | | llvm-svn: 253936
* added comment (using freshly updated update_llc_test_checks.py)Sanjay Patel2015-11-231-0/+1
| | | | llvm-svn: 253935
* [x86] add test to show suboptimal codegen (PR25554)Sanjay Patel2015-11-231-0/+46
| | | | llvm-svn: 253934
* [RuntimeDyld] Avoid unused-private-field warning; NFCSanjoy Das2015-11-231-1/+5
| | | | | | Fixes the no asserts -Werror,-Wunused-private-field build. llvm-svn: 253933
* [WebAssembly] Don't print the types of memory_size and grow_memoryDan Gohman2015-11-231-4/+4
| | | | | | This matches the current spec, for now. llvm-svn: 253931
* [PGO] In llvm-profdata text dump, add comment lines as annotationsXinliang David Li2015-11-231-1/+4
| | | | llvm-svn: 253930
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