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* [mips] Implement MipsTargetMachine::getInstrItineraryData().Akira Hatanaka2013-07-1211-86/+98
| | | | llvm-svn: 186227
* Fix ARM paired GPR COPY loweringJF Bastien2013-07-122-0/+20
| | | | | | | | | | | | | ARM paired GPR COPY was being lowered to two MOVr without CC. This patch puts the CC back. My test is a reduction of the case where I encountered the issue, 64-bit atomics use paired GPRs. The issue only occurs with selectionDAG, FastISel doesn't encounter it so I didn't bother calling it. llvm-svn: 186226
* Fixed 80+ violation and added C++ to header.Michael Gottesman2013-07-121-1/+1
| | | | llvm-svn: 186225
* Fix a crash in EvaluateInDifferentElementOrder where it would generate anJoey Gouly2013-07-122-1/+18
| | | | | | | | undef vector of the wrong type. LGTM'd by Nick Lewycky on IRC. llvm-svn: 186224
* [mips] Add instruction itinerary classes for mult, seb and slt instructions.Akira Hatanaka2013-07-123-13/+16
| | | | llvm-svn: 186222
* Use the function attributes to pass along the stack protector buffer size.Bill Wendling2013-07-126-25/+20
| | | | | | | Now that we have robust function attributes, don't use a command line option to specify the stack protecto buffer size. llvm-svn: 186217
* Fix a off by one error about which members need to use the string table.Rafael Espindola2013-07-122-1/+23
| | | | llvm-svn: 186216
* LFTR improvement to avoid truncation.Andrew Trick2013-07-122-6/+76
| | | | | | This is a reimplemntation of the patch originally in r186107. llvm-svn: 186215
* Cleanup LFTR logic.Andrew Trick2013-07-121-28/+9
| | | | llvm-svn: 186214
* Cleanup: rename a variable to make the logic easier to follow.Andrew Trick2013-07-121-7/+7
| | | | llvm-svn: 186213
* Remove extraneous braces.Eric Christopher2013-07-121-6/+3
| | | | llvm-svn: 186212
* R600: Reapply testcase from r186178, the big endian issue should be fixed by ↵Benjamin Kramer2013-07-121-0/+12
| | | | | | r186196. llvm-svn: 186209
* Change archive-update.test to create a new file on the fly.Rafael Espindola2013-07-122-3/+6
| | | | llvm-svn: 186206
* Rename directory to avoid problems on windows.Rafael Espindola2013-07-122-2/+2
| | | | llvm-svn: 186202
* fix autoconf buildRafael Espindola2013-07-121-1/+1
| | | | llvm-svn: 186200
* Fix the build with c++03.Rafael Espindola2013-07-121-4/+2
| | | | llvm-svn: 186198
* Change llvm-ar to use lib/Object.Rafael Espindola2013-07-1210-1212/+376
| | | | | | | | | | | | | | | | | | | | | | This fixes two bugs is lib/Object that the use in llvm-ar found: * In OS X created archives, the name can be padded with nulls. Strip them. * In the constructor, remember the first non special member and use that in begin_children. This makes sure we skip all special members, not just the first one. The change to llvm-ar itself consist of * Using lib/Object for reading archives instead of ArchiveReader.cpp. * Writing the modified archive directly, instead of creating an in memory representation. The old Archive library was way more general than what is needed, as can be seen by the diffstat of this patch. Having llvm-ar using lib/Object now opens the way for creating regular symbol tables for both native objects and bitcode files so that we can use those archives for LTO. llvm-svn: 186197
* R600: Remove unsafe type punning. No intended functionality change.Benjamin Kramer2013-07-121-6/+4
| | | | llvm-svn: 186196
* Add a test for llvm-ar's u option.Rafael Espindola2013-07-122-0/+26
| | | | llvm-svn: 186192
* R600: Remove the fpconst64.ll test which was failing on non-x86 buildbotsTom Stellard2013-07-121-12/+0
| | | | | | | I'm guessing the failure had something to do with the double precision floating point constant used in the test. llvm-svn: 186191
* X86 cost model: Add cost for vectorized gather/scatherArnold Schwaighofer2013-07-122-0/+101
| | | | | | radar://14351991 llvm-svn: 186189
* ARM cost model: Add cost for gather/scatherArnold Schwaighofer2013-07-122-0/+97
| | | | | | | | | | Fixes a 35% degradation compared to unvectorized code in MiBench/automotive-susan and an equally serious regression on a private image processing benchmark. radar://14351991 llvm-svn: 186188
* TargetTransformInfo: address calculation parameter for gather/scatherArnold Schwaighofer2013-07-125-9/+69
| | | | | | | | | | | Address calculation for gather/scather in vectorized code can incur a significant cost making vectorization unbeneficial. Add infrastructure to add cost. Tests and cost model for targets will be in follow-up commits. radar://14351991 llvm-svn: 186187
* Relax the test a bit more to handle different UIDs and GIDs.Rafael Espindola2013-07-121-1/+1
| | | | llvm-svn: 186186
* Relax test a bit to handle umask differences.Rafael Espindola2013-07-121-1/+1
| | | | llvm-svn: 186184
* Add a test for the 'o' option in llvm-ar.Rafael Espindola2013-07-121-0/+10
| | | | llvm-svn: 186183
* R600/SI: Add support for f64 kernel argumentsTom Stellard2013-07-122-1/+10
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186182
* R600/SI: Implement select and compares for SITom Stellard2013-07-122-6/+97
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186181
* R600/SI: Add fsqrt pattern for SITom Stellard2013-07-122-2/+30
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186180
* R600/SI: Add double precision fsub pattern for SITom Stellard2013-07-123-3/+42
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186179
* R600/SI: SI support for 64bit ConstantFPTom Stellard2013-07-123-0/+31
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186178
* R600/SI: Add initial double precision support for SITom Stellard2013-07-127-1/+96
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186177
* R600: Add ISA documents to the CompilerWriterInfo pageTom Stellard2013-07-121-0/+11
| | | | llvm-svn: 186176
* Fixed comment in header of Block Frequency Impl and added text for C++ mode.Michael Gottesman2013-07-121-1/+1
| | | | | | | This is a generic block implementation that works on more than machine blocks. The C++ mode addition is a bonus due to the extra space provided. llvm-svn: 186175
* X86: Shrink certain forms of movsx.Benjamin Kramer2013-07-125-6/+62
| | | | | | | | | | | | In particular: movsbw %al, %ax --> cbtw movswl %ax, %eax --> cwtl movslq %eax, %rax --> cltq According to Intel's manual those have the same performance characteristics but come with a smaller encoding. llvm-svn: 186174
* Add static.Rafael Espindola2013-07-121-33/+25
| | | | llvm-svn: 186170
* X86: fold SSE2/AVX2 logical shift by immediate amount into zero vector when ↵Stephen Lin2013-07-123-0/+532
| | | | | | | | possible Patch by Andrea Di Biagio llvm-svn: 186165
* Start using CHECK-LABEL in some tests.Stephen Lin2013-07-1212-110/+111
| | | | llvm-svn: 186163
* Add new directive called CHECK-LABEL to FileCheck.Stephen Lin2013-07-123-29/+194
| | | | | | | | CHECK-LABEL is meant to be used in place on CHECK on lines containing identifiers or other unique labels (they need not actually be labels in the source or output language, though.) This is used to break up the input stream into separate blocks delineated by CHECK-LABEL lines, each of which is checked independently. This greatly improves the accuracy of errors and fix-it hints in many cases, and allows for FileCheck to recover from errors in one block by continuing to subsequent blocks. Some tests will be converted to use this new directive in forthcoming patches. llvm-svn: 186162
* Don't reject an empty archive.Rafael Espindola2013-07-123-4/+10
| | | | llvm-svn: 186159
* Mark MDNode::getOperand as readonly.Benjamin Kramer2013-07-121-1/+1
| | | | | | We can't inline it but we can still CSE calls to it. llvm-svn: 186156
* Revert "indvars: Improve LFTR by eliminating truncation when comparingChandler Carruth2013-07-122-48/+4
| | | | | | | | | | | | | | | | | | | against a constant." This reverts commit r186107. It didn't handle wrapping arithmetic in the loop correctly and thus caused the following C program to count from 0 to UINT64_MAX instead of from 0 to 255 as intended: #include <stdio.h> int main() { unsigned char first = 0, last = 255; do { printf("%d\n", first); } while (first++ != last); } Full test case and instructions to reproduce with just the -indvars pass sent to the original review thread rather than to r186107's commit. llvm-svn: 186152
* Add support for Mips break and syscall insructions. The corresponding test ↵Vladimir Medic2013-07-123-0/+59
| | | | | | cases are added. llvm-svn: 186151
* [SystemZ] Add test missing from r186148Richard Sandiford2013-07-121-0/+82
| | | | | | Sigh, twice in two days sorry. One day I'll remember... llvm-svn: 186150
* [SystemZ] Optimize sign-extends of vector setccsRichard Sandiford2013-07-122-0/+79
| | | | | | | | | | | | | Normal (sext (setcc ...)) sequences are optimised into (select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND. However, this is deliberately not done for vectors, and after vector type legalization we have (sext_inreg (setcc ...)) instead. I wondered about trying to extend DAGCombiner to handle this case too, but it seemed to be a loss on some other targets I tried, even those for which SETCC isn't "legal" and SELECT_CC is. llvm-svn: 186149
* [SystemZ] Fix parsing of inline asm registersRichard Sandiford2013-07-124-8/+49
| | | | | | | | | | | | GPR and FPR constraints like "{r2}" and "{f2}" weren't handled correctly because the name-to-regno mapping depends on the value type and (because of that) the internal names in RegStrings are not the same as the AsmName. CC constraints like "{cc}" didn't work either because there was no associated register class. llvm-svn: 186148
* [SystemZ] Improve spilling of LGDR and LDGRRichard Sandiford2013-07-122-1/+311
| | | | | | | If the source of these instructions is spilled we should load the destination. If the destination is spilled we should store the source. llvm-svn: 186147
* Stylistic change.Shuxin Yang2013-07-122-3/+3
| | | | | | Thank Nick for figuring out these problems. llvm-svn: 186146
* SLPVectorizer: Sink and enable CSE for ExtractElements.Nadav Rotem2013-07-124-15/+29
| | | | llvm-svn: 186145
* Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.Charles Davis2013-07-1212-33/+110
| | | | | | | | | | | | | | | Summary: This patch adds explicit calling convention types for the Win64 and System V/x86-64 ABIs. This allows code to override the default, and use the Win64 convention on a target that wants to use SysV (and vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU attributes. Reviewers: CC: llvm-svn: 186144
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