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* [LVI] Introduce an intersect operation on lattice valuesPhilip Reames2016-02-023-32/+160
| | | | | | | | | | | | LVI has several separate sources of facts - edge local conditions, recursive queries, assumes, and control independent value facts - which all apply to the same value at the same location. The existing implementation was very conservative about exploiting all of these facts at once. This change introduces an "intersect" function specifically to abstract the action of picking a good set of facts from all of the separate facts given. At the moment, this function is relatively simple (i.e. mostly just reuses the bits which were already there), but even the minor additions reveal the inherent power. For example, JumpThreading is now capable of doing an inductive proof that a particular value is always positive and removing a half range check. I'm currently only using the new intersect function in one place. If folks are happy with the direction of the work, I plan on making a series of small changes without review to replace mergeIn with intersect at all the appropriate places. Differential Revision: http://reviews.llvm.org/D14476 llvm-svn: 259461
* [libFuzzer] allow passing 1 or more files as individual inputsKostya Serebryany2016-02-025-5/+58
| | | | llvm-svn: 259459
* MachineVerifier: Use report_context() instead of ad-hoc messages.Matthias Braun2016-02-021-10/+32
| | | | llvm-svn: 259457
* [X86] Fix a bug in getMemOpBaseRegImmOfsSanjoy Das2016-02-022-2/+40
| | | | | | | | | Fix a crash in `getMemOpBaseRegImmOfs` that happens if the base of `MemOp` is a frame index memory operand. The fix is to have `getMemOpBaseRegImmOfs` bail out in such cases. We can possibly be more clever here, if needed. llvm-svn: 259456
* [libFuzzer] fail if the corpus dir does not existKostya Serebryany2016-02-022-1/+4
| | | | llvm-svn: 259454
* [X86][FastISel] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.Ahmed Bougacha2016-02-022-3/+5
| | | | | | FastISel counterpart to r259448. llvm-svn: 259449
* [X86] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.Ahmed Bougacha2016-02-023-6/+11
| | | | | | | | | | | | | | | | | | Officially, we don't acknowledge non-default configurations of MXCSR, as getting there would require usage of the FENV_ACCESS pragma (at least insofar as rounding mode is concerned). We don't support the pragma, so we can assume that the default rounding mode - round to nearest, ties to even - is always used. However, it's inconsistent with the rest of the instruction set, where MXCSR is always effective (unless otherwise specified). Also, it's an unnecessary obstacle to the few brave souls that use fenv.h with LLVM. Avoid the hard-coded rounding mode for fp_to_f16; use MXCSR instead. llvm-svn: 259448
* [safestack] Make sure the unsafe stack pointer is popped in all casesAnna Zaks2016-02-024-31/+34
| | | | | | | | | | The unsafe stack pointer is only popped in moveStaticAllocasToUnsafeStack so it won't happen if there are no static allocas. Fixes https://llvm.org/bugs/show_bug.cgi?id=26122 Differential Revision: http://reviews.llvm.org/D16339 llvm-svn: 259447
* [LVI] Fix a latent bug in getValueAtPhilip Reames2016-02-021-0/+8
| | | | | | | | This routine was returning Undefined for most queries. This was utterly wrong. Amusingly, we do not appear to have any callers of this which are actually trying to exploit unreachable code or this would have broken the world. A better approach would be to explicit describe the intersection of facts. That's blocked behind http://reviews.llvm.org/D14476 and I wanted to fix the current bug. llvm-svn: 259446
* fix typos; NFCSanjay Patel2016-02-011-2/+2
| | | | llvm-svn: 259438
* [LVI] Missing test case from 259432Philip Reames2016-02-011-0/+25
| | | | llvm-svn: 259437
* Add test for PR26419 (stable function summary ordering)Teresa Johnson2016-02-011-3/+10
| | | | | | | Enhance an existing test to also check that the ordering of the function summary entries is stable. llvm-svn: 259434
* [LVI] Remove overly tight assert from 259429Philip Reames2016-02-011-2/+2
| | | | | | I'll submit a test case shortly which covers this, but it's causing clang self host problems in the builders so I wanted to get it removed. llvm-svn: 259432
* [X86][AVX512] Add support for AVX512 VMOVD (load) shuffle decodingSimon Pilgrim2016-02-014-19/+10
| | | | llvm-svn: 259430
* [LVI] Add select handlingPhilip Reames2016-02-012-0/+118
| | | | | | | | Teach LVI to handle select instructions in the exact same way it handles PHI nodes. This is useful since various parts of the optimizer convert PHI nodes into selects and we don't want these transformations to cause inferior optimization. Note that this patch does nothing to exploit the implied constraint on the inputs represented by the select condition itself. That will be a later patch and is blocked on http://reviews.llvm.org/D14476 llvm-svn: 259429
* [X86][AVX512] Add support for AVX512 VMOVSD/VMOVSS shuffle decodingSimon Pilgrim2016-02-014-56/+26
| | | | llvm-svn: 259427
* function names start with a lowercase letter; NFCSanjay Patel2016-02-0114-324/+324
| | | | llvm-svn: 259425
* [InstCombine] simplify masked scatter/gather intrinsics with zero masksSanjay Patel2016-02-012-7/+42
| | | | | | | | | | | A masked scatter with a zero mask means there's no store. A masked gather with a zero mask means the passthru arg is returned. This is a continuation of: http://reviews.llvm.org/rL259369 http://reviews.llvm.org/rL259392 llvm-svn: 259421
* [X86][AVX512] Add support for AVX512 VINSERTPS shuffle decodingSimon Pilgrim2016-02-013-35/+13
| | | | llvm-svn: 259420
* SmallSet/SmallPtrSet: Refuse huge Small numbersMatthias Braun2016-02-013-2/+12
| | | | | | | | | | These sets do linear searching in small mode; It is not a good idea to use huge numbers as the small value here, save people from themselves by adding a static_assert. Differential Revision: http://reviews.llvm.org/D16706 llvm-svn: 259419
* [X86][SSE] Regenerated load vector + element extraction tests.Simon Pilgrim2016-02-011-22/+69
| | | | llvm-svn: 259416
* Move comments a bit closer to associated code. NFC.Chad Rosier2016-02-011-29/+25
| | | | llvm-svn: 259411
* [X86][SSE] Add AVX512 merge consecutive load testsSimon Pilgrim2016-02-013-57/+759
| | | | | | | | Add AVX512F/AVX512BW 512-bit tests. Add AVX512F tests to existing 128/256-bit tests. llvm-svn: 259410
* Regenerate vector blend tests.Simon Pilgrim2016-02-011-8/+9
| | | | llvm-svn: 259406
* Regenerate vector sext/zext constant folding tests.Simon Pilgrim2016-02-011-72/+81
| | | | llvm-svn: 259405
* Avoid inlining call sites in unreachable-terminated blockJun Bum Lim2016-02-013-9/+155
| | | | | | | | | | | | | Summary: If the normal destination of the invoke or the parent block of the call site is unreachable-terminated, there is little point in inlining the call site unless there is literally zero cost. Unlike my previous change (D15289), this change specifically handle the call sites followed by unreachable in the same basic block for call or in the normal destination for the invoke. This change could be a reasonable first step to conservatively inline call sites leading to an unreachable-terminated block while BFI / BPI is not yet available in inliner. Reviewers: manmanren, majnemer, hfinkel, davidxl, mcrosier, dblaikie, eraman Subscribers: dblaikie, davidxl, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16616 llvm-svn: 259403
* Remove extra semicolon. NFC.Chad Rosier2016-02-011-1/+1
| | | | llvm-svn: 259402
* [SCEV] Clean up isKnownPredicateViaConstantRanges; NFCISanjoy Das2016-02-011-63/+20
| | | | | | | | | | | | | | | - ScalarEvolution::isKnownPredicateViaConstantRanges duplicates some logic already present in ConstantRange, use ConstantRange for those bits. - In some cases ScalarEvolution::isKnownPredicateViaConstantRanges returns `false` to mean "definitely false" (e.g. see the `LHSRange.getSignedMin().sge(RHSRange.getSignedMax())` case for `ICmpInst::ICMP_SLT`), but for `isKnownPredicateViaConstantRanges`, `false` actually means "don't know". Get rid of this extra bit of code to avoid confusion. llvm-svn: 259401
* [SCEV] Rename isKnownPredicateWithRanges; NFCSanjoy Das2016-02-012-9/+10
| | | | | | | Make it obvious that it uses constant ranges, and use `Via` instead of `With`, like other similar functions in SCEV. llvm-svn: 259400
* Fix infinite recursion in MCAsmStreamer::EmitValueImpl.Rafael Espindola2016-02-011-7/+5
| | | | | | | | | | | If a target can only emit 8-bits data, we would loop in EmitValueImpl since it will try to split a 32-bits data in 1 chunk of 32-bits. No test since all current targets can emit 32bits at a time. Patch by Alexandru Guduleasa! llvm-svn: 259399
* [ThinLTO] Ensure function summary output order is stableTeresa Johnson2016-02-011-5/+11
| | | | | | | | | Iterate over the function list instead of a DenseMap of Function pointers when emitting the function summary into the module. This fixes PR26419. llvm-svn: 259398
* Add a test for r258362.Rafael Espindola2016-02-012-0/+25
| | | | | | Thanks to Mehdi for finding it. llvm-svn: 259394
* [InstCombine] simplify masked store intrinsics with all ones or zeros masksSanjay Patel2016-02-012-1/+39
| | | | | | | | | | A masked store with a zero mask means there's no store. A masked store with an allOnes mask means it's a normal vector store. This is a continuation of: http://reviews.llvm.org/rL259369 llvm-svn: 259392
* [llvm-nm] Simplify the code a bit. NFCI.Davide Italiano2016-02-011-6/+2
| | | | | | Fix a style violation while I'm here. llvm-svn: 259391
* AArch64: Implement missed conditional compare sequences.Balaram Makam2016-02-014-16/+116
| | | | | | | | | | | | | | | | | | Summary: This is an extension to the existing implementation of r242436 which restricts to only select inputs. This version fixes missed opportunities in pr26084 by attempting to lower conditional compare sequences of and/or trees with setcc leafs. This will additionaly handle the case when a tree with select input is not a conjunction-disjunction tree but some of the sub trees are conjunction-disjunction trees. Reviewers: jmolloy, t.p.northover, mcrosier, MatzeB Subscribers: mcrosier, llvm-commits, junbuml, haicheng, mssimpso, gberry Differential Revision: http://reviews.llvm.org/D16291 llvm-svn: 259387
* Add test case missing from r259357 (NFC)Matthew Simpson2016-02-011-0/+26
| | | | llvm-svn: 259385
* [AArch64] Simplify prolog/epilog callee save/restore. NFC.Geoff Berry2016-02-011-61/+87
| | | | | | | | | | | | | | | | | Summary: Factor out common code for callee-save register pair calculation. This is intended to simplify follow-on changes that reduce the number of registers saved/restored. Depends on D16732 Reviewers: mcrosier, jmolloy, t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16734 llvm-svn: 259384
* [SystemZ] Fix wrong-code generation for certain always-false conditionsUlrich Weigand2016-02-012-1/+27
| | | | | | | | | | | | | | | | | | | | | | We've found another bug in the code generation logic conditions for a certain class of always-false conditions, those of the form if ((a & 1) < 0) These only reach the back end when compiling without optimization. The bug was introduced by the choice of using TEST UNDER MASK to implement a check for if ((a & MASK) < VAL) as if ((a & MASK) == 0) where VAL is less than the the lowest bit of MASK. This is correct in all cases except for VAL == 0, in which case the original condition is always false, but the replacement isn't. Fixed by excluding that particular case. llvm-svn: 259381
* [NFC] Referencing manual for reason why subregbit is checkedColin LeMahieu2016-02-011-1/+2
| | | | llvm-svn: 259380
* fix broken check linesSanjay Patel2016-02-011-2/+2
| | | | | | Without the colon, it doesn't mean anything! llvm-svn: 259377
* [InstCombine] Don't transform (X+INT_MAX)>=(Y+INT_MAX) -> (X<=Y)David Majnemer2016-02-012-1/+13
| | | | | | | | | This miscompile came about because we tried to use a transform which was only appropriate for xor operators when addition was present. This fixes PR26407. llvm-svn: 259375
* [ValueTracking] Improve isKnownNonZero for PHI of non-zero constantsJun Bum Lim2016-02-012-0/+30
| | | | | | It is clear that a PHI is a non-zero if all incoming values are non-zero constants. llvm-svn: 259370
* [InstCombine] simplify masked load intrinsics with all ones or zeros masksSanjay Patel2016-02-012-21/+32
| | | | | | | | | A masked load with a zero mask means there's no load. A masked load with an allOnes mask means it's a normal vector load. Differential Revision: http://reviews.llvm.org/D16691 llvm-svn: 259369
* [PrologEpilogInserter] Add some debug output for callee-save frame object ↵Geoff Berry2016-02-011-0/+2
| | | | | | | | | | | | allocation Reviewers: mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16733 llvm-svn: 259367
* [AArch64] Simplify callee-save register save/restore. NFC.Geoff Berry2016-02-012-68/+23
| | | | | | | | | | | | | | | | | | | Summary: Simplify callee-save register save/restore code generation by remembering the size of the callee-save area when it is computed so we don't have to scan the prologue/epilogue instructions again later to reconstruct it. This is intended to simplify follow-on changes that reduce the number of registers saved/restored. Reviewers: mcrosier, jmolloy, t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16732 llvm-svn: 259365
* [LV] Rename RdxPHIsToFix to PHIsToFix (NFC)Matthew Simpson2016-02-011-39/+32
| | | | | | | | | | In the future, we will vectorize recurrences other than reductions. This patch renames a few variables and updates their associated comments to enable them to be reused for non-reduction PHI nodes. This change was requested in the review for D16197. llvm-svn: 259364
* [X86][AVX512VBMI] add encoding and intrinsics for MultishiftAsaf Badouh2016-02-019-66/+332
| | | | | | Differential Revision: http://reviews.llvm.org/D16399 llvm-svn: 259363
* [mips] Split large test file into 3 smaller ones.Vasileios Kalintiris2016-02-014-712/+772
| | | | | | | Remove the old select.ll file and use select-int.ll, select-flt.ll, select-dbl.ll for testing selects on integers, floats & doubles respectivelly. llvm-svn: 259361
* [mips] Range check uimm16 and fix several bugs this revealed.Daniel Sanders2016-02-0129-159/+266
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The bugs were: * teq and similar take 4-bit unsigned immediates on microMIPS. * teqi and similar have side-effects like teq do. * shll_s.w and shra_r.w take 5-bit unsigned immediates. * The various DSP ext* instructions take a 5-bit immediate. * repl.qh takes an 8-bit unsigned immediate. * repl.ph takes a 10-bit unsigned immediate. * rddsp/wrdsp take a 10-bit unsigned immediate. * teqi and similar take signed 16-bit immediates (10-bit for microMIPS). * Out-of-range immediate macros for or/xor take a simm32/simm64 depending on architecture. I'll fix the simm64 case properly when I reach simm32. lui is a bit more lenient than GAS and accepts signed immediates in addition to unsigned. This is because MipsMCExpr can produce signed values when constant folding and it currently lacks a way of knowing it should fold to an unsigned value. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15446 llvm-svn: 259360
* Improved macro emission in dwarf.Amjad Aboud2016-02-017-124/+42
| | | | | | | | Changed emitting offset of macinfo entry into compiler unit DIE to use "addSectionLabel" method rather than explicitly calculating size/offset of macro entry. Differential Revision: http://reviews.llvm.org/D16292 llvm-svn: 259358
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