summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* ARM NEON relax parse time diagnostics for alignment specifiers.Jim Grosbach2011-12-194-17/+19
| | | | | | | There's more variation that we need to handle. Error checking will need to be on operand predicates. llvm-svn: 146884
* Tidy up.Jim Grosbach2011-12-191-7/+7
| | | | llvm-svn: 146882
* Remove a register class that can just as well be synthesized.Jakob Stoklund Olesen2011-12-192-9/+4
| | | | | | | Add the new TableGen register class synthesizer feature to the release notes. llvm-svn: 146875
* Handle sub-register operands in recomputeRegClass().Jakob Stoklund Olesen2011-12-191-4/+6
| | | | | | | | | | | Now that getMatchingSuperRegClass() returns accurate results, it can be used to compute constraints imposed by instructions using a sub-register of a virtual register. This means we can recompute the register class of any virtual register by combining the constraints from all its uses. llvm-svn: 146874
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-198-231/+90
| | | | | | | | | Use information computed while inferring new register classes to emit accurate, table-driven implementations of getMatchingSuperRegClass(). Delete the old manual, error-prone implementations in the targets. llvm-svn: 146873
* Synthesize register classes for TRI::getMatchingSuperRegClass().Jakob Stoklund Olesen2011-12-192-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Teach TableGen to create the missing register classes needed for getMatchingSuperRegClass() to return maximal results. The function is still not auto-generated, so it still returns inexact results. This produces these new register classes: ARM: QQPR_with_dsub_0_in_DPR_8 QQQQPR_with_dsub_0_in_DPR_8 X86: GR64_with_sub_32bit_in_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP GR64_with_sub_16bit_in_GR16_NOREX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX GR64_with_sub_32bit_in_GR32_TC GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC GR64_with_sub_32bit_in_GR32_AD GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX The other targets in the tree are not weird enough to be affected. llvm-svn: 146872
* Allow for benchmarking more than 4GB of memoryManuel Klimek2011-12-191-3/+3
| | | | llvm-svn: 146864
* Adds a flag to allow specifying the memory limitations of the JSON benchmark.Manuel Klimek2011-12-191-7/+14
| | | | llvm-svn: 146863
* - Use getExitingBlock instead of getExitingBlocks.Jakub Staszak2011-12-181-13/+11
| | | | | | - Remove trailing spaces. llvm-svn: 146854
* Another variadics tweak.Benjamin Kramer2011-12-181-4/+3
| | | | llvm-svn: 146852
* Allow inlining of functions with returns_twice calls, if they have theJoerg Sonnenberger2011-12-186-22/+70
| | | | | | attribute themselve. llvm-svn: 146851
* Use the fancy new VariadicFunction template instead of a plain variadic ↵Benjamin Kramer2011-12-181-34/+33
| | | | | | | | function. Some compilers were complaining about passing StringRef to it. llvm-svn: 146850
* capitalize project name, reference bugzillaDylan Noblesmith2011-12-183-6/+6
| | | | | | | | | | | And fix the double-[]. It was including the [] as part of the project name somehow, resulting in PACKAGE_TARNAME "-llvm-" and a strange docdir default: ./configure --help | grep docdir --docdir=DIR documentation root [DATAROOTDIR/doc/-llvm-] llvm-svn: 146849
* Hexagon: Remove unused variables.Benjamin Kramer2011-12-182-13/+0
| | | | llvm-svn: 146846
* Revert 146728 as it's causing failures on some of the external bots as well as Chad Rosier2011-12-172-34/+0
| | | | | | | | | | | internal nightly testers. Original commit message: By popular demand, link up types by name if they are isomorphic and one is an autorenamed version of the other. This makes the IR easier to read, because we don't end up with random renamed versions of the types after LTO'ing a large app. llvm-svn: 146838
* Revert r146822 at Pete Cooper's request as it broke clang self hosting.Kevin Enderby2011-12-172-194/+0
| | | | | | Hope I did this correctly :) llvm-svn: 146834
* Remove an unused X86ISD node type.Craig Topper2011-12-173-3/+0
| | | | llvm-svn: 146833
* X86: Factor the bswap asm matching to be slightly less horrible to read.Benjamin Kramer2011-12-171-74/+63
| | | | llvm-svn: 146831
* As Doug pointed out (and I really should know), it is perfectly easy toChandler Carruth2011-12-172-20/+8
| | | | | | | | | make VariadicFunction actually be trivial. Do so, and also make it look more like your standard trivial functor by making it a struct with no access specifiers. The unit test is updated to initialize its functors properly. llvm-svn: 146827
* SimplifyCFG now predicts some conditional branches to true or false ↵Pete Cooper2011-12-172-0/+194
| | | | | | | | | | | | | depending on previous branch on same comparison operands. For example, if (a == b) { if (a > b) // this is false Fixes some of the issues on <rdar://problem/10554090> llvm-svn: 146822
* Deleting the json-bench-test until I understand why it is flaky.Manuel Klimek2011-12-171-5/+0
| | | | llvm-svn: 146821
* Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle.Evan Cheng2011-12-172-4/+35
| | | | llvm-svn: 146805
* Refactor code used in InstCombine::FoldAndOfICmps to new file.Pete Cooper2011-12-174-72/+175
| | | | | | This will be used by SimplifyCfg in a later commit. llvm-svn: 146803
* Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added theRafael Espindola2011-12-1712-4/+77
| | | | | | asm parsing and testcase. llvm-svn: 146801
* Make sure that the lower bits on the VSELECT condition are properly set.Lang Hames2011-12-172-27/+40
| | | | llvm-svn: 146800
* Preserve more memory operands in ARMExpandPseudo.Jakob Stoklund Olesen2011-12-171-0/+4
| | | | | | I don't think this affects anything but verbose assembly. llvm-svn: 146787
* The powers that be have decided that LLVM IR should now support 16-bitDan Gohman2011-12-1718-57/+124
| | | | | | | | "half precision" floating-point with a first-class type. This patch adds basic IR support (but not codegen support). llvm-svn: 146786
* When recursing for the original size of a type, stop if we are at aEric Christopher2011-12-162-1/+179
| | | | | | | | | pointer or a reference type - we actually just want the size of the pointer then for that. Fixes rdar://10335756 llvm-svn: 146785
* Resolve part of a fixme and add a new one.Eric Christopher2011-12-161-2/+5
| | | | llvm-svn: 146784
* Add a fixme here.Eric Christopher2011-12-161-0/+1
| | | | llvm-svn: 146783
* Fix spacing.Eric Christopher2011-12-161-3/+3
| | | | llvm-svn: 146782
* Update documentation.Eric Christopher2011-12-161-0/+1
| | | | llvm-svn: 146781
* Extraneous whitespace and 80-col.Eric Christopher2011-12-161-3/+2
| | | | llvm-svn: 146780
* Fix off-by-one error in bucket sort.Jakob Stoklund Olesen2011-12-162-1/+27
| | | | | | | | | The bad sorting caused a misaligned basic block when building 176.vpr in ARM mode. <rdar://problem/10594653> llvm-svn: 146767
* APInt: update asserts for base-36Dylan Noblesmith2011-12-162-4/+8
| | | | | | | | Hexatridecimal was added in r139695. And fix the unittest that now triggers the assert. llvm-svn: 146754
* Don't adjust for alignment padding in OffsetIsInRange.Jakob Stoklund Olesen2011-12-161-16/+1
| | | | | | | | | | | This adjustment is already included in the block offsets computed by BasicBlockInfo, and adjusting again here can cause the pass to loop. When CreateNewWater splits a basic block, OffsetIsInRange would reject the new CPE on the next pass because of the too conservative alignment adjustment. This caused the block to be split again, and so on. llvm-svn: 146751
* Hexagon: Fix a nasty order-of-initialization bug.Benjamin Kramer2011-12-1612-22/+12
| | | | | | Reenable the tests. llvm-svn: 146750
* In DICompositeType, referenced to derived type is either metadata or null.Devang Patel2011-12-161-5/+5
| | | | llvm-svn: 146744
* Clarify and fix subprogram description.Devang Patel2011-12-161-1/+1
| | | | llvm-svn: 146743
* Note ARM constant island alignment in the release notes.Jakob Stoklund Olesen2011-12-162-2/+3
| | | | | | | | The command line option should be removed, but not until the feature has gotten a lot of testing. The ARMConstantIslandPass tends to have subtle bugs that only show up after a while. llvm-svn: 146739
* Adds a JSON parser and a benchmark (json-bench) to catch performance ↵Manuel Klimek2011-12-1612-2/+996
| | | | | | regressions. llvm-svn: 146735
* Put the '*' in the right place in the unit test. Forgot to fix up thisChandler Carruth2011-12-161-7/+7
| | | | | | bit of style, sorry. llvm-svn: 146733
* Make GCC happy by using makeAraryRef instead of the implicit conversion.Chandler Carruth2011-12-161-4/+4
| | | | | | | I have no idea why GCC can't cope with the implicit conversion and Clang can, or whose bug it is. Grr. llvm-svn: 146732
* Add a generic collection of class templates to ADT for buildingChandler Carruth2011-12-163-0/+454
| | | | | | | | | | | | variadic-like functions in C++98. See the comments in the header file for a more detailed description of how these work. We plan to use these extensively in the AST matching library. This code and idea were originally authored by Zhanyong Wan. I've condensed it using macros to reduce repeatition and adjusted it to fit better with LLVM's ADT. Thanks to both David Blaikie and Doug Gregor for the review! llvm-svn: 146729
* By popular demand, link up types by name if they are isomorphic and one is anChris Lattner2011-12-162-0/+34
| | | | | | | autorenamed version of the other. This makes the IR easier to read, because we don't end up with random renamed versions of the types after LTO'ing a large app. llvm-svn: 146728
* Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is ↵Craig Topper2011-12-164-48/+123
| | | | | | supported. Fix 'unpackh v, v' for 256-bit types to understand 128-bit lanes. llvm-svn: 146726
* Tweak CMake build on Cygwin.NAKAMURA Takumi2011-12-162-2/+2
| | | | llvm-svn: 146725
* Target/Hexagon: Fix CMake build.NAKAMURA Takumi2011-12-161-1/+0
| | | | llvm-svn: 146724
* Avoid a confusing assert for silly options: -unroll-runtime -unroll-count=1.Andrew Trick2011-12-161-0/+5
| | | | | | No need for an explicit test case for an unsupported combination of options. llvm-svn: 146721
* [asan] add a test for instrumenting globalsKostya Serebryany2011-12-161-0/+20
| | | | llvm-svn: 146718
OpenPOWER on IntegriCloud