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* Temporarily disabled the MCJIT tests for Darwin, because the ↵Danil Malyshev2012-05-181-1/+1
| | | | | | RuntimeDyldMachO has a problems with relocations for 32bit x86. llvm-svn: 157035
* Clarify comment.Eric Christopher2012-05-181-1/+1
| | | | llvm-svn: 157033
* fix corner case in ConstantRange::intersectWith().Nuno Lopes2012-05-182-1/+6
| | | | | | this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass llvm-svn: 157032
* Fixed a bug in llvm-objdump when disassembling using -macho option for a binaryKevin Enderby2012-05-182-2/+34
| | | | | | containing no symbols. Fixed the crash and fixed it not disassembling anything. llvm-svn: 157031
* Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen2012-05-181-12/+1
| | | | | | | | | | This is the same as the other tests: Clever tricks are required to make the arguments and return value line up in a single-instruction function. It rarely happens in real life. We have plenty other examples of this behavior. llvm-svn: 157030
* Remove -join-physregs from the test suite.Jakob Stoklund Olesen2012-05-1717-232/+227
| | | | | | | | | | | | | | This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
* minor simplification in the call to ConstantRange constructorNuno Lopes2012-05-171-1/+1
| | | | llvm-svn: 157024
* commentsAndrew Trick2012-05-171-2/+3
| | | | llvm-svn: 157020
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-174-15/+82
| | | | | | | | | | the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in the code for better error checking when versions shouldn't be used. rdar://11457025 llvm-svn: 157019
* - Added ExecutionEngine/MCJIT testsDanil Malyshev2012-05-1754-3/+1295
| | | | | | | - Added HOST_ARCH to Makefile.config.in The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now. llvm-svn: 157015
* Remove extraneous ';'.Bill Wendling2012-05-171-1/+1
| | | | llvm-svn: 157011
* misched: trace ReadyQ.Andrew Trick2012-05-171-0/+8
| | | | llvm-svn: 157007
* misched: Added 3-level regpressure back-off.Andrew Trick2012-05-173-75/+288
| | | | | | | | | | | | | | | | | | Introduce the basic strategy for register pressure scheduling. 1) Respect target limits at all times. 2) Indentify critical register classes (pressure sets). Track pressure within the scheduled region. Avoid increasing scheduled pressure for critical registers. 3) Avoid exceeding the max pressure of the region prior to scheduling. Added logic for picking between the top and bottom ready Q's based on regpressure heuristics. Status: functional but needs to be asjusted to achieve good results. llvm-svn: 157006
* commentAndrew Trick2012-05-172-3/+1
| | | | llvm-svn: 157005
* regpressure: Fix getMaxUpwardPressureDelta.Andrew Trick2012-05-171-2/+6
| | | | llvm-svn: 157004
* misched: fix liveness iteratorsAndrew Trick2012-05-171-10/+16
| | | | llvm-svn: 157003
* whitespaceAndrew Trick2012-05-172-2/+3
| | | | llvm-svn: 157002
* Never clear <undef> flags on already joined copies.Jakob Stoklund Olesen2012-05-171-4/+6
| | | | | | | | | | | | | | | | | | | | | RegisterCoalescer set <undef> flags on all operands of copy instructions that are scheduled to be removed. This is so they won't affect shrinkToUses() by introducing false register reads. Make sure those <undef> flags are never cleared, or shrinkToUses() could cause live intervals to end at instructions about to be deleted. This would be a lot simpler if RegisterCoalescer could just erase joined copies immediately instead of keeping all the to-be-deleted instructions around. This fixes PR12862. Unfortunately, bugpoint can't create a sane test case for this. Like many other coalescer problems, this failure depends of a very fragile series of events. <rdar://problem/11474428> llvm-svn: 157001
* Fix a verifier bug.Jakob Stoklund Olesen2012-05-171-1/+1
| | | | | | Make sure useless (def-only) intervals also get verified. llvm-svn: 157000
* Relax the requirement that the exception object must be an instruction. DuringBill Wendling2012-05-171-6/+6
| | | | | | bugpoint-ing, it may turn into something else. llvm-svn: 156998
* [Hexagon] Clean up Hexagon ELF definition.Evandro Menezes2012-05-172-2/+3
| | | | llvm-svn: 156996
* enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits ↵Chris Lattner2012-05-173-181/+95
| | | | | | | | | into a separate side table, using the handy SequenceToOffsetTable class. This encodes all these weird things into another 256 bytes, allowing all intrinsics to be encoded this way. llvm-svn: 156995
* Remove incorrect pattern for ARM SMML instruction.Tim Northover2012-05-172-2/+14
| | | | | | Patch by Meador Inge. llvm-svn: 156989
* Fix compile error.Manuel Klimek2012-05-171-1/+1
| | | | llvm-svn: 156986
* SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed ↵Stepan Dyatkovskiy2012-05-172-10/+11
| | | | | | representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons. llvm-svn: 156985
* Genericize the intrinsics descriptor decoding a bit to make room Chris Lattner2012-05-171-20/+25
| | | | | | for future expansion, no functionality change yet though. llvm-svn: 156979
* finish encoding all of the interesting details of intrinsics. Now intrinsicsChris Lattner2012-05-172-48/+70
| | | | | | | are only rejected because they can't be encoded into a 32-bit unit, not because they contain an unencodable feature. llvm-svn: 156978
* strengthen the intrinsic descriptor stuff to be able to handle sin, cos and ↵Chris Lattner2012-05-172-64/+84
| | | | | | | | other intrinsics that use passed-in arguments. llvm-svn: 156977
* simplify code generated by tblgen that is not necessary since we droppedChris Lattner2012-05-171-20/+4
| | | | | | compatibility with LLVM 2.x bitcode files. llvm-svn: 156976
* I forgot the #ifdef _MSC_VER guard in my last commit.Francois Pichet2012-05-171-0/+5
| | | | llvm-svn: 156975
* Fix the MSVC 2010 build: disable the optimizer for a problematic function.Francois Pichet2012-05-171-0/+2
| | | | llvm-svn: 156973
* Use RegUnits to compute overlapping registers.Jakob Stoklund Olesen2012-05-163-83/+54
| | | | | | | | | | | TableGen already computes register units as the basic unit of interference. We can use that to compute the set of overlapping registers. This means that we can easily compute overlap sets for one register at a time. There is no benefit to computing all registers at once. llvm-svn: 156960
* This patch adds the register class for MIPS16 as well as the ability forAkira Hatanaka2012-05-165-11/+26
| | | | | | | | | | | | | | | llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the mips16 ASE for mips32 by default. As part of fixing of adding this we discovered some small changes that need to be made to MipsInstrInfo::storeRegToStackSLot and MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead, per suggestion of Jakob Stoklund Olesen. Patch by Reed Kotler. llvm-svn: 156958
* Grammar.Eric Christopher2012-05-161-2/+2
| | | | llvm-svn: 156955
* Set sub-register <undef> flags more accurately.Jakob Stoklund Olesen2012-05-161-7/+11
| | | | | | | | | | | | | | | When widening an existing <def,reads-undef> operand to a super-register, it may be necessary to clear the <undef> flag because the wider register is now read-modify-write through the instruction. Conversely, it may be necessary to add an <undef> flag when the coalescer turns a full-register def into a sub-register def, but the larger register wasn't live before the instruction. This happens in test/CodeGen/ARM/coalesce-subregs.ll, but the test is too small for the <undef> flags to affect the generated code. llvm-svn: 156951
* Disable JITTest.FunctionIsRecompiledAndRelinked and JITTest.NoStubsSimon Atanasyan2012-05-161-6/+8
| | | | | | on MIPS where they are not implemented. llvm-svn: 156935
* Added LLIMCJITMemoryManager to the lli. This manager will be used for MCJIT ↵Danil Malyshev2012-05-163-4/+229
| | | | | | | | instead of DefaultJIMMemoryManager. It's more flexible for MCJIT tasks, in addition it's provides a invalidation instruction cache for code sections which will be used before JIT code will be executed. llvm-svn: 156933
* Hexagon: Remove unused command line option.Benjamin Kramer2012-05-161-2/+0
| | | | llvm-svn: 156917
* I noticed that named metadata doesn't provide a direct way of getting at theDuncan Sands2012-05-161-0/+7
| | | | | | | named metadata list, unlike all the other global objects (global variables, functions, aliases), so add that for consistency. llvm-svn: 156915
* Teach the 'opt' tool about '-Os' and '-Oz', corresponding to the ClangChandler Carruth2012-05-162-12/+49
| | | | | | | | | | | | | options, to enable easier testing of the innards of LLVM that are enabled by such optimization strategies. Note that this doesn't provide the (much needed) function attribute support for -Oz (as opposed to -Os), but still seems like a positive step to better test the logic that Clang currently relies on. Patch by Patrik Hägglund. llvm-svn: 156913
* Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.Duncan Sands2012-05-162-2/+2
| | | | llvm-svn: 156909
* Significantly reduce the compiled size of Functions.cpp by turning a big ↵Chris Lattner2012-05-162-123/+351
| | | | | | | | | | blob of tblgen generated code (for Intrinsic::getType) into a table. This handles common cases right now, but I plan to extend it to handle all cases and merge in type verification logic as well in follow-on patches. llvm-svn: 156905
* have tblgen emit cast<> instead of dyn_cast<> when we know it must succeed.Chris Lattner2012-05-161-2/+2
| | | | llvm-svn: 156902
* Avoid creating a cycle when folding load / op with flag / store. PR11451474. ↵Evan Cheng2012-05-162-0/+60
| | | | | | rdar://11451474 llvm-svn: 156896
* Fixed grammar for the llvm.trap intrinsic description.John Criswell2012-05-161-2/+2
| | | | llvm-svn: 156881
* Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen2012-05-152-9/+68
| | | | | | | | | | | | | | | | It is now possible to coalesce weird skewed sub-register copies by picking a super-register class larger than both original registers. The included test case produces code like this: vld2.32 {d16, d17, d18, d19}, [r0]! vst2.32 {d18, d19, d20, d21}, [r0] We still perform interference checking as if it were a normal full copy join, so this is still quite conservative. In particular, the f1 and f2 functions in the included test case still have remaining copies because of false interference. llvm-svn: 156878
* Teach RegisterCoalescer to handle symmetric sub-register copies.Jakob Stoklund Olesen2012-05-151-14/+28
| | | | | | | | | | | | | It is possible to coalesce two overlapping registers to a common super-register that it larger than both of the original registers. The important difference is that it may be necessary to rewrite DstReg operands as well as SrcReg operands because the sub-register index has changed. This behavior is still disabled by CoalescerPair. llvm-svn: 156869
* Handle NewReg==OldReg in renameRegister().Jakob Stoklund Olesen2012-05-151-1/+2
| | | | | | | This can happen when widening a virtual register to a super-register class. llvm-svn: 156867
* We never call adjustCopiesBackFrom() for partial copies.Jakob Stoklund Olesen2012-05-151-1/+3
| | | | | | There is no need to look at an always null SrcIdx. llvm-svn: 156866
* llvm-config: Use sys::fs::equivalent instead of string comparison.Daniel Dunbar2012-05-151-5/+6
| | | | | | - Hopefully fixes PR11600 (untested). llvm-svn: 156865
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