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* Fix combine of uno && ord -> false so that the ordering of the fcmps doesn'tChad Rosier2012-06-062-1/+13
| | | | | | | matter. rdar://11579835 llvm-svn: 158084
* Remove dead debug option -disable-rematerialization.Jakob Stoklund Olesen2012-06-061-4/+0
| | | | | | | Remat has been stable for years, and it isn't done by LiveIntervalAnalysis any longer. (See LiveRangeEdit). llvm-svn: 158079
* Grab-bag of reassociate tweaks. Unify handling of dead instructions andDuncan Sands2012-06-062-127/+117
| | | | | | | | | instructions to reoptimize. Exploit this to more systematically eliminate dead instructions (this isn't very useful in practice but is convenient for analysing some testcase I am working on). No need for WeakVH any more: use an AssertingVH instead. llvm-svn: 158073
* Stop leaking RegScavengers from TailDuplication.Benjamin Kramer2012-06-061-3/+4
| | | | llvm-svn: 158069
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-062-3/+12
| | | | llvm-svn: 158055
* Add a new broken compiler.Duncan Sands2012-06-061-0/+1
| | | | llvm-svn: 158053
* Mark several instructions SSE2 instead of SSE3 as they should be.Craig Topper2012-06-062-9/+11
| | | | llvm-svn: 158049
* Fix gtest build issue on Visual Studio 2012 RCJustin Holewinski2012-06-062-0/+12
| | | | llvm-svn: 158046
* Remove extraneous CHECK-NOTs from previous commit and add a new test case.Chad Rosier2012-06-061-2/+10
| | | | llvm-svn: 158045
* FileCheckize this test.Chad Rosier2012-06-061-2/+18
| | | | llvm-svn: 158044
* Move LiveUnionArray into LiveIntervalUnion.hJakob Stoklund Olesen2012-06-054-47/+54
| | | | | | It is useful outside RegAllocBase. llvm-svn: 158041
* Don't print register names in LiveIntervalUnion::print().Jakob Stoklund Olesen2012-06-053-5/+2
| | | | | | | | Soon we'll be making LiveIntervalUnions for register units as well. This was the only place using the RepReg member, so just remove it. llvm-svn: 158038
* Suppress -Wunused-variable in -Asserts buildMatt Beaumont-Gay2012-06-051-0/+1
| | | | llvm-svn: 158037
* Simplify LiveInterval::print().Jakob Stoklund Olesen2012-06-055-49/+20
| | | | | | | | | | Don't print out the register number and spill weight, making the TRI argument unnecessary. This allows callers to interpret the reg field. It can currently be a virtual register, a physical register, a spill slot, or a register unit. llvm-svn: 158031
* Add experimental support for register unit liveness.Jakob Stoklund Olesen2012-06-052-3/+171
| | | | | | | | | | | | | | | | Instead of computing a live interval per physreg, LiveIntervals can compute live intervals per register unit. This makes impossible the confusing situation where aliasing registers could have overlapping live intervals. It should also make fixed interferernce checking cheaper since registers have fewer register units than aliases. Live intervals for regunits are computed on demand, using MRI use-def chains and the new LiveRangeCalc class. Only regunits live in to ABI blocks are precomputed during LiveIntervals::runOnMachineFunction(). The regunit liveness computations don't depend on LiveVariables. llvm-svn: 158029
* Implement LiveRangeCalc::extendToUses() and createDeadDefs().Jakob Stoklund Olesen2012-06-054-2/+108
| | | | | | | These LiveRangeCalc methods are to be used when computing a live range from scratch. llvm-svn: 158027
* MachineInstr::eraseFromParent fix for removing bundled instrs.Andrew Trick2012-06-051-1/+2
| | | | | | Patch by Ivan Llopard. llvm-svn: 158025
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-0511-140/+277
| | | | | | | Minimum latency determines per-cycle scheduling groups. Expected latency determines critical path and cost. llvm-svn: 158021
* Add 3.0 and 3.1 tags to the getting started guide.Benjamin Kramer2012-06-051-0/+2
| | | | llvm-svn: 158020
* Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-addLang Hames2012-06-054-0/+84
| | | | | | | | | | | | expression (a * b + c) that can be implemented as a fused multiply-add (fma) if the target determines that this will be more efficient. This intrinsic will be used to implement FP_CONTRACT support and an aggressive FMA formation mode. If your target has a fast FMA instruction you should override the isFMAFasterThanMulAndAdd method in TargetLowering to return true. llvm-svn: 158014
* Fix header file include order in NVPTX backend NV_CONTRIBYuan Lin2012-06-051-2/+2
| | | | llvm-svn: 158013
* LoopUnroll: always check for NULL LoopPassManagerAndrew Trick2012-06-051-3/+5
| | | | llvm-svn: 158007
* Remove dead function.Jakob Stoklund Olesen2012-06-051-6/+0
| | | | llvm-svn: 158005
* PPC32 uses R2 as the TLS register. Fix the copy and paste.Roman Divacky2012-06-051-3/+3
| | | | llvm-svn: 158004
* IntegersSubsetMapping: added exclude operation, that allows to exclude ↵Stepan Dyatkovskiy2012-06-052-0/+233
| | | | | | subset of integers from current mapping. llvm-svn: 157989
* IntegersSubsetMapping:Stepan Dyatkovskiy2012-06-053-12/+16
| | | | | | | Changed type of Items collection: from std::vector to std::list. Also some small fixes made in IntegersSubset.h, IntegersSubsetMapping.h and IntegersSubsetTest.cpp. llvm-svn: 157987
* X86 itinerary properties.Andrew Trick2012-06-052-2/+29
| | | | llvm-svn: 157981
* ARM itinerary properties.Andrew Trick2012-06-053-22/+10
| | | | llvm-svn: 157980
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-0512-31/+141
| | | | | | | | This allows a subtarget to explicitly specify the issue width and other properties without providing pipeline stage details for every instruction. llvm-svn: 157979
* sdsched: Use the right heuristics when -mcpu is not provided and we have no ↵Andrew Trick2012-06-051-13/+12
| | | | | | | | itinerary. Use ILP heuristics for long latency instrs if no scoreboard exists. llvm-svn: 157978
* misched: Allow disabling scoreboard hazard checking for subtargets with aAndrew Trick2012-06-052-6/+14
| | | | | | | | valid itinerary but no pipeline stages. An itinerary can contain useful scheduling information without specifying pipeline stages for each instruction. llvm-svn: 157977
* whitespaceAndrew Trick2012-06-053-9/+7
| | | | llvm-svn: 157976
* misched: comments from code review.Andrew Trick2012-06-051-3/+3
| | | | llvm-svn: 157975
* Remove the last remat-related code from LiveIntervalAnalysis.Jakob Stoklund Olesen2012-06-052-115/+0
| | | | | | Rematerialization is handled by LiveRangeEdit now. llvm-svn: 157974
* Stop using LiveIntervals::isReMaterializable().Jakob Stoklund Olesen2012-06-052-9/+28
| | | | | | | | | | It is an old function that does a lot more than required by CalcSpillWeights, which was the only remaining caller. The isRematerializable() function never actually sets the isLoad argument, so don't try to compute that. llvm-svn: 157973
* Revert commit r157966Joel Jones2012-06-052-43/+0
| | | | llvm-svn: 157972
* This change handles a another case for generating the bic instruction Joel Jones2012-06-042-0/+43
| | | | | | | | | when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. <rdar://problem/11481151> llvm-svn: 157966
* Delete dead code.Jakob Stoklund Olesen2012-06-042-12/+0
| | | | llvm-svn: 157963
* When gvn decides to replace an instruction with another, we have to patch theRafael Espindola2012-06-045-2/+506
| | | | | | | | | | | | replacement to make it at least as generic as the instruction being replaced. This includes: * dropping nsw/nuw flags * getting the least restrictive tbaa and fpmath metadata * merging ranges Fixes PR12979. llvm-svn: 157958
* Switch LiveIntervals member variable to LLVM naming standards.Jakob Stoklund Olesen2012-06-042-98/+98
| | | | | | No functional change. llvm-svn: 157957
* Pass context pointers to LiveRangeCalc::reset().Jakob Stoklund Olesen2012-06-043-55/+45
| | | | | | | Remove the same pointers from all the other LiveRangeCalc functions, simplifying the interface. llvm-svn: 157941
* Add a test case for mips64 unaligned load/store instructions.Akira Hatanaka2012-06-041-0/+73
| | | | llvm-svn: 157939
* Rename test/CodeGen/Mips/load-shift-left-right.ll.Akira Hatanaka2012-06-041-0/+0
| | | | llvm-svn: 157938
* Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node isAkira Hatanaka2012-06-041-1/+2
| | | | | | inserted after the shift-left-logical node. llvm-svn: 157937
* Implement local-exec TLS on PowerPC.Roman Divacky2012-06-049-11/+89
| | | | llvm-svn: 157935
* MIPS TLS: use the model selected by TargetMachine::getTLSModel().Hans Wennborg2012-06-041-3/+4
| | | | | | This was mostly done already in r156162, but I missed one place. llvm-svn: 157929
* Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem2012-06-0417-44/+25
| | | | llvm-svn: 157925
* Better comments for TLS-related X86 MachineOperand flags.Hans Wennborg2012-06-041-9/+18
| | | | llvm-svn: 157920
* Add intrinsic forms for FMA instructions to opcode folding tables.Craig Topper2012-06-042-109/+141
| | | | llvm-svn: 157917
* getAllOnesValue also works for vectors of integers.Duncan Sands2012-06-041-2/+2
| | | | llvm-svn: 157915
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