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* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-24355-67373/+73
| | | | | | | | | | | | | | | | I'm doing this in two phases for a better "git blame" record. This commit removes the previous AArch64 backend and redirects all functionality to ARM64. It also deduplicates test-lines and removes orphaned AArch64 tests. The next step will be "git mv ARM64 AArch64" and rewire most of the tests. Hopefully LLVM is still functional, though it would be even better if no-one ever had to care because the rename happens straight afterwards. llvm-svn: 209576
* llvm/test/Object/ar-error.test: Don't check the message "No such file or ↵NAKAMURA Takumi2014-05-241-1/+2
| | | | | | | | directory". It didn't match on non-English version of Windows. llvm-svn: 209570
* Implement sext(C1 + C2*X) --> sext(C1) + sext(C2*X) andMichael Zolotukhin2014-05-242-0/+210
| | | | | | | | | | | sext{C1,+,C2} --> sext(C1) + sext{0,+,C2} transformation in Scalar Evolution. That helps SLP-vectorizer to recognize consecutive loads/stores. <rdar://problem/14860614> llvm-svn: 209568
* ARM64: extract a 32-bit subreg when selecting an inreg extendTim Northover2014-05-242-12/+154
| | | | | | | | After the load/store refactoring, we were sometimes trying to feed a GPR64 into a 32-bit register offset operand. This failed in copyPhysReg. llvm-svn: 209566
* DebugInfo: Generalize some tests to handle variations in attribute ordering.David Blaikie2014-05-2312-58/+73
| | | | | | | | | | | | | | | | In an effort to fix inlined debug info in situations where the out of line definition of a function preceeds any inlined usage, the order in which some attributes are added to subprogram DIEs may change. (in essence, definition-necessary attributes like DW_AT_low_pc/high_pc will be added immediately, but the names, types, and other features will be delayed to module end where they may either be added to the subprogram DIE or instead reference an abstract definition for those values) These tests can be generalized to be resilient to this change. 5 or so tests actually have to be incompatibly changed to cope with this reordering and will go along with the change that affects the order. llvm-svn: 209554
* DebugInfo: Generalize a test case to not depend on abbreviation numbering.David Blaikie2014-05-231-8/+8
| | | | | | | It's an unnecessary detail for this test and just gets in the way when making unrelated changes to the output in this test. llvm-svn: 209553
* Test case comments. Fix sloppiness.Andrew Trick2014-05-231-2/+2
| | | | llvm-svn: 209551
* clang-format function.Rafael Espindola2014-05-231-8/+6
| | | | llvm-svn: 209550
* Remove a confusing use of a static method.Rafael Espindola2014-05-231-1/+1
| | | | | | No functionality change. llvm-svn: 209548
* DebugInfo: Put concrete definitions referencing abstract definitions in the ↵David Blaikie2014-05-232-1/+95
| | | | | | | | | | | | | | | | | | | same scope as the abstract definition. This seems like a simple cleanup/improved consistency, but also helps lay the foundation to fix the bug mentioned in the test case: concrete definitions preceeding any inlined usage aren't properly split into concrete + abstract (because they're not known to need it until it's too late). Once we start deferring this choice until later, we won't have the choice to put concrete definitions for inlined subroutines in a different scope from concrete definitions for non-inlined subroutines (since we won't know at time-of-construction which one it'll be). This change brings those two cases into alignment ahead of that future chaneg/fix. llvm-svn: 209547
* Fix and improve SCEV ComputeBackedgeTankCount.Andrew Trick2014-05-232-19/+102
| | | | | | | | | | | | | This is a follow-up to r209358: PR19799: Indvars miscompile due to an incorrect max backedge taken count from SCEV. That fix was incomplete as pointed out by Arnold and Michael Z. The code was also too confusing. It needed a careful rewrite with more unit tests. This version will also happen to optimize more cases. <rdar://17005101> PR19799: Indvars miscompile... llvm-svn: 209545
* Revert part of "Fix broken FileCheck prefixes"Nico Rieck2014-05-232-11/+11
| | | | | | This reverts part of commit r209538. llvm-svn: 209544
* Use alias linkage and visibility to decide tls access mode.Rafael Espindola2014-05-233-16/+13
| | | | | | | | | | | | | | | | | This matches both what we do for the non-thread case and what gcc does. With this patch clang would match gcc's behaviour in static __thread int a = 42; extern __thread int b __attribute__((alias("a"))); int *f(void) { return &a; } int *g(void) { return &b; } if not for pr19843. Manually writing the IL does produce the same access modes. It is also a step in the direction of fixing pr19844. llvm-svn: 209543
* Remove unused CHECK linesNico Rieck2014-05-231-4/+0
| | | | llvm-svn: 209539
* Fix broken FileCheck prefixesNico Rieck2014-05-235-14/+14
| | | | llvm-svn: 209538
* Add the extracted constant offset using GEPJingyue Wu2014-05-233-39/+80
| | | | | | | | | | | | | Fixed a TODO in r207783. Add the extracted constant offset using GEP instead of ugly ptrtoint+add+inttoptr. Using GEP simplifies future optimizations and makes IR easier to understand. Updated all affected tests, and added a new test in split-gep.ll to cover a corner case where emitting uglygep is necessary. llvm-svn: 209537
* [RuntimeDyld] Remove relocation bounds check introduced in r208375 (MachO only).Lang Hames2014-05-231-4/+1
| | | | | | | | | | | | | | | | | | | We do all of our address arithmetic in 64-bit, and operations involving logically negative 32-bit offsets (actually represented as unsigned 64 bit ints) often overflow into higher bits. The overflow check could be preserved by casting to uint32 at the callsite for applyRelocationValue, but this would eliminate the value of the check. The right way to handle overflow in relocations is to make relocation processing target specific, and compute the values for RelocationEntry objects in the appropriate types (32-bit for 32-bit targets, 64-bit for 64-bit targets). This is coming as part of the cleanup I'm working on. This fixes another i386 regression test. <rdar://problem/16889891> llvm-svn: 209536
* Add FIXME comment based on code review feedback by Hal Finkel on r209338David Blaikie2014-05-231-0/+2
| | | | llvm-svn: 209529
* Convert test to use FileCheck.Rafael Espindola2014-05-231-1/+5
| | | | llvm-svn: 209528
* Teach the table generated emitPseudoExpansionLowering function to not emit a ↵Aaron Ballman2014-05-231-61/+65
| | | | | | switch statement containing only a default statement (and no cases). Updated some of the code to use range-based for loops as well. No functional changes. llvm-svn: 209521
* Aliases are always definition, delete dead code.Rafael Espindola2014-05-231-8/+2
| | | | | | While at it, use a range loop. llvm-svn: 209519
* Delete dead code.Rafael Espindola2014-05-231-4/+0
| | | | | | GV is never used past this point. This was probably a copy and paste error. llvm-svn: 209518
* [mips] Work around inconsistency in llvm-mc's placement of fixup markersDaniel Sanders2014-05-235-13/+82
| | | | | | | | | | | | | | | | | | | Summary: Add a second fixup table to MipsAsmBackend::getFixupKindInfo() to correctly position llvm-mc's fixup placeholders for big-endian. See PR19836 for full details of the issue. To summarize, the fixup placeholders do not account for endianness properly and the implementations of getFixupKindInfo() for each target are measuring MCFixupKindInfo.TargetOffset from different ends of the instruction encoding to compensate. Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3889 llvm-svn: 209514
* [mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in ↵Daniel Sanders2014-05-235-7/+49
| | | | | | | | | | | | | | MIPS32r6/MIPS64r6 Summary: Depends on D3872 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3891 llvm-svn: 209513
* [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6Daniel Sanders2014-05-2315-143/+602
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Instead the system is required to provide some means of handling unaligned load/store without special instructions. Options include full hardware support, full trap-and-emulate, and hybrids such as hardware support within a cache line and trap-and-emulate for multi-line accesses. MipsSETargetLowering::allowsUnalignedMemoryAccesses() has been configured to assume that unaligned accesses are 'fast' on the basis that I expect few hardware implementations will opt for pure-software handling of unaligned accesses. The ones that do handle it purely in software can override this. mips64-load-store-left-right.ll has been merged into load-store-left-right.ll The stricter testing revealed a Bits!=Bytes bug in passByValArg(). This has been fixed and the variables renamed to clarify the units they hold. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3872 llvm-svn: 209512
* [asan] properly instrument memory accesses that have small alignment ↵Kostya Serebryany2014-05-234-18/+44
| | | | | | (smaller than min(8,size)) by making two checks instead of one. This may slowdown some cases, e.g. long long on 32-bit or wide loads produced after loop unrolling. The benefit is higher sencitivity. llvm-svn: 209508
* Updated the llvm.mem.parallel_loop_access semantics to include the possibilityPekka Jaaskelainen2014-05-231-9/+23
| | | | | | | | | to have only some of the loop's memory instructions be annotated and still _help_ the loop carried dependence analysis. This was discussed in the llvmdev ML (topic: "parallel loop metadata question"). llvm-svn: 209507
* Fixup sys::getHostCPUFeatures crypto names so it doesn't clash with kernel ↵Bradley Smith2014-05-231-9/+9
| | | | | | headers llvm-svn: 209506
* [YAML] Add an optional argument `EnumMask` to the `yaml::IO::bitSetCase()`.Simon Atanasyan2014-05-234-19/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some bit-set fields used in ELF file headers in fact contain two parts. The first one is a regular bit-field. The second one is an enumeraion. For example ELF header `e_flags` for MIPS target might contain the following values: Bit-set values: EF_MIPS_NOREORDER = 0x00000001 EF_MIPS_PIC = 0x00000002 EF_MIPS_CPIC = 0x00000004 EF_MIPS_ABI2 = 0x00000020 Enumeration: EF_MIPS_ARCH_32 = 0x50000000 EF_MIPS_ARCH_64 = 0x60000000 EF_MIPS_ARCH_32R2 = 0x70000000 EF_MIPS_ARCH_64R2 = 0x80000000 For printing bit-sets we use the `yaml::IO::bitSetCase()`. It does not support bit-set/enumeration combinations and prints too many flags from an enumeration part. This patch fixes this problem. New method `yaml::IO::maskedBitSetCase()` handle "enumeration" part of bitset defined by provided mask. Patch reviewed by Nick Kledzik and Sean Silva. llvm-svn: 209504
* Typedef NumeredTypesMapTy is not used anywhere.Yaron Keren2014-05-231-4/+0
| | | | llvm-svn: 209502
* Test commit.Jingyue Wu2014-05-231-1/+1
| | | | | | The keyword "virtual" is not necessary. llvm-svn: 209501
* llvm-ar: Output the file we errored on.Filipe Cabecinhas2014-05-232-1/+6
| | | | llvm-svn: 209500
* Rename a couple of variables to be more accurate.David Blaikie2014-05-231-8/+8
| | | | | | | | It's not really a "ScopeDIE", as such - it's the abstract function definition's DIE. And we usually use "SP" for subprograms, rather than "Sub". llvm-svn: 209499
* DebugInfo: Fix cross-CU references for scopes (and variables within those ↵David Blaikie2014-05-232-3/+10
| | | | | | | | scopes) in abstract definitions of cross-CU inlined functions Found by Adrian Prantl during post-commit review of r209335. llvm-svn: 209498
* MC: remove unnecessary restriction on testsSaleem Abdulrasool2014-05-237-7/+0
| | | | | | | | | | Rafael correctly pointed out that the restriction is unnecessary. Although the tests are intended to ensure that we dont abort due to an assertion, running the tests in all modes is better since it also ensures that we dont crash without assertions. Always run these tests to ensure that we can handle invalid input correctly. llvm-svn: 209496
* [ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD ↵Jiangning Liu2014-05-232-15/+186
| | | | | | with swapped input vectors. llvm-svn: 209495
* Attempt to placate compilers that warn on casts between pointer-to-object andRichard Smith2014-05-231-20/+20
| | | | | | pointer-to-function types. llvm-svn: 209490
* ScalarEvolution: Fix handling of AddRecs in isKnownPredicateJustin Bogner2014-05-232-12/+54
| | | | | | | | | | | | | ScalarEvolution::isKnownPredicate() can wrongly reduce a comparison when both the LHS and RHS are SCEVAddRecExprs. This checks that both LHS and RHS are guarded in the case when both are SCEVAddRecExprs. The test case is against indvars because I could not find a way to directly test SCEV. Patch by Sanjay Patel! llvm-svn: 209487
* [Graph Writer] Limit the length of the graph name because Windows can't ↵Michael J. Spencer2014-05-221-1/+4
| | | | | | | | | | | | | handle it. Windows can't handle paths longer than 260 code points without \\?\. Even with \\?\ it can't handle path components longer than 255 code points. So limit graph names to the arbitrary length of 140. Random characters are still added to the end, so it's ok if graph names collide. Differential Revision: http://reviews.llvm.org/D3883 llvm-svn: 209483
* Make these bool bitfields.Eric Christopher2014-05-221-7/+7
| | | | llvm-svn: 209481
* [RuntimeDyld] Teach RuntimeDyldMachO how to handle scattered VANILLA relocs onLang Hames2014-05-222-9/+61
| | | | | | | | | | | | | | | | | | | | i386. This fixes two more MCJIT regression tests on i386: ExecutionEngine/MCJIT/2003-05-06-LivenessClobber.ll ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll The implementation of processScatteredVANILLA is tasteless (*ba-dum-ching*), but I'm working on a substantial tidy-up of RuntimeDyldMachO that should improve things. This patch also fixes a type-o in RuntimeDyldMachO::processSECTDIFFRelocation, and teaches that method to skip over the PAIR reloc following the SECTDIFF. <rdar://problem/16961886> llvm-svn: 209478
* Update some AliasAnalysis pass docs for getAdjustedAnalysisPointer.Eric Christopher2014-05-221-0/+14
| | | | | | Patch by George Burgess. llvm-svn: 209467
* R600: Add definition for flat address space ID.Matt Arsenault2014-05-222-4/+5
| | | | | | | | Use 4 since that's probably what it will be for spir. Move ADDRESS_NONE to the end to keep the constant_buffer_* values unchanged, since apparently a bunch of r600 tests use those directly. llvm-svn: 209463
* R600: Try to convert BFE back to standard bit ops when possible.Matt Arsenault2014-05-225-11/+297
| | | | | | | This allows existing DAG combines to work on them, and then we can re-match to BFE if necessary during instruction selection. llvm-svn: 209462
* R600: Add dag combine for BFEMatt Arsenault2014-05-226-2/+829
| | | | llvm-svn: 209461
* R600: Implement ComputeNumSignBitsForTargetNode for BFEMatt Arsenault2014-05-223-0/+45
| | | | llvm-svn: 209460
* R600: Implement computeMaskedBitsForTargetNode for BFEMatt Arsenault2014-05-221-1/+29
| | | | llvm-svn: 209459
* R600: Expand mul24 for GPUs without itMatt Arsenault2014-05-226-16/+35
| | | | llvm-svn: 209458
* R600: Expand mad24 for GPUs without itMatt Arsenault2014-05-226-1/+38
| | | | llvm-svn: 209457
* R600: Add intrinsics for mad24Matt Arsenault2014-05-229-3/+67
| | | | llvm-svn: 209456
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