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* [tablegen] Add CustomCallingConv and use it to tablegen-erate the outermost ↵Daniel Sanders2014-11-015-31/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | parts of the Mips O32 implementation Summary: CustomCallingConv is simply a CallingConv that tablegen should not generate the implementation for. It allows regular CallingConv's to delegate to these custom functions. This is (currently) necessary for Mips and we cannot use CCCustom without having to adapt to the different API that CCCustom uses. This brings us a bit closer to being able to remove MipsCC::analyzeCallOperands and MipsCC::analyzeFormalArguments in favour of the common implementation. No functional change to the targets. Depends on D3341 Reviewers: vmedic Reviewed By: vmedic Subscribers: vmedic, llvm-commits Differential Revision: http://reviews.llvm.org/D5965 llvm-svn: 221052
* Sink DwarfDebug::AbstractSPDies down into DwarfFileDavid Blaikie2014-11-013-11/+11
| | | | | | | | | | | This is the first big step to allowing gmlt-like inline scope information in the skeleton CU. While this commit doesn't change the functionality, it's only a small step to call "constructAbstractSubprogramDIE" on both the InfoHolder and the SkeletonHolder (when in use) and that will at least create the abstract SP dies in that case, though still not creating the other subprograms. llvm-svn: 221051
* Remove redundant calls to isMaterializable.Rafael Espindola2014-11-0110-51/+21
| | | | | | | | | | This removes calls to isMaterializable in the following cases: * It was redundant with a call to isDeclaration now that isDeclaration returns the correct answer for materializable functions. * It was followed by a call to Materialize. Just call Materialize and check EC. llvm-svn: 221050
* Revert r221048 - Test commitDaniel Sanders2014-11-011-1/+0
| | | | | | | It seems I can't commit unless $DBUS_SESSION_BUS_ADDRESS is set correctly and it is not set for ssh sessions. llvm-svn: 221049
* Test commitDaniel Sanders2014-11-011-0/+1
| | | | | | Added some whitespace to debug some authentication issues I'm having. llvm-svn: 221048
* [JIT] Fix some more missing endian conversions in RuntimeDyldDaniel Sanders2014-11-011-6/+7
| | | | | | | | | | | | | | Summary: This fixes MachO_i386_eh_frame.s on a big-endian Mips host. Reviewers: lhames Reviewed By: lhames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6019 llvm-svn: 221047
* [CMake] llvm-profdata requires Core.NAKAMURA Takumi2014-11-011-1/+5
| | | | llvm-svn: 221046
* InstCombine: Combine (X+cst) < 0 --> X < -cstDavid Majnemer2014-11-012-0/+38
| | | | | | | | | | | | | This can happen pretty often in code that looks like: int foo = bar - 1; if (foo < 0) do stuff In this case, bar < 1 is an equivalent condition. This transform requires that the add instruction be annotated with nsw. llvm-svn: 221045
* IR: Restore the old behavior of getDISubprogramDavid Majnemer2014-11-011-10/+9
| | | | | | | getDISubprogram was mistakenly thought to contain a bug: we thought we might need to try harder if we found a DebugLoc we didn't find. llvm-svn: 221044
* Revert "Temporarily revert r220777 to sort out build bot breakage."Adrian Prantl2014-11-013-12/+56
| | | | | | | This reverts commit r221028. Later commits depend on this and reverting just this one causes even more bots to fail. llvm-svn: 221041
* Revert r220779, "[AVX512] Removed special case for cmp instructions in ↵NAKAMURA Takumi2014-11-011-4/+15
| | | | | | | | getVectorMaskingNode. Now cmp intrinsics lower as other intrinsics through VSELECT, and then VSELECT tranforms to AND in PerformSELECTCombine." Since r221028 (reverting r220777), this caused failures. llvm-svn: 221040
* Remove unused functionDavid Blaikie2014-11-011-3/+0
| | | | llvm-svn: 221037
* And... fix the build some more.David Blaikie2014-11-011-1/+1
| | | | llvm-svn: 221036
* Just iterate the DwarfCompileUnits rather than trying to filter them out of ↵David Blaikie2014-11-011-49/+46
| | | | | | the list of all units. llvm-svn: 221034
* Add '*' to auto variable that is a pointer, as per the coding conventions.David Blaikie2014-11-011-1/+1
| | | | llvm-svn: 221033
* Add show and merge tools for sample PGO profiles.Diego Novillo2014-11-019-117/+317
| | | | | | | | | | | | | | | | | | | | | Summary: This patch extends the 'show' and 'merge' commands in llvm-profdata to handle sample PGO formats. Using the 'merge' command it is now possible to convert one sample PGO format to another. The only format that is currently not working is 'gcc'. I still need to implement support for it in lib/ProfileData. The changes in the sample profile support classes are needed for the merge operation. Reviewers: bogner Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6065 llvm-svn: 221032
* Add DwarfCompileUnit::getSkeleton that returns DwarfCompileUnit* to avoid ↵David Blaikie2014-11-012-3/+6
| | | | | | having to cast from DwarfUnit* on every call. llvm-svn: 221031
* Temporarily revert r220777 to sort out build bot breakage.Adrian Prantl2014-11-013-56/+12
| | | | | | "[x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros." llvm-svn: 221028
* IR: MDNode => Value: Instruction::getAllMetadata()Duncan P. N. Exon Smith2014-11-015-16/+17
| | | | | | | Change `Instruction::getAllMetadata()` to modify a vector of `Value` instead of `MDNode` and update call sites. This is part of PR21433. llvm-svn: 221027
* IR: MDNode => Value: Instruction::getMetadata()Duncan P. N. Exon Smith2014-11-0122-85/+82
| | | | | | | | | | Change `Instruction::getMetadata()` to return `Value` as part of PR21433. Update most callers to use `Instruction::getMDNode()`, which wraps the result in a `cast_or_null<MDNode>`. llvm-svn: 221024
* IR: MDNode => Value: Add Instruction::getMDNode()Duncan P. N. Exon Smith2014-10-312-0/+28
| | | | | | | | | | Add `Instruction::getMDNode()` that casts to `MDNode` before changing `Instruction::getMetadata()` to return `Value`. This avoids adding `cast_or_null<MDNode>` boiler-plate throughout the code. Part of PR21433. llvm-svn: 221023
* Revert "R600: Add missing file to CMakeLists.txt"Reid Kleckner2014-10-311-1/+0
| | | | | | | | This reverts commit r220998. It should've been reverted with the other change. llvm-svn: 221021
* Revert "R600: Make sure to inline all internal functions"Reid Kleckner2014-10-315-106/+1
| | | | | | | | | This reverts commit r220996. It introduced layering violations causing link errors in many configurations. llvm-svn: 221020
* Work around bugs in MSVC "14" CTP 3's conversion logicReid Kleckner2014-10-316-8/+17
| | | | | | | | | | It appears to ignore or find ambiguous MachineInstrBuilder's conversion operators that allow conversion to MachineInstr* and MachineBasicBlock::bundle_iterator. As a workaround, add an explicit way to get the MachineInstr. llvm-svn: 221017
* Refactor duplicated code in liking GlobalValues.Rafael Espindola2014-10-313-248/+139
| | | | | | | | | There is quiet a bit of logic that is common to any GlobalValue but was duplicated for Functions, GlobalVariables and GlobalAliases. While at it, merge visibility even when comdats are used, fixing pr21415. llvm-svn: 221014
* Define LLVM_NOEXCEPT with MSVC 14 CTP 3 or newerReid Kleckner2014-10-311-1/+1
| | | | | | | | | | We have to use _MSC_FULL_VER here as CTP 2 and earlier didn't define noexcept to my knowledge. Fixes build error in lib/Support/Error.cpp when inheriting from std::error_category, which has a noexcept virtual method. llvm-svn: 221013
* Suppress MSVC's equivalent of -Wshadow warningsReid Kleckner2014-10-311-0/+4
| | | | | | | | | | | | | | | | | | | IMO we need to clean up some of these, but the member variable one (C4458) has false positives on static methods. It is currently firing on Twine, which has a static method like: struct Twine { uintptr_t LHS, RHS; static void staticMethod() { // warning C4458: declaration of 'LHS' hides class member uintptr_t LHS; ... } }; We should fix up clang's -Wshadow and clean it up, and then we can re-enable some of these MSVC warnings. llvm-svn: 221012
* Sink some of DwarfDebug::collectDeadVariables down into DwarfCompileUnit.David Blaikie2014-10-314-20/+25
| | | | llvm-svn: 221010
* Correctly update dom-tree after loop vectorizer.Michael Zolotukhin2014-10-312-1/+143
| | | | llvm-svn: 221009
* Sink most of DwarfDebug::constructAbstractSubprogramScopeDIE into ↵David Blaikie2014-10-313-14/+13
| | | | | | DwarfCompileUnit llvm-svn: 221005
* R600: Add IPO to the list of required librariesTom Stellard2014-10-311-1/+1
| | | | llvm-svn: 221004
* [Object] Modify OwningBinary's interface to separate inspection from ownership.Lang Hames2014-10-316-22/+29
| | | | | | | | The getBinary and getBuffer method now return ordinary pointers of appropriate const-ness. Ownership is transferred by calling takeBinary(), which returns a pair of the Binary and a MemoryBuffer. llvm-svn: 221003
* R600: Add missing file to CMakeLists.txtTom Stellard2014-10-311-0/+1
| | | | llvm-svn: 220998
* R600: Don't promote allocas when one of the users is a ptrtoint instructionTom Stellard2014-10-312-6/+38
| | | | | | | | We need to figure out how to track ptrtoint values all the way until result is converted back to a pointer in order to correctly rewrite the pointer type. llvm-svn: 220997
* R600: Make sure to inline all internal functionsTom Stellard2014-10-315-1/+106
| | | | | | Function calls aren't supported yet. llvm-svn: 220996
* IR: Instruction::setMetadata() should use cast_or_nullDuncan P. N. Exon Smith2014-10-311-1/+1
| | | | | | | | | Not sure why this assertion didn't fire locally [1], but in r220994 `Instruction::setMetadata()` should be using `cast_or_null`. [1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/12327 llvm-svn: 220995
* IR: MDNode => Value: Instruction::setMetadata()Duncan P. N. Exon Smith2014-10-313-10/+13
| | | | | | | Change `Instruction::setMetadata()` API to accept `Value` instead of `MDNode`. Part of PR21433. llvm-svn: 220994
* [PowerPC] Initial VSX intrinsic support, with min/max for vector doubleBill Schmidt2014-10-313-6/+167
| | | | | | | | | | | | | Now that we have initial support for VSX, we can begin adding intrinsics for programmer access to VSX instructions. This patch adds basic support for VSX intrinsics in general, and tests it by implementing intrinsics for minimum and maximum for the vector double data type. The LLVM portion of this is quite straightforward. There is a companion patch for Clang. llvm-svn: 220988
* [AArch64] Check Dest Register Liveness in CondOpt pass.Chad Rosier2014-10-311-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Our internal test reveals such case should not be transformed: cmp x17, #3 b.lt .LBB10_15 ... subs x12, x12, #1 b.gt .LBB10_1 where x12 is a liveout, becomes: cmp x17, #2 b.le .LBB10_15 ... subs x12, x12, #2 b.ge .LBB10_1 Unable to provide test case as it's difficult to reproduce on community branch. http://reviews.llvm.org/D6048 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220987
* [asan] do not treat inline asm calls as indirect callsKostya Serebryany2014-10-312-1/+4
| | | | llvm-svn: 220985
* [CodeGenPrepare] Move extractelement close to store if they can be combined.Quentin Colombet2014-10-315-2/+823
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an optimization in CodeGenPrepare to move an extractelement right before a store when the target can combine them. The optimization may promote any scalar operations to vector operations in the way to make that possible. ** Context ** Some targets use different register files for both vector and scalar operations. This means that transitioning from one domain to another may incur copy from one register file to another. These copies are not coalescable and may be expensive. For example, according to the scheduling model, on cortex-A8 a vector to GPR move is 20 cycles. ** Motivating Example ** Let us consider an example: define void @foo(<2 x i32>* %addr1, i32* %dest) { %in1 = load <2 x i32>* %addr1, align 8 %extract = extractelement <2 x i32> %in1, i32 1 %out = or i32 %extract, 1 store i32 %out, i32* %dest, align 4 ret void } As it is, this IR generates the following assembly on armv7: vldr d16, [r0] @vector load vmov.32 r0, d16[1] @ cross-register-file copy: 20 cycles orr r0, r0, #1 @ scalar bitwise or str r0, [r1] @ scalar store bx lr Whereas we could generate much faster code: vldr d16, [r0] @ vector load vorr.i32 d16, #0x1 @ vector bitwise or vst1.32 {d16[1]}, [r1:32] @ vector extract + store bx lr Half of the computation made in the vector is useless, but this allows to get rid of the expensive cross-register-file copy. ** Proposed Solution ** To avoid this cross-register-copy penalty, we promote the scalar operations to vector operations. The penalty will be removed if we manage to promote the whole chain of computation in the vector domain. Currently, we do that only when the chain of computation ends by a store and the target is able to combine an extract with a store. Stores are the most likely candidates, because other instructions produce values that would need to be promoted and so, extracted as some point[1]. Moreover, this is customary that targets feature stores that perform a vector extract (see AArch64 and X86 for instance). The proposed implementation relies on the TargetTransformInfo to decide whether or not it is beneficial to promote a chain of computation in the vector domain. Unfortunately, this interface is rather inaccurate for this level of details and although this optimization may be beneficial for X86 and AArch64, the inaccuracy will lead to the optimization being too aggressive. Basically in TargetTransformInfo, everything that is legal has a cost of 1, whereas, even if a vector type is legal, usually a vector operation is slightly more expensive than its scalar counterpart. That will lead to too many promotions that may not be counter balanced by the saving of the cross-register-file copy. For instance, on AArch64 this penalty is just 4 cycles. For now, the optimization is just enabled for ARM prior than v8, since those processors have a larger penalty on cross-register-file copies, and the scope is limited to basic blocks. Because of these two factors, we limit the effects of the inaccuracy. Indeed, I did not want to build up a fancy cost model with block frequency and everything on top of that. [1] We can imagine targets that can combine an extractelement with other instructions than just stores. If we want to go into that direction, the current interfaces must be augmented and, moreover, I think this becomes a global isel problem. Differential Revision: http://reviews.llvm.org/D5921 <rdar://problem/14170854> llvm-svn: 220978
* [asan] fix caller-calee instrumentation to emit new cache for every call siteKostya Serebryany2014-10-312-5/+9
| | | | llvm-svn: 220973
* Update the non-pthreads fallback for RWMutex on UnixDavid Blaikie2014-10-311-6/+6
| | | | | | | | | | Tested this by #if 0'ing out the pthreads implementation, which indicated that this fallback was not currently compiling successfully and applying this patch resolves that. Patch by Andy Chien. llvm-svn: 220969
* Unify and update link-messages.ll and redefinition.ll. NFC.Rafael Espindola2014-10-313-17/+5
| | | | llvm-svn: 220968
* Correct assert text from r220923David Blaikie2014-10-311-1/+1
| | | | | | Noticed in post-commit review by Adrian Prantl. llvm-svn: 220967
* Mark a few variables const. NFC.Rafael Espindola2014-10-311-9/+11
| | | | llvm-svn: 220964
* [CMake] llvm/examples: Update libdeps for unoptimized builds.NAKAMURA Takumi2014-10-312-0/+2
| | | | llvm-svn: 220962
* [AArch64] CondOpt pass is missing FCMP instructions when searching backward forChad Rosier2014-10-312-0/+75
| | | | | | | | | a CMP which defines the flags used by B.CC. http://reviews.llvm.org/D6047 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220961
* [SCEV] Improve Scalar Evolution's use of no {un,}signed wrap flagsBradley Smith2014-10-313-8/+79
| | | | | | | | | | | | | | | In a case where we have a no {un,}signed wrap flag on the increment, if RHS - Start is constant then we can avoid inserting a max operation bewteen the two, since we can statically determine which is greater. This allows us to unroll loops such as: void testcase3(int v) { for (int i=v; i<=v+1; ++i) f(i); } llvm-svn: 220960
* [PowerPC] Load BlockAddress values from the TOC in 64-bit SVR4 codeUlrich Weigand2014-10-315-10/+63
| | | | | | | | | | | | | | Since block address values can be larger than 2GB in 64-bit code, they cannot be loaded simply using an @l / @ha pair, but instead must be loaded from the TOC, just like GlobalAddress, ConstantPool, and JumpTable values are. The commit also fixes a bug in PPCLinuxAsmPrinter::doFinalization where temporary labels could not be used as TOC values, since code would attempt (and fail) to use GetOrCreateSymbol to create a symbol of the same name as the temporary label. llvm-svn: 220959
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