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* Revert "[Atomics][LoopIdiom] Recognize unordered atomic memcpy"Anna Thomas2017-05-314-570/+15
| | | | | | | | | | This reverts commit r304310. It caused build failures in polly and mingw due to undefined reference to llvm::RTLIB::getMEMCPY_ELEMENT_ATOMIC. llvm-svn: 304315
* [PPC] Inline expansion of memcmpZaara Syeda2017-05-3115-18/+1066
| | | | | | | | | | | | | | | This patch does an inline expansion of memcmp. It changes the memcmp library call into an inline expansion when the size is known at compile time and is under a target specified threshold. This expansion is implemented in CodeGenPrepare and expands into straight line code. The target specifies a maximum load size and the expansion works by using this size to load the two sources, compare, and exit early if a difference is found. It also has a special case when the memcmp result is used in a compare to zero equality. Differential Revision: https://reviews.llvm.org/D28637 llvm-svn: 304313
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-5/+13
| | | | llvm-svn: 304312
* [AMDGPU] Fix bugs in new waitcnt pass. Add test.Mark Searles2017-05-312-4/+55
| | | | | | | | | | | - new waitcnt pass remains off by default; -enable-si-insert-waitcnts=1 to enable it - fix handling of PERMUTE ops - fix insertion of waitcnt instrs at function begin/end ( port of analogous code that was added to old waitcnt pass ) - add new test Differential Revision: https://reviews.llvm.org/D33114 llvm-svn: 304311
* [Atomics][LoopIdiom] Recognize unordered atomic memcpyAnna Thomas2017-05-314-15/+570
| | | | | | | | | | | | | | | | | | | | | Summary: Expanding the loop idiom test for memcpy to also recognize unordered atomic memcpy. The only difference for recognizing an unordered atomic memcpy and instead of a normal memcpy is that the loads and/or stores involved are unordered atomic operations. Background: http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html Patch by Daniel Neilson! Reviewers: reames, anna, skatkov Reviewed By: reames Subscribers: llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D33243 llvm-svn: 304310
* [AMDGPU][MC] New syntax for ds_swizzle_b32 offsetDmitry Preobrazhensky2017-05-3112-20/+746
| | | | | | | | | | See Bug 28601: https://bugs.llvm.org//show_bug.cgi?id=28601 Reviewers: artem.tamazov, vpykhtin Differential Revision: https://reviews.llvm.org/D33542 llvm-svn: 304309
* [AArch64] Enable FeatureFuseAES on Cortex-A53.Florian Hahn2017-05-312-0/+2
| | | | | | It improves performance on Cortex-A53. llvm-svn: 304307
* [AArch64] Enable FeatureFuseAES on Cortex-A73.Florian Hahn2017-05-312-34/+36
| | | | | | It improves performance on Cortex-A73. llvm-svn: 304304
* Fix assertion when merging multiple empty AttributeListsReid Kleckner2017-05-312-0/+11
| | | | | | | | Patch by Nicholas Wilson! Differential Revision: https://reviews.llvm.org/D33627 llvm-svn: 304300
* [DAG] Avoid use of stale store.Nirav Dave2017-05-312-2/+34
| | | | | | | | | | | | | | | | | | Correct references to alignment of store which may be deleted in a previous iteration of merge. Instead use first store that would be merged. Corrects pr33172's use-after-poison caught by ASan. Reviewers: spatel, hfinkel, RKSimon Reviewed By: RKSimon Subscribers: thegameg, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33686 llvm-svn: 304299
* [PowerPC] Fix a performance bug for PPC::XXPERMDI.Tony Jiang2017-05-315-13/+417
| | | | | | | | | | There are some VectorShuffle Nodes in SDAG which can be selected to XXPERMDI Instruction, this patch recognizes them and does the selection to improve the PPC performance. Differential Revision: https://reviews.llvm.org/D33404 llvm-svn: 304298
* Regenerate xchg-nofold.ll expected results. NFC.Amaury Sechet2017-05-311-1/+23
| | | | llvm-svn: 304291
* [PowerPC] Eliminate integer compare instructions - vol. 3Nemanja Ivanovic2017-05-317-18/+669
| | | | | | | | | This patch builds upon https://reviews.llvm.org/rL302810 to add handling for the 64-bit SETEQ patterns. Differential Revision: https://reviews.llvm.org/D33369 llvm-svn: 304286
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-312-4/+4
| | | | | | | When generating code for a shift loop, check the shift amount against the literal value 0, not R0 llvm-svn: 304284
* [AVR] CPIRdK can only work with r16..r31; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-1/+1
| | | | | | (https://github.com/avr-rust/rust/issues/50) llvm-svn: 304283
* [PowerPC] Eliminate integer compare instructions - vol. 2Nemanja Ivanovic2017-05-315-12/+299
| | | | | | | | | | | | This patch builds upon https://reviews.llvm.org/rL302810 to add handling for bitwise logical operations in general purpose registers. The idea is to keep the values in GPRs as long as possible - only extracting them to a condition register bit when no further operations are to be done. Differential Revision: https://reviews.llvm.org/D31851 llvm-svn: 304282
* [TableGen] Implement non-const versions of Record::getValue by delegating to ↵Craig Topper2017-05-311-4/+2
| | | | | | the const versions to avoid duplicate code. NFC llvm-svn: 304281
* [TableGen] Make one of RecordVal's constructors delegate to the other to ↵Craig Topper2017-05-312-7/+2
| | | | | | reduce duplicate code. llvm-svn: 304280
* [ObjectYAML] Split CodeViewYAML into 3 pieces.Zachary Turner2017-05-3111-608/+728
| | | | | | | | | The code was a mess and disorganized due to the sheer amount of it being in one file. So I'm splitting this into three files. One for CodeView types, one for CodeView symbols, and one for CodeView debug subsections. NFC. llvm-svn: 304278
* [coroutines] Call initializePass in coroutine pass constructorsGor Nishanov2017-05-314-4/+12
| | | | | | | | | | | | | | | | Summary: Fixes: https://bugs.llvm.org/show_bug.cgi?id=33226 Reviewers: chandlerc, davide, majnemer, dblaikie Reviewed By: chandlerc Subscribers: EricWF, llvm-commits Differential Revision: https://reviews.llvm.org/D33701 llvm-svn: 304277
* [CFLAA] Add missing break; note things are broken.George Burgess IV2017-05-312-0/+24
| | | | | | | | | | Thanks to Galina Kistanova for finding the missing break! When trying to make a test for this, I realized our logic for handling extractvalue/insertvalue/... is somewhat broken. This makes constructing a test-case for this missing break nontrivial. llvm-svn: 304275
* X86FrameLowering: No need to mark FP as live-in everywhereMatthias Braun2017-05-311-7/+2
| | | | | | | | The frame pointer (when used as frame pointer) is a reserved register. We do not track liveness of reserved registers and hence do not need to add them to the basic block livein lists. llvm-svn: 304274
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+2
| | | | llvm-svn: 304273
* NewGVN: Fix PR 33185 by checking whether we need to recursivelyDaniel Berlin2017-05-312-23/+74
| | | | | | generate a phi of ops, which we don't currently support. llvm-svn: 304272
* Fix test that wasn't update_test_check'dDaniel Berlin2017-05-311-0/+17
| | | | llvm-svn: 304271
* InstructionSimplify: Remove now-redundant reachability tests, as dominates() ↵Daniel Berlin2017-05-311-6/+1
| | | | | | already does them llvm-svn: 304270
* Mark a test as requiring a default tripleVedant Kumar2017-05-311-0/+1
| | | | | | | | | | | | | This test assumes that llc can infer a default triple. I'm not sure why exactly, but the Verify MachineInstrs bot requires tests to be explicit about this dependency. This commit follows the lead from r248452 and adds in 'REQUIRES: default_triple' to omit-empty.ll. Bot URL: http://lab.llvm.org:8080/green/job/Verify-Machineinstrs_AArch64/7500 llvm-svn: 304269
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+1
| | | | llvm-svn: 304268
* ARM: Fix cmpxchg O0 expansionMatthias Braun2017-05-312-62/+79
| | | | | | | | | | | | | | | | This is the equivalent of r304048 for ARM: - Rewrite livein calculation to use the computeLiveIns() helper function. This is slightly less efficient but easier to reason about and doesn't unnecessarily add pristine and reserved registers[1] - Zero the status register at the beginning of the loop to make sure it has a defined value. - Remove kill flags of values that need to stay alive throughout the loop. [1] An upcoming commit of mine will tighten the MachineVerifier to catch these. llvm-svn: 304267
* ARM: Do not add reserved registers to block livein lists; NFCMatthias Braun2017-05-312-6/+8
| | | | llvm-svn: 304266
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-05-3110-215/+274
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 304265
* Fix CodeView-related modules build failures post-r304248Vedant Kumar2017-05-311-2/+2
| | | | llvm-svn: 304264
* [ObjectYAML] Clean up the CodeView headers a bit.Zachary Turner2017-05-313-36/+45
| | | | | | | | | | | | CodeViewYAML.h attempts to hide the details of many of the CodeView yaml structures and types, but at the same time it exposes the mapping traits for them to external users of the header. This patch just hides these in the implementation files so that the interface is kept as simple as possible. llvm-svn: 304263
* Fix misspellingAlina Sbirlea2017-05-311-1/+1
| | | | llvm-svn: 304262
* Add latency info for Exynos interleaved Load/Store instructions.Abderrazek Zaafrani2017-05-311-5/+335
| | | | llvm-svn: 304259
* Try to fix build again.Zachary Turner2017-05-301-79/+74
| | | | llvm-svn: 304257
* [CodeView] Move CodeView symbol yaml logic to ObjectYAML.Zachary Turner2017-05-3012-517/+507
| | | | | | | | This continues the effort to get the CodeView YAML parsing logic into ObjectYAML. After this patch, the only missing piece will be the CodeView debug symbol subsections. llvm-svn: 304256
* Fix bug on Big-Endian system, due to reference to vector out of scope.Eric Beckmann2017-05-301-1/+1
| | | | llvm-svn: 304255
* MachineInstr: Do not skip dead def operands when printing.Matthias Braun2017-05-301-32/+0
| | | | | | | | This was introduced a long time ago in r86583 when regmask operands didn't exist. Nowadays the behavior hurts more than it helps. This removes it. llvm-svn: 304254
* This patch should fix various clang warnings and a use of to_stringEric Beckmann2017-05-301-1/+2
| | | | | | which isn't support before c++11. llvm-svn: 304252
* [AntiDepBreaker] Revert r299124 and add a test.Tim Shen2017-05-303-332/+2
| | | | | | | | | | | | | | | | | Summary: AntiDepBreaker intends to add all live-outs, including the implicit CSRs, in StartBlock. r299124 was done without understanding that intention. Now with the live-ins propagated correctly (D32464), we can revert this change. Reviewers: MatzeB, qcolombet Subscribers: nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D33697 llvm-svn: 304251
* MIR: update test for noVRegs removal.Tim Northover2017-05-301-2/+0
| | | | | | I think I hadn't git pulled recently enough to bring it in. llvm-svn: 304250
* Try to fix build.Zachary Turner2017-05-301-11/+27
| | | | llvm-svn: 304249
* [CodeView] Move CodeView YAML code to ObjectYAML.Zachary Turner2017-05-3043-1158/+1081
| | | | | | | | | | | | | | | | | | | | | | This is the beginning of an effort to move the codeview yaml reader / writer into ObjectYAML so that it can be shared. Currently the only consumer / producer of CodeView YAML is llvm-pdbdump, but CodeView can exist outside of PDB files, and indeed is put into object files and passed to the linker to produce PDB files. Furthermore, there are subtle differences in the types of records that show up in object file CodeView vs PDB file CodeView, but they are otherwise 99% the same. By having this code in ObjectYAML, we can have llvm-pdbdump reuse this code, while teaching obj2yaml and yaml2obj to use this syntax for dealing with object files that can contain CodeView. This patch only adds support for CodeView type information to ObjectYAML. Subsequent patches will add support for CodeView symbol information. llvm-svn: 304248
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-3019-45/+45
| | | | | | | | | | | TargetPassConfig is not useful for targets that do not use the CodeGen library, so we may just as well store a pointer to an LLVMTargetMachine instead of just to a TargetMachine. While at it, also change the constructor to take a reference instead of a pointer as the TM must not be nullptr. llvm-svn: 304247
* MIR: remove explicit "noVRegs" property.Tim Northover2017-05-3010-14/+0
| | | | | | | We can infer this from the incoming MIR, so there's no reason to represent it with a special flag. llvm-svn: 304246
* [PartialInlining] Shrinkwrap allocas with live range contained in outline ↵Xinliang David Li2017-05-306-8/+355
| | | | | | | | region. Differential Revision: http://reviews.llvm.org/D33618 llvm-svn: 304245
* [Localizer] Don't trick to be smart for the insertion pointQuentin Colombet2017-05-302-6/+53
| | | | | | | | | There is no guarantee that the first use of a constant that is traversed is actually the first in the related basic block. Thus, if we use that as the insertion point we may end up with definitions that don't dominate there use. llvm-svn: 304244
* [llvm-config] Fix cflags test looking for "warning"Ben Langmuir2017-05-301-1/+1
| | | | | | | | This will fail if you configure with e.g. -Wno-unknown-warning-option. Change it to check for 'warning:' just like we did for 'error:' in r289484. llvm-svn: 304239
* [LV] Reapply r303763 with fix for PR33193Matthew Simpson2017-05-302-10/+68
| | | | | | | | | | | | | | | | | r303763 caused build failures in some out-of-tree tests due to an assertion in TTI. The original patch updated cost estimates for induction variable update instructions marked for scalarization. However, it didn't consider that the incoming value of an induction variable phi node could be a cast instruction. This caused queries for cast instruction costs with a mix of vector and scalar types. This patch includes a fix for cast instructions and the test case from PR33193. The fix was suggested by Jonas Paulsson <paulsson@linux.vnet.ibm.com>. Reference: https://bugs.llvm.org/show_bug.cgi?id=33193 Original Differential Revision: https://reviews.llvm.org/D33457 llvm-svn: 304235
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