summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
...
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-151-0/+24
| | | | llvm-svn: 278737
* Fix a test that failed due to:Hemant Kulkarni2016-08-151-1/+1
| | | | | | https://llvm.org/svn/llvm-project/llvm/trunk@278725 91177308-0d34-0410-b5e6-96231b3b80d8 llvm-svn: 278732
* Enhance SCEV to compute the trip count for some loops with unknown stride.David L Kreitzer2016-08-153-4/+138
| | | | | | | | Patch by Pankaj Chawla Differential Revision: https://reviews.llvm.org/D22377 llvm-svn: 278731
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-151-0/+12
| | | | llvm-svn: 278727
* [InstCombine] add tests for vector icmp foldsSanjay Patel2016-08-151-1/+93
| | | | llvm-svn: 278726
* llvm-objdump: Implement source[line numbers] interleavingHemant Kulkarni2016-08-154-15/+194
| | | | | | Differential Revsion: https://reviews.llvm.org/D22932 llvm-svn: 278725
* [libFuzzer] print a verbose message after executing inputs in non-fuzzing modeKostya Serebryany2016-08-152-0/+6
| | | | llvm-svn: 278724
* [libFuzzer] fix the bot Kostya Serebryany2016-08-151-1/+1
| | | | llvm-svn: 278721
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-152-0/+48
| | | | llvm-svn: 278717
* update test to use FileCheck and autogenerated checksSanjay Patel2016-08-151-3/+12
| | | | llvm-svn: 278714
* Fix WAsm test after LSR change in r278658Reid Kleckner2016-08-151-8/+8
| | | | | | Now the increment is done in a different location llvm-svn: 278713
* Revert "[Thumb] Validate branch target for CBZ/CBNZ instructions."Matthias Braun2016-08-154-47/+0
| | | | | | | | | | | This currently breaks the greendragon clang-stage1-configure-RA/ and brotli. It is probably just uncovering a pre-existing problem. Reverting temporarily to get the buildbots green again. A reduced testcase will follow shortly. This reverts commit r278659. llvm-svn: 278711
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-151-0/+22
| | | | llvm-svn: 278709
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-151-0/+12
| | | | llvm-svn: 278708
* minimize testSanjay Patel2016-08-151-18/+6
| | | | llvm-svn: 278707
* remove unnecessary IR comments about usesSanjay Patel2016-08-151-57/+56
| | | | llvm-svn: 278705
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-154-1/+69
| | | | llvm-svn: 278704
* Local variables whose address is taken and passed on to a call are described Wolfgang Pieb2016-08-158-10/+157
| | | | | | | | | | | in debug info using their stack slots instead of as an indirection of param reg + 0 offset. This is done by detecting FrameIndexSDNodes in SelectionDAG and generating FrameIndexDbgValues for them. This ultimately generates DBG_VALUEs with stack location operands. Differential Revision: http://reviews.llvm.org/D23283 llvm-svn: 278703
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-151-0/+37
| | | | llvm-svn: 278689
* [libFuzzer] add InsertRepeatedBytes and EraseBytes.Kostya Serebryany2016-08-158-20/+139
| | | | | | | | | | | | | New mutation: InsertRepeatedBytes. Updated mutation: EraseByte => EraseBytes. This helps https://github.com/google/sanitizers/issues/710 where libFuzzer was not able to find a known bug. Now it finds it in minutes. Hopefully, the change is general enough to help other targets. llvm-svn: 278687
* [InstCombine] auto-generate exact checksSanjay Patel2016-08-151-150/+209
| | | | | | | Note that several of these tests belong in InstSimplify rather than InstCombine because they return existing operands or constants. llvm-svn: 278684
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-152-0/+30
| | | | llvm-svn: 278683
* AMDGPU: Update AMDGPURuntimeMetadata.h for enums of address space qualifiersYaxun Liu2016-08-151-0/+7
| | | | llvm-svn: 278682
* AMDGPU: Don't fold subregister extracts into tied operandsMatt Arsenault2016-08-152-3/+30
| | | | llvm-svn: 278676
* Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd"Reid Kleckner2016-08-155-389/+153
| | | | | | | | | This reverts commit r278660. It causes downstream assertion failure in InstCombine on shuffle instructions. Comes up in __mm_swizzle_epi32. llvm-svn: 278672
* [AMDGPU] fix failure on printing of non-existing instruction operands.Valery Pykhtin2016-08-152-0/+10
| | | | | | Differential revision: https://reviews.llvm.org/D23323 llvm-svn: 278665
* MachineLoop: add methods findLoopControlBlock and findLoopPreheaderSjoerd Meijer2016-08-153-62/+70
| | | | | | | | | | | This adds two new utility functions findLoopControlBlock and findLoopPreheader to MachineLoop and MachineLoopInfo. These functions are refactored and taken from the Hexagon target as they are target independent; thus this is intendend to be a non-functional change. Differential Revision: https://reviews.llvm.org/D22959 llvm-svn: 278661
* [SimplifyCFG] Rewrite SinkThenElseCodeToEndJames Molloy2016-08-155-153/+389
| | | | | | | | | | | | | | | | | | | | | | | | | | The new version has several advantages: 1) IMSHO it's more readable and neater 2) It handles loads and stores properly 3) It can handle any number of incoming blocks rather than just two. I'll be taking advantage of this in a followup patch. With this change we can now finally sink load-modify-store idioms such as: if (a) return *b += 3; else return *b += 4; => %z = load i32, i32* %y %.sink = select i1 %a, i32 5, i32 7 %b = add i32 %z, %.sink store i32 %b, i32* %y ret i32 %b When this works for switches it'll be even more powerful. llvm-svn: 278660
* [Thumb] Validate branch target for CBZ/CBNZ instructions.Prakhar Bahuguna2016-08-154-0/+47
| | | | | | | | | | | | | | | | | Summary: The assembler currently does not check the branch target for CBZ/CBNZ instructions, which only permit branching forwards with a positive offset. This adds validation for the branch target to ensure negative PC-relative offsets are not encoded into the instruction, whether specified as a literal or as an assembler symbol. Reviewers: rengolin, t.p.northover Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D23312 llvm-svn: 278659
* [LSR] Don't try and create post-inc expressions on non-rotated loopsJames Molloy2016-08-157-7/+71
| | | | | | | | | | | | | | | If a loop is not rotated (for example when optimizing for size), the latch is not the backedge. If we promote an expression to post-inc form, we not only increase register pressure and add a COPY for that IV expression but for all IVs! Motivating testcase: void f(float *a, float *b, float *c, int n) { while (n-- > 0) *c++ = *a++ + *b++; } It's imperative that the pointer increments be located in the latch block and not the header block; if not, we cannot use post-increment loads and stores and we have to keep both the post-inc and pre-inc values around until the end of the latch which bloats register usage. llvm-svn: 278658
* [X86] PADDUSB/W instructions should be commutable.Craig Topper2016-08-151-2/+2
| | | | llvm-svn: 278654
* [X86] Mark some of the X86 SDNodes as commutative.Craig Topper2016-08-152-11/+13
| | | | llvm-svn: 278653
* [X86] X86ISD::FANDN is not commutative or associative.Craig Topper2016-08-151-2/+1
| | | | llvm-svn: 278652
* [ScopedNoAliasAA] collectMDInDomain should be a free functionDavid Majnemer2016-08-152-5/+2
| | | | | | | collectMDInDomain doesn't use any class members, making it a free function is not a functional change. llvm-svn: 278651
* [ScopedNoAliasAA] Only collect noalias nodes if we have alias.scope nodesDavid Majnemer2016-08-151-2/+4
| | | | | | No functional change is intended. llvm-svn: 278646
* [ScopedNoAliasAA] Replace !ScopeNodes.size() with ScopeNodes.empty()David Majnemer2016-08-151-1/+1
| | | | | | No functional change is intended. llvm-svn: 278645
* Revert "[ScopedNoAliasAA] Remove an unneccesary set"David Majnemer2016-08-152-13/+22
| | | | | | | This reverts commit r278641. I'm not sure why but this has upset the multistage builders... llvm-svn: 278644
* [ScopedNoAliasAA] Remove an unneccesary setDavid Majnemer2016-08-152-22/+13
| | | | | | | | | | | We are trying to prove that one group of operands is a subset of another. We did this by populating two Sets and determining that every element within one was inside the other. However, this is unnecessary. We can simply construct a single set and test if each operand is within it. llvm-svn: 278641
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-141-6/+22
| | | | llvm-svn: 278639
* [InstCombine] add tests for vector icmp foldsSanjay Patel2016-08-141-2/+40
| | | | llvm-svn: 278637
* [InstCombine] add test for potentially missing vector icmp foldSanjay Patel2016-08-141-3/+18
| | | | llvm-svn: 278636
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-141-3/+15
| | | | llvm-svn: 278635
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-141-0/+36
| | | | llvm-svn: 278634
* [InstCombine] remove unnecessary function attributes from testsSanjay Patel2016-08-141-29/+29
| | | | llvm-svn: 278633
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-141-0/+47
| | | | llvm-svn: 278632
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-141-0/+13
| | | | llvm-svn: 278631
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-141-6/+20
| | | | llvm-svn: 278630
* [AVX-512] Mark VPMADDWD as commutable to match SSE/AVX version.Craig Topper2016-08-141-7/+8
| | | | llvm-svn: 278629
* [AVX-512] Add masked commutable floating point max/min instructions to ↵Craig Topper2016-08-141-0/+24
| | | | | | folding tables. llvm-svn: 278628
* [AVX-512] Add masked logical operations to memory folding tables.Craig Topper2016-08-141-2/+98
| | | | llvm-svn: 278627
OpenPOWER on IntegriCloud