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* Reuse existing variables. NFC.Rafael Espindola2017-06-281-11/+9
| | | | llvm-svn: 306586
* Break up long lines, NFCKrzysztof Parzyszek2017-06-281-2/+4
| | | | llvm-svn: 306585
* [AArch64][Falkor] Try to avoid exhausting HW prefetcher resources when ↵Geoff Berry2017-06-282-0/+228
| | | | | | | | | | | | unrolling. Reviewers: t.p.northover, mcrosier Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34533 llvm-svn: 306584
* Reuse existing variable. NFC.Rafael Espindola2017-06-281-2/+2
| | | | llvm-svn: 306582
* [Dominators] Move helper functions into SemiNCAInfoJakub Kuderski2017-06-282-192/+185
| | | | | | | | | | | | | | Summary: Helper functions (DFSPass, ReverseDFSPass, Eval) need SemiNCAInfo anyway, so it's simpler to have them there as member functions. This also makes them simpler by removing template boilerplate. Reviewers: dberlin, sanjoy, chandlerc Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34427 llvm-svn: 306579
* [BBVectorize][X86] Regenerate simple testsSimon Pilgrim2017-06-284-152/+240
| | | | llvm-svn: 306578
* [InstCombine] Remove 64-bit bit width restriction from m_ConstantInt(uint64_t*&)Craig Topper2017-06-282-9/+4
| | | | | | | | | | I think we only need to make sure the value fits in 64-bits not that bit width is 64-bit. This helps places that use this for shift amounts since the shift amount needs to be the same bitwidth as the LHS, but can't be larger than the bit width. Differential Revision: https://reviews.llvm.org/D34737 llvm-svn: 306577
* [Dominators] Move SemiNCAInfo and helper functions out of DominatorTreeBaseJakub Kuderski2017-06-282-96/+88
| | | | | | | | | | | | | | | | | Summary: This moves SemiNCAInfo from DeminatorTreeBase to GenericDomTreeConstruction. It also put helper functions used during tree constructions in the same file. The point of this change is to further clean up DominatorTreeBase and make it easier to construct and verify (in future patches). Reviewers: dberlin, sanjoy, chandlerc Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34420 llvm-svn: 306576
* [LV] Fix PR33613 - retain order of insertelement per partAyal Zaks2017-06-282-10/+62
| | | | | | | | | | | | r306381 caused PR33613, by reversing the order in which insertelements were generated per unroll part. This patch fixes PR33613 by retraining this order, placing each set of insertelements per part immediately after the last scalar being packed for this part. Includes a test case derived from PR33613. Reference: https://bugs.llvm.org/show_bug.cgi?id=33613 Differential Revision: https://reviews.llvm.org/D34760 llvm-svn: 306575
* [Dominators] Move IDoms out of DominatorTreeBase and put them in SNCAInfoJakub Kuderski2017-06-282-22/+21
| | | | | | | | | | | | | | Summary: The temporary IDoms map was used only during DomTree calculation. We can move it to SNCAInfo so that it's no longer a DominatorTreeBase member. Reviewers: sanjoy, dberlin, chandlerc Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34317 llvm-svn: 306574
* Fix PR33625.Rafael Espindola2017-06-282-1/+13
| | | | | | We were failing to convert this expression to pcrel. llvm-svn: 306573
* [Dominators] Move InfoRec outside of DominatorTreeBaseJakub Kuderski2017-06-282-66/+68
| | | | | | | | | | | | | | | | | Summary: The InfoRec struct is used only during tree construction, so there is no point having it as a DominatorTreeBase member. This patch moves it into the Calculate function instead and makes it pass it to its helper functions. Reviewers: sanjoy, dberlin, chandlerc Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34305 llvm-svn: 306572
* [BBVectorize] Regenerate simple testsSimon Pilgrim2017-06-284-578/+609
| | | | llvm-svn: 306571
* Don't repeat name in comment and format. NFC.Rafael Espindola2017-06-281-19/+15
| | | | llvm-svn: 306568
* Another test commit.Chih-Hung Hsieh2017-06-281-4/+4
| | | | llvm-svn: 306567
* [LoopUnroll] Fix bug in computeUnrollCount causing it to not honor MaxCountGeoff Berry2017-06-282-0/+33
| | | | | | | | | | Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper Subscribers: mcrosier, llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D34532 llvm-svn: 306564
* [InstCombine] add tests for icmp with bswapped operands; NFCSanjay Patel2017-06-281-0/+30
| | | | llvm-svn: 306563
* [Dominators] Move number to node mapping out of DominatorTreeBaseJakub Kuderski2017-06-282-36/+38
| | | | | | | | | | | | | | Summary: Number to node mapping in DominatorTreeBase is used only during calculation, so there is no point keeping is as a member variable. This patch moves this mapping to Calculate function and passes it to helper functions. It also makes the name more descriptive. Reviewers: sanjoy, dberlin, davide, chandlerc Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34295 llvm-svn: 306562
* [InstCombine] use local variable to reduce code; NFCISanjay Patel2017-06-281-18/+14
| | | | llvm-svn: 306560
* Rangify loops, formatting changes, use bool instead of unsigned, NFCKrzysztof Parzyszek2017-06-281-18/+16
| | | | llvm-svn: 306557
* Don't repeat names and reformat. NFC.Rafael Espindola2017-06-281-46/+37
| | | | llvm-svn: 306556
* [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.Geoff Berry2017-06-2817-37/+48
| | | | | | | | | | Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper Subscribers: jholewinski, arsenm, mzolotukhin, nemanjai, nhaehnle, javed.absar, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D34531 llvm-svn: 306554
* Missed a check for UndefVI in r306466Krzysztof Parzyszek2017-06-282-1/+50
| | | | llvm-svn: 306553
* [globalisel][tablegen] Post-commit review nits for r306388. NFCDaniel Sanders2017-06-281-37/+31
| | | | | | One early exit and a missing assert string. llvm-svn: 306552
* [AArch64] AArch64CondBrTuningPass generates wrong branch instructionsAlexandros Lamprineas2017-06-282-7/+7
| | | | | | | | | | | Some conditional branch instructions generated by this pass are checking the wrong condition code. The instructions TBZ and TBNZ are transformed into B.GE and B.LT instead of B.PL and B.MI respectively. They should only be checking the Negative bit. Differential Revision: https://reviews.llvm.org/D34743 llvm-svn: 306550
* Don't repeat name in comments. 80 columns. NFC.Rafael Espindola2017-06-281-22/+16
| | | | llvm-svn: 306548
* [ARM] Improve if-conversion for M-class CPUs without branch predictorsJohn Brawn2017-06-286-14/+239
| | | | | | | | | | | | | The current heuristic in isProfitableToIfCvt assumes we have a branch predictor, and so gives the wrong answer in some cases when we don't. This patch adds a subtarget feature to indicate that a subtarget has no branch predictor, and changes the heuristic in isProfitableToiIfCvt when it's present. This gives a slight overall improvement in a set of embedded benchmarks on Cortex-M4 and Cortex-M33. Differential Revision: https://reviews.llvm.org/D34398 llvm-svn: 306547
* [X86] Added BSWAP tests for illegal i64/i128/i256 'wide' scalar integersSimon Pilgrim2017-06-281-0/+173
| | | | llvm-svn: 306546
* [X86][SSE] Dropped -mcpu from vector bswap testsSimon Pilgrim2017-06-281-7/+4
| | | | | | Use triple and attribute only for consistency llvm-svn: 306545
* [globalisel][tablegen] Multiple 80-col corrections.Daniel Sanders2017-06-281-20/+41
| | | | llvm-svn: 306544
* [X86][LLVM][test]Expanding Supports lowerInterleavedStore() in ↵Michael Zuckerman2017-06-281-0/+58
| | | | | | | | | X86InterleavedAccess test. Exapnding the test to include AVX target. Adding base tast (to trunk) for Store strid=4 vf=32. llvm-svn: 306543
* Create inliner params based on size and opt levels.Easwaran Raman2017-06-281-3/+11
| | | | | | Differential revision: https://reviews.llvm.org/D34309 llvm-svn: 306542
* Add zero-length check to memcpy/memset load store loop expansionTeresa Johnson2017-06-282-5/+16
| | | | | | | | | | | | | | | | Summary: I was testing using this expansion logic in other cases besides NVPTX, and found some runtime failures due to the lack of a check for a zero length memcpy/memset before the loop. There is already such a check in the memmove expansion code though. Reviewers: hfinkel Subscribers: jholewinski, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D34707 llvm-svn: 306541
* [GlobalISel][X86] Test G_CONSTANT i32 0 TableGen'erated selection.NFC.Igor Breger2017-06-281-0/+21
| | | | llvm-svn: 306537
* Revert r306528Nikolai Bozhenov2017-06-282-1/+10
| | | | llvm-svn: 306536
* [GlobalISel][X86] Support bitwise operations : G_AND, G_OR, G_XORIgor Breger2017-06-2811-2/+1100
| | | | | | | | | | | | | | Summary: Support G_AND, G_OR, G_XOR for i8/i16/i32/i64. Selection done via TableGen'erated code. Reviewers: zvi, guyblank, aymanmus, m_zuckerman Reviewed By: aymanmus Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34605 llvm-svn: 306533
* Reverting commit 306414 on behalf of @gadi.haberMichael Zuckerman2017-06-2832-9532/+5254
| | | | llvm-svn: 306532
* [X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics testsSimon Pilgrim2017-06-2810-384/+364
| | | | | | Use triple and attribute only for consistency llvm-svn: 306531
* [X86] Correct dwarf unwind information in function epiloguePetar Jovanovic2017-06-2874-266/+1846
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CFI instructions that set appropriate cfa offset and cfa register are now inserted in emitEpilogue() in X86FrameLowering. Majority of the changes in this patch: 1. Ensure that CFI instructions do not affect code generation. 2. Enable maintaining correct information about cfa offset and cfa register in a function when basic blocks are reordered, merged, split, duplicated. These changes are target independent and described below. Changed CFI instructions so that they: 1. are duplicable 2. are not counted as instructions when tail duplicating or tail merging 3. can be compared as equal Add information to each MachineBasicBlock about cfa offset and cfa register that are valid at its entry and exit (incoming and outgoing CFI info). Add support for updating this information when basic blocks are merged, split, duplicated, created. Add a verification pass (CFIInfoVerifier) that checks that outgoing cfa offset and register of predecessor blocks match incoming values of their successors. Incoming and outgoing CFI information is used by a late pass (CFIInstrInserter) that corrects CFA calculation rule for a basic block if needed. That means that additional CFI instructions get inserted at basic block beginning to correct the rule for calculating CFA. Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D18046 llvm-svn: 306529
* [ValueTracking] Enabling existing ValueTracking patch by default.Nikolai Bozhenov2017-06-282-10/+1
| | | | | | | | | | | | | | | The original patch was an improvement to IR ValueTracking on non-negative integers. It has been checked in to trunk (D18777, r284022). But was disabled by default due to performance regressions. Perf impact has improved. The patch would be enabled by default. Reviewers: reames Differential Revision: https://reviews.llvm.org/D34101 Patch by: Olga Chupina <olga.chupina@intel.com> llvm-svn: 306528
* [InstCombine] Canonicalize clamp of float types to minmax in fast mode.Nikolai Bozhenov2017-06-284-31/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This commit allows matchSelectPattern to recognize clamp of float arguments in the presence of FMF the same way as already done for integers. This case is a little different though. With integers, given the min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX "automatically". That is not the case for float, because for them only full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care about NaNs. On the other hand, some backends (e.g. X86) have only FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM nodes are illegal thus selection is not happening. So I decided to do such kind of transformation in IR (InstCombiner) instead of complicating the logic in the backend. Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper Reviewed By: efriedma Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D33186 llvm-svn: 306525
* Add tests to document current InstCombine behavior for clamp pattern.Nikolai Bozhenov2017-06-281-0/+500
| | | | | | | | | | | | | | | | | | | Summary: This commit adds the tests for clamp pattern as a prerequisite of D33186 to make the impact of that fix more clear and also to document current behavior. Reviewers: spatel, jmolloy Reviewed By: spatel Subscribers: n.bozhenov, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D34350 llvm-svn: 306524
* [DebugInfo] - Removed trailing whitespaces. NFC.George Rimar2017-06-281-68/+68
| | | | llvm-svn: 306518
* Recommit "[ELF] - Add ability for DWARFContextInMemory to exit early when ↵George Rimar2017-06-284-11/+81
| | | | | | | | | | | | | | | | | | | | | any error happen." With fix in include folder character case: #include "llvm/Codegen/AsmPrinter.h" -> #include "llvm/CodeGen/AsmPrinter.h" Original commit message: Change introduces error reporting policy for DWARFContextInMemory. New callback provided by client is able to handle error on it's side and return Halt or Continue. That allows to either keep current behavior when parser prints all errors but continues parsing object or implement something very different, like stop parsing on a first error and report an error in a client style. Differential revision: https://reviews.llvm.org/D34328 llvm-svn: 306517
* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-2848-414/+406
| | | | | | | | | | | | | | | | The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514
* Revert r306512 "[ELF] - Add ability for DWARFContextInMemory to exit early ↵George Rimar2017-06-284-81/+11
| | | | | | | | | | | | | | | | | when any error happen." It broke BB: [13/106] 13 0.022 Generating VCSRevision.h [25/106] 24 1.209 Building CXX object unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o FAILED: unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o /home/bb/bin/g++ -DGTEST_HAS_RTTI=0 -DLLVM_BUILD_GLOBAL_ISEL -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Iunittests/DebugInfo/DWARF -I../llvm-project/llvm/unittests/DebugInfo/DWARF -Iinclude -I../llvm-project/llvm/include -I../llvm-project/llvm/utils/unittest/googletest/include -I../llvm-project/llvm/utils/unittest/googlemock/include -fPIC -fvisibility-inlines-hidden -m32 -std=c++11 -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wdelete-non-virtual-dtor -Wno-comment -ffunction-sections -fdata-sections -O3 -UNDEBUG -Wno-variadic-macros -fno-exceptions -fno-rtti -MD -MT unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o -MF unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o.d -o unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o -c ../llvm-project/llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp ../llvm-project/llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp:18:37: fatal error: llvm/Codegen/AsmPrinter.h: No such file or directory #include "llvm/Codegen/AsmPrinter.h" ^ compilation terminated. llvm-svn: 306513
* [ELF] - Add ability for DWARFContextInMemory to exit early when any error ↵George Rimar2017-06-284-11/+81
| | | | | | | | | | | | | | | | happen. Change introduces error reporting policy for DWARFContextInMemory. New callback provided by client is able to handle error on it's side and return Halt or Continue. That allows to either keep current behavior when parser prints all errors but continues parsing object or implement something very different, like stop parsing on a first error and report an error in a client style. Differential revision: https://reviews.llvm.org/D34328 llvm-svn: 306512
* [InstCombine] Add test case demonstrating that we don't handle icmp eq ↵Craig Topper2017-06-281-0/+21
| | | | | | (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC llvm-svn: 306510
* Revert r306508 "[InstCombine] Add test case demonstrating that we don't ↵Craig Topper2017-06-282-22/+0
| | | | | | | | handle icmp eq (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC" I accidentally had a extra change in there. llvm-svn: 306509
* [InstCombine] Add test case demonstrating that we don't handle icmp eq ↵Craig Topper2017-06-282-0/+22
| | | | | | (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC llvm-svn: 306508
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