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* [Support/ELFRelocs] Add R_386_GOT32X.Davide Italiano2016-04-251-1/+2
| | | | | | | | The new relocation recently defined in the Intel386 psABI was still missing from this file. A subsequent commit will add support for GOT32X in MC, together with a test. llvm-svn: 267378
* [X86] Replace a SmallVector used to pass 2 values to an ArrayRef parameter ↵Craig Topper2016-04-251-3/+1
| | | | | | with a fixed size array. NFC llvm-svn: 267377
* Minor code cleanups. NFC.Junmo Park2016-04-254-23/+23
| | | | llvm-svn: 267375
* [X86] Add a complete set of tests for all operand sizes of cttz/ctlz with ↵Craig Topper2016-04-251-6/+123
| | | | | | and without zero undef being lowered to bsf/bsr. llvm-svn: 267373
* Verifier: Verify that each inlinable callsite of a debug-info-bearing functionAdrian Prantl2016-04-244-2/+75
| | | | | | | | | | | | | in a debug-info-bearing function has a debug location attached to it. Failure to do so causes an "!dbg attachment points at wrong subprogram for function" assertion failure when the inliner sets up inline scope info. rdar://problem/25878916 This reaplies r267320 without changes after fixing an issue in the OpenMP IR generator in clang. llvm-svn: 267370
* Also check the IR.Rafael Espindola2016-04-241-0/+4
| | | | llvm-svn: 267367
* Add a test for how we handle protected visibility.Rafael Espindola2016-04-242-0/+22
| | | | llvm-svn: 267366
* [X86][AVX] Added PR24935 test caseSimon Pilgrim2016-04-241-0/+39
| | | | llvm-svn: 267362
* ARM: fix __chkstk Frame Setup on WoASaleem Abdulrasool2016-04-246-11/+13
| | | | | | | | | | | | This corrects the MI annotations for the stack adjustment following the __chkstk invocation. We were marking the original SP usage as a Def rather than Kill. The (new) assigned value is the definition, the original reference is killed. Adjust the ISelLowering to mark Kills and FrameSetup as well. This partially resolves PR27480. llvm-svn: 267361
* Tweak comments to make it clear that these combines are for SSE scalar ↵Simon Pilgrim2016-04-241-4/+5
| | | | | | instructions. llvm-svn: 267360
* [InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is requiredSimon Pilgrim2016-04-243-11/+11
| | | | | | As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns. llvm-svn: 267359
* [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2 of 2)Simon Pilgrim2016-04-245-183/+98
| | | | | | | | | | | | | | | | Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND). 2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements 3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns). Differential Revision: http://reviews.llvm.org/D19318 llvm-svn: 267357
* [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 1 of 2)Simon Pilgrim2016-04-244-145/+126
| | | | | | | | | | | | This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - recognise that we only need the lowest element of the second input for binary scalar operations (and all the elements of the first input) 2 - recognise that the roundss/roundsd intrinsics use the lowest element of the second input and the remaining elements from the first input Differential Revision: http://reviews.llvm.org/D17490 llvm-svn: 267356
* [InstCombine] Avoid updating argument demanded elements in separate passes.Simon Pilgrim2016-04-241-7/+15
| | | | | | As discussed on D17490, we should attempt to update an intrinsic's arguments demanded elements in one pass if we can. llvm-svn: 267355
* Fix typo in comment. NFCNick Lewycky2016-04-241-1/+1
| | | | llvm-svn: 267354
* Remove emacs mode markers from .cpp files. NFCNick Lewycky2016-04-242-2/+2
| | | | | | .cpp files are unambiguously C++, you only need the mode markers on .h files. llvm-svn: 267353
* [X86][InstCombine] Tidyup VPERMILVAR -> shufflevector conversion to helper ↵Simon Pilgrim2016-04-241-36/+47
| | | | | | function. NFCI. llvm-svn: 267352
* [X86][InstCombine] Tidyup PSHUFB -> shufflevector conversion to helper ↵Simon Pilgrim2016-04-241-40/+45
| | | | | | function. NFCI. llvm-svn: 267351
* [X86][SSE] getTargetShuffleMaskIndices - dropped (unused) UNDEF handlingSimon Pilgrim2016-04-241-5/+0
| | | | | | We aren't currently making use of this in any successful mask decode and its actually incorrect as it inserts the wrong number of SM_SentinelUndef mask elements. llvm-svn: 267350
* [X86][SSE] Use range loop. NFCI.Simon Pilgrim2016-04-241-3/+2
| | | | llvm-svn: 267349
* [Lanai] Use EVT::getEVTString() to print a type as a string instead of an ↵Craig Topper2016-04-241-1/+1
| | | | | | enum encoding value. llvm-svn: 267348
* [X86][SSE] Added SSSE3/AVX/AVX2 BITREVERSE testsSimon Pilgrim2016-04-241-52/+14603
| | | | | | Codegen is pretty bad at the moment but could use PSHUFB quite efficiently llvm-svn: 267347
* [X86][XOP] Fixed VPPERM permute op decoding (PR27472).Simon Pilgrim2016-04-242-2/+2
| | | | | | Fixed issue with VPPERM target shuffle mask decoding that was incorrectly masking off the 3-bit permute op with a 2-bit mask. llvm-svn: 267346
* BitcodeReader: Delay metadata parsing until reading a function bodyDuncan P. N. Exon Smith2016-04-241-3/+7
| | | | | | | | | | | | There's hardly any functionality change here. Instead of calling materializeMetadata on the first call to materialize(GlobalValue*), wait until the first one that's actually going to do something. Noticed by inspection; I don't have a concrete case where this makes a difference. Added an assertion in materializeMetadata to be sure this (or a future change) doesn't delay materializeMetadata after function-level metadata. llvm-svn: 267345
* [ThinLTO] Remove GlobalValueInfo class from indexTeresa Johnson2016-04-248-266/+197
| | | | | | | | | | | | | | | | Summary: Remove the GlobalValueInfo and change the ModuleSummaryIndex to directly reference summary objects. The info structure was there to support lazy parsing of the combined index summary objects, which is no longer needed and not supported. Reviewers: joker.eph Subscribers: joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19462 llvm-svn: 267344
* [X86][SSE] Improved support for decoding target shuffle masks through bitcastsSimon Pilgrim2016-04-243-33/+29
| | | | | | | | Reused the ability to split constants of a type wider than the shuffle mask to work with masks generated from scalar constants transfered to xmm. This fixes an issue preventing PSHUFB target shuffle masks decoding rematerialized scalar constants and also exposes the XOP VPPERM bug described in PR27472. llvm-svn: 267343
* ModuleSummaryIndex: Avoid enum bitfields for MSVC portabilityDuncan P. N. Exon Smith2016-04-241-2/+4
| | | | | | | | Enum bitfields have crazy portability issues with MSVC. Use unsigned instead of LinkageTypes here in the ModuleSummaryIndex to address Takumi's concerns from r267335. llvm-svn: 267342
* Revert "Declare GlobalValue::LinkageTypes based on unsigned."Duncan P. N. Exon Smith2016-04-241-1/+1
| | | | | | | | | | | This reverts commit r267335. The build has been broken for hours because of it: http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/23352/ The correct fix is avoid using any enum in a bitfield. llvm-svn: 267341
* [SystemZ] [SSP] Add support for LOAD_STACK_GUARD.Marcin Koscielnicki2016-04-245-0/+87
| | | | | | | | | | | | | | This fixes PR22248 on s390x. The previous attempt at this was D19101, which was before LOAD_STACK_GUARD existed. Compared to the previous version, this always emits a rather ugly block of 4 instructions, involving a thread pointer load that can't be shared with other potential users. However, this is necessary for SSP - spilling the guard value (or thread pointer used to load it) is counter to the goal, since it could be overwritten along with the frame it protects. Differential Revision: http://reviews.llvm.org/D19363 llvm-svn: 267340
* [X86][SSE] Demonstrate issue with decoding shuffle masks that have been ↵Simon Pilgrim2016-04-242-0/+37
| | | | | | | | lowered as rematerialized constants on scalar unit Found whilst investigating PR27472 llvm-svn: 267339
* Silence two C4806 warnings ('|': unsafe operation: no value of type 'bool' ↵Aaron Ballman2016-04-241-2/+2
| | | | | | promoted to type 'const unsigned int' can equal the given constant). The fact that they trigger with this code seems like it may be a bug, but the warning itself is still generally useful enough to retain it for now. llvm-svn: 267337
* Declare GlobalValue::LinkageTypes based on unsigned.NAKAMURA Takumi2016-04-241-1/+1
| | | | | | Or, "LinkageTypes Linkage : 4;" might be sign-extended on msc. llvm-svn: 267335
* llvm/test/tools/gold/X86/thinlto.ll: Possible fix corresponding to r267318.NAKAMURA Takumi2016-04-241-0/+1
| | | | llvm-svn: 267334
* BitcodeReader: Fix some holes in upgrade from r267296Duncan P. N. Exon Smith2016-04-243-9/+31
| | | | | | | | | | | | | | Add tests for some missing cases to bitcode upgrade in r267296. - DICompositeType with an 'elements:' field, which will cause it to be involved in a cycle after the upgrade. - A DIDerivedType that references a class in 'extraData:'. I updated test/Bitcode/dityperefs-3.8.ll with the missing cases and regenerated test/Bitcode/dityperefs-3.8.ll.bc. llvm-svn: 267332
* [X86] Merge LowerCTLZ and LowerCTLZ_ZERO_UNDEF into a single function that ↵Craig Topper2016-04-241-38/+16
| | | | | | branches internally for the one difference, allowing the rest of the code to be common. NFC llvm-svn: 267331
* [X86] Node need to check if AVX512 is supported when lowering vector CTLZ. ↵Craig Topper2016-04-241-7/+5
| | | | | | The CTLZ operation is only Custom for vectors if AVX512 is enabled so if a vector gets here AVX512 is implied. NFC llvm-svn: 267330
* Add "hasSection" flag in the SummaryMehdi Amini2016-04-244-5/+32
| | | | | | | | | | | Reviewers: tejohnson Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19405 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267329
* [MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)Gerolf Hoflehner2016-04-2412-39/+892
| | | | | | | | | | | | | | | | | | | The original patch caused crashes because it could derefence a null pointer for SelectionDAGTargetInfo for targets that do not define it. Evaluates fmul+fadd -> fmadd combines and similar code sequences in the machine combiner. It adds support for float and double similar to the existing integer implementation. The key features are: - DAGCombiner checks whether it should combine greedily or let the machine combiner do the evaluation. This is only supported on ARM64. - It gives preference to throughput over latency: the heuristic used is to combine always in loops. The targets decides whether the machine combiner should optimize for throughput or latency. - Supports for fmadd, f(n)msub, fmla, fmls patterns - On by default at O3 ffast-math llvm-svn: 267328
* [X86] Remove isel patterns for selecting tzcnt/lzcnt from ↵Craig Topper2016-04-241-80/+0
| | | | | | cmove/ne+cttz/ctlz. These are folded by DAG combine now. llvm-svn: 267326
* [CodeGen] Teach DAG combine to fold select_cc seteq X, 0, sizeof(X), ↵Craig Topper2016-04-241-0/+35
| | | | | | | | ctlz_zero_undef(X) -> ctlz(X). InstCombine already does this for IR and X86 pattern matches this during isel. A follow up commit will remove the X86 patterns to allow this to be tested. llvm-svn: 267325
* Fix an assertion that can never fire because the condition ANDed with the ↵Craig Topper2016-04-241-1/+1
| | | | | | string is just true or 1. llvm-svn: 267324
* Revert "Verifier: Verify that each inlinable callsite of a ↵Adrian Prantl2016-04-244-75/+2
| | | | | | | | debug-info-bearing function" This reverts commit r267320 while investigating an OpenMP buildbot failure. llvm-svn: 267322
* Verifier: Verify that each inlinable callsite of a debug-info-bearing functionAdrian Prantl2016-04-244-2/+75
| | | | | | | | | | in a debug-info-bearing function has a debug location attached to it. Failure to do so causes an "!dbg attachment points at wrong subprogram for function" assertion failure when the inliner sets up inline scope info. rdar://problem/25878916 llvm-svn: 267320
* Reorganize GlobalValueSummary with a "Flags" bitfield.Mehdi Amini2016-04-248-85/+118
| | | | | | | | | | Right now it only contains the LinkageType, but will be extended with "hasSection", "isOptSize", "hasInlineAssembly", etc. Differential Revision: http://reviews.llvm.org/D19404 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267319
* Add a version field in the bitcode for the summaryMehdi Amini2016-04-2411-1/+46
| | | | | | | Differential Revision: http://reviews.llvm.org/D19456 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267318
* Add an internalization step to the ThinLTOCodeGeneratorMehdi Amini2016-04-244-22/+220
| | | | | | | | | | | | | Keeping as much as possible internal/private is known to help the optimizer. Let's try to benefit from this in ThinLTO. Note: this is early work, but is enough to build clang (and all the LLVM tools). I still need to write some lit-tests... Differential Revision: http://reviews.llvm.org/D19103 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267317
* Fix a couple assertions that can never fire because they just contained the ↵Craig Topper2016-04-242-2/+2
| | | | | | text string which always evaluates to true. Add a ! so they'll evaluate to false. llvm-svn: 267312
* [X86] Fix patterns that turn cmove/cmovne+ctlz/cttz into lzcnt/tzcnt ↵Craig Topper2016-04-242-239/+24
| | | | | | instructions. Only one of the conditions should be valid for each pattern, not both. Update tests accordingly. llvm-svn: 267311
* [RuntimeDyldELF] Handle GOTPCRELX/REX_GOTPCRELX.Davide Italiano2016-04-242-1/+13
| | | | llvm-svn: 267309
* [MC/ELF] Make the relaxation test more interesting.Davide Italiano2016-04-241-0/+2
| | | | | | Add a case where we can't relax. llvm-svn: 267308
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