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* Verifier: Change Assert to AssertDI.Adrian Prantl2017-03-061-3/+3
| | | | | | | This error can be recovered from by stripping debug info. This is NFC for +asserts builds. llvm-svn: 297072
* [ObjectYAML] NFC. Refactor DWARFYAML CompileUnit dump codeChris Bieneman2017-03-064-122/+324
| | | | | | | | | | | | Summary: This patch refactors the DWARFYAML code for dumping compile units to use a visitor pattern. Using this design will, in the future, enable the DWARF YAML code to perform analysis and mutations of the DWARF DIEs. An example of such mutations would be calculating the length of a compile unit and updating the CU's Length field before writing the DIE. This support will make it easier to craft or modify DWARF tests by hand. Reviewers: lhames Subscribers: mgorny, fhahn, jgosnell, aprantl, llvm-commits Differential Revision: https://reviews.llvm.org/D30357 llvm-svn: 297067
* Test commit. Added a blank line.Jessica Paquette2017-03-061-0/+1
| | | | llvm-svn: 297064
* Revert r297039, it's causing some mysterious buildbot failuresKrzysztof Parzyszek2017-03-062-44/+4
| | | | llvm-svn: 297062
* AMDGPU/R600: Fix ALU clause markers use detectionJan Vesely2017-03-062-4/+7
| | | | | | | | also exit early on kill instead of redefinition. Differential Revision: https://reviews.llvm.org/D30230 llvm-svn: 297060
* NewGVN: We were not really failing this testcase, because the instructions ↵Daniel Berlin2017-03-061-7/+12
| | | | | | it was looking for are unused. GVN value numbers unused instructions, NewGVN does not. Fix the instructions to be used, so we eliminate the redundancies it's checking for, and un-XFAIL it llvm-svn: 297058
* [DWARF] NFC. A few bits of minor code cleanup.Chris Bieneman2017-03-063-13/+0
| | | | | | | | David Blaikie pointed out that the `setForceChildren` API is no longer needed and should be removed from the DWARF Generator APIs. Also the DWARFDebugInfoTest file had some copy pasted comments that are not relevant. I've removed them. llvm-svn: 297056
* [opt-diff] Fix the case when the script is invoked with directoriesAdam Nemet2017-03-061-1/+3
| | | | llvm-svn: 297055
* [IfConversion] Only renormalize probabilities if branches are analyzableKrzysztof Parzyszek2017-03-062-2/+40
| | | | | | | | | | | If a block has non-analyzable branches, the listed successors don't need to add up to one. For example, if a block has a conditional tail call, that tail call will not have a corresponding successor in the successor list, but will still be a possible branch. Differential Revision: https://reviews.llvm.org/D30556 llvm-svn: 297054
* [InstSimplify] refactor related div/rem folds; NFCISanjay Patel2017-03-061-47/+37
| | | | llvm-svn: 297052
* GlobalISel: don't emit degenerate G_INSERT instructions.Tim Northover2017-03-063-0/+48
| | | | | | | | | | | Before, we were producing G_INSERT instructions that were actually closer to a cast or even a COPY when both input and output sizes are the same. This doesn't really make sense and means that everything interpreting a G_INSERT also has to handle all these kinds of casts. So now we detect these degenerate cases and emit real casts instead. llvm-svn: 297051
* [InstSimplify] add tests for vector div/rem with UB potential; NFCSanjay Patel2017-03-062-0/+84
| | | | llvm-svn: 297048
* NewGVN: Remove DebugUnknownExprs, just mark the instructions as unusedDaniel Berlin2017-03-061-7/+3
| | | | llvm-svn: 297047
* NewGVN: Only call isInstructionTrivially dead once per instruction.Daniel Berlin2017-03-061-9/+10
| | | | llvm-svn: 297046
* [X86] Fix arg copy elision for illegal typesReid Kleckner2017-03-062-41/+35
| | | | | | | | | | | Use the store size of the argument type, which will be a byte-sized quantity, rather than dividing the size in bits by 8. Fixes PR32136 and re-enables copy elision from i64 arguments. Reverts the workaround in from r296950. llvm-svn: 297045
* GlobalISel: add buildUndef method to MachineIRBuilder. NFC.Tim Northover2017-03-063-1/+8
| | | | llvm-svn: 297044
* GlobalISel: refactor legalization of G_INSERT.Tim Northover2017-03-064-48/+47
| | | | | | | | Now that G_INSERT instructions can only insert one register, this code was overly general. In another direction it didn't handle registers that crossed split boundaries properly, which needed to be fixed. llvm-svn: 297042
* [InstSimplify] regenerate checks; NFCSanjay Patel2017-03-062-16/+16
| | | | llvm-svn: 297040
* [TableGen] Ensure proper ordering of subtarget feature namesKrzysztof Parzyszek2017-03-062-4/+44
| | | | llvm-svn: 297039
* Remove the sample pgo annotation heuristic that uses call count to annotate ↵Dehao Chen2017-03-064-28/+11
| | | | | | | | | | | | | | | | basic block count. Summary: We do not need that special handling because the debug info is more accurate now. Performance testing shows no regression on google internal benchmarks. Reviewers: davidxl, aprantl Reviewed By: aprantl Subscribers: llvm-commits, aprantl Differential Revision: https://reviews.llvm.org/D30658 llvm-svn: 297038
* [Hexagon] Early-if-convert branches that may exit the loopKrzysztof Parzyszek2017-03-063-64/+198
| | | | | | | | | | | | | | | | Merge the tail block into the loop in cases where the main loop body exits early, subject to profitability constraints. This will coalesce the loop body into fewer blocks. For example: loop: loop: // loop body // loop body if (...) jump exit --> // more body more: if (...) jump exit // more body jump loop jump loop llvm-svn: 297033
* [Hexagon] Mark dead defs as <dead> in expand-condsetsKrzysztof Parzyszek2017-03-063-12/+127
| | | | | | | | | The code in updateDeadFlags removed unnecessary <dead> flags, but there can be cases where such a flag is not set, and yet a register has become dead. For example, if a mux with identical inputs is replaced with a COPY, the predicate register may no longer be used after that. llvm-svn: 297032
* [Hexagon] Pick a dot-old instruction that matches the architectureKrzysztof Parzyszek2017-03-064-4/+135
| | | | llvm-svn: 297031
* [InstSimplify] remove misleading comments; NFCSanjay Patel2017-03-061-2/+2
| | | | | | Div/rem-of-0 does not cause faults/undef (not the same as div/rem-by-0). llvm-svn: 297029
* [DAGCombiner] simplify div/rem-by-0Sanjay Patel2017-03-063-206/+26
| | | | | | | | | | | | | | | | | Refactoring of duplicated code and more fixes to follow. This is motivated by the post-commit comments for r296699: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170306/435182.html Ie, we can crash if we're missing obvious simplifications like this that exist in the IR simplifier or if these occur later than expected. The x86 change for non-splat division shows a potential opportunity to improve vector codegen: we assumed that since only one lane had meaningful results, we should do the math in scalar. But that means moving back and forth from vector registers. llvm-svn: 297026
* [SLP] A test for vectorization of users of extractelement instructions,Alexey Bataev2017-03-061-3/+38
| | | | | | NFC. llvm-svn: 297024
* Fix minor typo introduce in r297014Tobias Grosser2017-03-061-1/+1
| | | | llvm-svn: 297020
* Silence a warning "hiding virtual function".Vassil Vassilev2017-03-061-0/+1
| | | | llvm-svn: 297018
* [x86] add tests to show missing div/rem simplifications; NFCSanjay Patel2017-03-061-0/+185
| | | | | | | These are not x86-specific, but the problem is not visible for all targets because it is masked by other transforms. These can lead to compiler crashes. llvm-svn: 297017
* [BasicBlockUtils] Check for nullptr before updating LoopInfo.Michael Kruse2017-03-061-3/+4
| | | | | | | | | | | | | | | | LoopInfo::getLoopFor returns nullptr if a BB is not in a loop and only then can the loop be updated to contain the newly created BBs. Add the missing nullptr check to SplitBlockAndInsertIfThen. Within LLVM, the only user of this function that also passes a LoopInfo to be updated is InnerLoopVectorizer::predicateInstructions(). As the method's name implies, the BB operataten on will always be within a loop, but out-of-tree users may also use it differently (here: Polly). All other uses of LoopInfo::getLoopFor in the file properly check its return value for nullptr. llvm-svn: 297016
* [DAG] fix formatting; NFCSanjay Patel2017-03-061-2/+1
| | | | llvm-svn: 297015
* New Test-Case for Region AnalysisTobias Grosser2017-03-061-0/+39
| | | | | | | | | | | | | | | While working on improvements to region info analysis, this test case caused an incorrect region bb2 => bb3 to be detected. Reviewers: grosser Contributed-by: Nandini Singhal <cs15mtech01004@iith.ac.in> Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30652 llvm-svn: 297014
* [DAG] fix typo in comment; NFCSanjay Patel2017-03-061-1/+1
| | | | llvm-svn: 297011
* CMake: Add a build target for generating a source RPMTom Stellard2017-03-061-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: 'make srpm' or 'ninja srpm' will tar up the current source code and then build a source RPM package. By default it will use the llvm.spec file to generate the source RPM, but you can specify your own custom spec file with the LLVM_SRPM_USER_BINARY_SPECFILE option. CMake will perform variable substitution on your custom specfile, so you can reference CMake variables in it. For example: Version: @LLVM_RPM_SPEC_VERSION@ Note that everything in the source directory will be included in the tarball so if you have a clang check out in tools/clang, then all the clang source will end up in the tarball to. It is recommended to only use this build target with a clean source tree. Reviewers: beanz Reviewed By: beanz Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D30093 llvm-svn: 297007
* [PowerPC] Fix failure with STBRX when store is narrower than the bswapNemanja Ivanovic2017-03-062-2/+64
| | | | | | | | | | | Fixes a crash caused by r296811 by truncating the input of the STBRX node when the bswap is wider than i32. Fixes https://bugs.llvm.org/show_bug.cgi?id=32140 Differential Revision: https://reviews.llvm.org/D30615 llvm-svn: 297001
* [XRay] Allow logging the first argument of a function call.Dean Michael Berris2017-03-063-0/+39
| | | | | | | | | | | | | | | | | | | Summary: Functions with the "xray-log-args" attribute will have a special XRay sled kind emitted, for compiler-rt to copy any call arguments to your logging handler. For practical and performance reasons, only the first argument is supported, and only up to 64 bits. Reviewers: dberris Reviewed By: dberris Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29702 llvm-svn: 296998
* [APInt] Move operator~ out of line to make it better able to reused memory ↵Craig Topper2017-03-062-11/+32
| | | | | | | | | | | | | | | | | | | allocation from temporary objects Summary: This makes operator~ take the APInt by value so if it came from a temporary APInt the move constructor will get invoked and it will be able to reuse the memory allocation from the temporary. This is similar to what was already done for 2s complement negation. Reviewers: hans, davide, RKSimon Reviewed By: davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30614 llvm-svn: 296997
* [APInt] Remove add and sub functions from APIntOps namespace.Craig Topper2017-03-061-10/+0
| | | | | | They aren't used in tree and using the overloaded operators has more optimization opportunities. llvm-svn: 296995
* [APInt] Remove unused And/Or/Xor methods. They just forward to the ↵Craig Topper2017-03-061-17/+0
| | | | | | | | corresponding operator overload. I plan to enhance the operator overloads to handle rvalues and these methods would not longer be optimal to use. llvm-svn: 296993
* [SCEV] Decrease the recursion threshold for CompareValueComplexitySanjoy Das2017-03-052-7/+48
| | | | | | | | | | Fixes PR32142. r287232 accidentally increased the recursion threshold for CompareValueComplexity from 2 to 32. This change reverses that change by introducing a separate flag for CompareValueComplexity's threshold. llvm-svn: 296992
* [APInt] Remove the And/Or/Xor/Not functions from the APIntOps namespace.Craig Topper2017-03-051-21/+0
| | | | | | | | | | | | | | | | | Summary: They aren't used anywhere in tree and its preferable to use the &, |, ^, or ~ operators. With my patch to add rvalue reference support to &, |, ^ operators it also becomes less performant to use these functions. Reviewers: RKSimon, davide, hans Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30613 llvm-svn: 296990
* [SelectionDAG] Fix vector splitting for *_EXTEND_VECTOR_INREG instructionsSimon Pilgrim2017-03-052-1/+53
| | | | | | Found by fuzz testing after rL296985 landed llvm-svn: 296989
* New Test-Case for Region AnalysisTobias Grosser2017-03-051-0/+33
| | | | | | | | | | | | | | | | | | While working on improvements to the region info analysis, this test case caused an incorrect region 1 => 2 to be detected. It is incorrect because entry has an outgoing edge to 3. This is interesting because 1 dom 2 and 2 pdom 1, which should have been enough to prevent incoming forward edges into the region and outgoing forward edges from the region. Reviewers: grosser Subscribers: llvm-commits Contributed-by: Nandini Singhal <cs15mtech01004@iith.ac.in> Differential Revision: https://reviews.llvm.org/D30603 llvm-svn: 296988
* [X86] Silence GCC enum compare warning.Benjamin Kramer2017-03-051-2/+2
| | | | | | | | X86ISelLowering.cpp:26506:36: error: enumeral mismatch in conditional expression: 'llvm::X86ISD::NodeType' vs 'llvm::ISD::NodeType' [-Werror=enum-compare] llvm-svn: 296986
* [X86][SSE] Lower 128-bit vectors to SIGN/ZERO_EXTEND_VECTOR_IN_REG opsSimon Pilgrim2017-03-0513-246/+296
| | | | | | | | | | | | As described on PR31712, we miss a variety of legalization combines because we lower these to X86ISD::VSEXT/VZEXT despite them having the same functionality. This patch makes 128-bit (SSE41) SIGN/ZERO_EXTEND_VECTOR_IN_REG ops legal, adds the necessary tablegen plumbing and uses a helper 'getExtendInVec' to decide when to use SIGN/ZERO_EXTEND_VECTOR_IN_REG or VSEXT/VZEXT. We're missing a couple of shuffle combines that will be added in a future patch for review. Later patches can then support the AVX2 cases as a mixture of SIGN/ZERO_EXTEND and SIGN/ZERO_EXTEND_VECTOR_IN_REG, and then finally deal with the AVX512 cases. Differential Revision: https://reviews.llvm.org/D30549 llvm-svn: 296985
* Revert commit r296967, no typoSylvestre Ledru2017-03-051-1/+1
| | | | llvm-svn: 296984
* [SimplifyCFG] Use APInt::operator| instead of APInt::Or. NFCCraig Topper2017-03-051-1/+1
| | | | | | I'm looking to improve operator| to support rvalue references and may remove APInt::Or. llvm-svn: 296982
* [DAGCombine] Use APInt::operator|(uint64_t) instead of creating a temporary ↵Craig Topper2017-03-051-6/+6
| | | | | | | | APInt and calling APInt::Or. NFC This is more efficient by itself. But this is prep for a future patch that may remove APInt::Or while making operator| support rvalue references similar to add/sub. llvm-svn: 296981
* [x86] don't require a zext when forming ADC/SBBSanjay Patel2017-03-042-36/+41
| | | | | | | | | | | | | The larger goal is to move the ADC/SBB transforms currently in combineX86SetCC() to combineAddOrSubToADCOrSBB() because we're creating ADC/SBB in lots of places where we shouldn't. This was intended to be an NFC change, but avx-512 has something strange going on. It doesn't seem like any of the affected tests should really be using SET+TEST or ADC; a simple ADD could replace several instructions. But that's another bug... llvm-svn: 296978
* [DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)Sanjay Patel2017-03-049-168/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | select Cond, C +/- 1, C --> add(ext Cond), C -- with a target hook. This is part of the ongoing process to obsolete D24480. The motivation is to canonicalize to select IR in InstCombine whenever possible, so we need to have a way to undo that easily in codegen. PowerPC is an obvious winner for this kind of transform because it has fast and complete bit-twiddling abilities but generally lousy conditional execution perf (although this might have changed in recent implementations). x86 also sees some wins, but the effect is limited because these transforms already mostly exist in its target-specific combineSelectOfTwoConstants(). The fact that we see any x86 changes just shows that that code is a mess of special-case holes. We may be able to remove some of that logic now. My guess is that other targets will want to enable this hook for most cases. The likely follow-ups would be to add value type and/or the constants themselves as parameters for the hook. As the tests in select_const.ll show, we can transform any select-of-constants to math/logic, but the general transform for any 2 constants needs one more instruction (multiply or 'and'). ARM is one target that I think may not want this for most cases. I see infinite loops there because it wants to use selects to enable conditionally executed instructions. Differential Revision: https://reviews.llvm.org/D30537 llvm-svn: 296977
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