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* [GlobalIsel] Fix a warning with GCC 7 -Wpedantic. NFCI.Davide Italiano2017-05-291-1/+1
| | | | llvm-svn: 304174
* [X86] Add tests for (ix bitcast (vxi1 and ...)). NFC.Zvi Rackover2017-05-292-0/+1558
| | | | | | To be improved by D33311. llvm-svn: 304171
* [X86] Replace undef value in flaky testZvi Rackover2017-05-291-3/+62
| | | | | | | D33311 exposes the flakiness in this test. Replacing the undef placed by bugpoint, makes it more interesting and robust. llvm-svn: 304168
* [ManagedStatic] Make object_creator/object_deleter visible again.Benjamin Kramer2017-05-291-8/+3
| | | | | | | They're now exposed as template args, which creates complications when ManagedStatics are used across .so boundaries. llvm-svn: 304166
* Don't destroy ManagedStatics in a unit test.Benjamin Kramer2017-05-291-6/+0
| | | | | | | Turns out this is very hostile towards other unit tests running in the same process, it unregisters all flags. llvm-svn: 304165
* [wasm] Fix test after r304117.Benjamin Kramer2017-05-291-1/+1
| | | | llvm-svn: 304164
* [X86] Don't fold away the memory operand of an xchg.Benjamin Kramer2017-05-292-1/+45
| | | | | | | | | | xchg with a mem operand has different locking semantics. If we unfold it into a xchg r,r we will loose the implicit lock. Likewise we never want to fold a register xchg into a memory one as it would be a lot slower. This triggers during LLVM selfhost. llvm-svn: 304163
* [Docs] Add VectorizationPlan to docs/Proposals.Ayal Zaks2017-05-293-0/+196
| | | | | | | | Following the request made in https://reviews.llvm.org/D32871, the general documentation of the Vectorization Plan is hereby placed under docs/Proposals. llvm-svn: 304161
* Try to work around MSVC being buggy. Attempt #1.Benjamin Kramer2017-05-292-2/+4
| | | | | | error C2971: 'llvm::ManagedStatic': template parameter 'Creator': 'CreateDefaultTimerGroup': a variable with non-static storage duration cannot be used as a non-type argument llvm-svn: 304157
* [Timer] Move DefaultTimerGroup into a ManagedStatic.Benjamin Kramer2017-05-291-3/+4
| | | | | | | | | | | | | This used to be just leaked. r295370 made it use magic statics. This adds a global destructor, which is something we'd like to avoid. It also creates a weird situation where the mutex used by TimerGroup is re-created during global shutdown and leaked. Using a ManagedStatic here is also subtle as it relies on the mutex inside of ManagedStatic to be recursive. I've added a test for that in a previous change. llvm-svn: 304156
* [ManagedStatic] Add a way to pass custom creators/deleters.Benjamin Kramer2017-05-292-3/+46
| | | | | | Also add a test case verifying that nested ManagedStatics work correctly. llvm-svn: 304155
* [DAGCombiner] fix load narrowing transform to exclude loads with extensionSanjay Patel2017-05-292-1/+58
| | | | | | | | | | The extending load possibility was missed in: https://reviews.llvm.org/rL304072 We might want to handle this cases as a follow-up, but bailing out for now to avoid miscompiling. llvm-svn: 304153
* [SystemZ] Improve buildVector() in SystemZISelLowering.cpp.Jonas Paulsson2017-05-291-19/+41
| | | | | | | | Use VLREP when inserting one or more loads into a vector. This is more efficient than to first load and then use a VLVGP. Review: Ulrich Weigand llvm-svn: 304152
* Test commit: fix typosMattias Eriksson2017-05-291-3/+3
| | | | | | Just fixing a few typos in comments to test commit access. llvm-svn: 304149
* [Nios2] Target registrationNikolai Bozhenov2017-05-2921-0/+597
| | | | | | | | | | | | | Reviewers: craig.topper, hfinkel, joerg, lattner, zvi Reviewed By: craig.topper Subscribers: oren_ben_simhon, igorb, belickim, tvvikram, mgorny, llvm-commits, pavel.v.chupin, DavidKreitzer Differential Revision: https://reviews.llvm.org/D32669 Patch by AndreiGrischenko <andrei.l.grischenko@intel.com> llvm-svn: 304144
* [ARM] GlobalISel: Extract helper. NFCI.Diana Picus2017-05-291-29/+34
| | | | | | | | Create a helper to deal with the common code for merging incoming values together after they've been split during call lowering. There's likely more stuff that can be commoned up here, but we'll leave that for later. llvm-svn: 304143
* [trivial] fix a typo in comment, NFCHiroshi Inoue2017-05-291-1/+1
| | | | llvm-svn: 304139
* [ARM] GlobalISel: Support array returnsDiana Picus2017-05-292-27/+112
| | | | | | | These are a bit rare in practice, but they don't require anything special compared to array parameters, so support them as well. llvm-svn: 304137
* [PPC] Fix assertion failure during binary encoding with -mcpu=pwr9Hiroshi Inoue2017-05-292-4/+18
| | | | | | | | | | | | | Summary clang -c -mcpu=pwr9 test/CodeGen/PowerPC/build-vector-tests.ll causes an assertion failure during the binary encoding. The failure occurs when a D-form load instruction takes two register operands instead of a register + an immediate. This patch fixes the problem and also adds an assertion to catch this failure earlier before the binary encoding (i.e. during lit test). The fix is from Nemanja Ivanovic @nemanjai. Differential Revision: https://reviews.llvm.org/D33482 llvm-svn: 304133
* [ARM] GlobalISel: Support array parameters/argumentsDiana Picus2017-05-294-19/+369
| | | | | | | | | Clang coerces structs into arrays, so it's a good idea to support them. Most of the support boils down to getting the splitToValueTypes helper to actually split types. We then use G_INSERT/G_EXTRACT to deal with the parts. llvm-svn: 304132
* DebugInfo: Include .dwo file name when hashing multiple CUs in a single fileMehdi Amini2017-05-294-3/+55
| | | | | | | | | | | | | | | | | | | | | | | This is really a workaround for ThinLTO in particular - since it can import partial CUs that may end up looking very similar/the same as the same partial import in another ThinLTO compile. An alternative fix would be to change the DICompileUnit metadata to include a "primary file" or the like - and when importing for ThinLTO set the primary file to the name of the DICompileUnit that is being imported into. This involves changing the schema and would reduce the excessive uniqueness in the hash that this change creates - allowing diagnosing of more duplicate CUs than will be caught with this change. But duplicate CUs can still be caught in non-ThinLTO builds & are mostly a nuisance rather than a particularly deliberate/effective tool for finding broken code. (arguably the hash could always include the dwo file and nothing in fission would break, I think..) Reapply of r304119 after adding a triple to the test and moving it to the X86 directory. llvm-svn: 304130
* DebugInfo: Omit an empty CU when a subprogram was moved into its useMehdi Amini2017-05-292-8/+66
| | | | | | | | | | | When the only use of a CU is for a subprogram that's only emitted into the using CU (to avoid cross-CU references in DWO files), avoid creating that CU at all. Reapply of r304111 after adding a triple to the test and moving it to the X86 directory. llvm-svn: 304129
* Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle"Tobias Grosser2017-05-292-45/+6
| | | | | | | | | | | | | | | | | | The reverted change introdued assertions ala: "MachineBasicBlock::succ_iterator llvm::MachineBasicBlock::removeSuccessor(succ_iterator, bool): Assertion `I != Successors.end() && "Not a current successor!"' Mikael, the original committer, wrote me that he is working on a fix, but that it likely will take some time to get this resolved. As this bug is one of the last two issues that keep the AOSP buildbot from turning green, I revert the original commit r302876. I am looking forward to see this recommitted after the assertion has been resolved. llvm-svn: 304128
* Revert "DebugInfo: Omit an empty CU when a subprogram was moved into its use"Mehdi Amini2017-05-292-64/+8
| | | | | | | This reverts commit r304111. GreenDragon is broken. llvm-svn: 304126
* Revert "DebugInfo: Include .dwo file name when hashing multiple CUs in a ↵Mehdi Amini2017-05-295-53/+3
| | | | | | | | single file" This reverts commit r304119 and r304118. GreenDragon is broken. llvm-svn: 304125
* Don't capture a temporary std::string in a StringRef.Zachary Turner2017-05-291-1/+1
| | | | | | This fixes the breakages in llvm-tblgen. llvm-svn: 304123
* Resubmit "[X86] Adding new LLVM TableGen backend that generates the X86 ↵Zachary Turner2017-05-299-3427/+747
| | | | | | | | | | | | | backend memory folding tables." This was reverted due to buildbot breakages and I was not familiar with this code to investigate it. But while trying to get a useful backtrace for the author, it turns out the fix was very obvious. Resubmitting this patch as is, and will submit the fix in a followup so that the fix is not hidden in the larger CL. llvm-svn: 304122
* Revert "[X86] Adding new LLVM TableGen backend that generates the X86 ↵Zachary Turner2017-05-299-747/+3427
| | | | | | | | | | | | | backend memory folding tables." This reverts commit 28cb1003507f287726f43c771024a1dc102c45fe as well as all subsequent followups. llvm-tblgen currently segfaults with this change, and it seems it has been broken on the bots all day with no fixes in preparation. See, for example: http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/ llvm-svn: 304121
* Disabled implicit-fallthrough warnings for ConvertUTF.cpp.Galina Kistanova2017-05-291-0/+31
| | | | | | | ConvertUTF.cpp has a little dependency on LLVM, and since the code extensively uses fall-through switches, I prefer disabling the warning for the whole file, rather than adding attributes for each case. llvm-svn: 304120
* DebugInfo: Include .dwo file name when hashing multiple CUs in a single fileDavid Blaikie2017-05-294-3/+53
| | | | | | | | | | | | | | | | | | | | This is really a workaround for ThinLTO in particular - since it can import partial CUs that may end up looking very similar/the same as the same partial import in another ThinLTO compile. An alternative fix would be to change the DICompileUnit metadata to include a "primary file" or the like - and when importing for ThinLTO set the primary file to the name of the DICompileUnit that is being imported into. This involves changing the schema and would reduce the excessive uniqueness in the hash that this change creates - allowing diagnosing of more duplicate CUs than will be caught with this change. But duplicate CUs can still be caught in non-ThinLTO builds & are mostly a nuisance rather than a particularly deliberate/effective tool for finding broken code. (arguably the hash could always include the dwo file and nothing in fission would break, I think..) llvm-svn: 304119
* Attempt to fix buildbots...David Blaikie2017-05-291-0/+0
| | | | llvm-svn: 304118
* Support: adjust the default obj format for wasmSaleem Abdulrasool2017-05-291-2/+4
| | | | | | | WebAssemly uses a custom object file format. For the wasm targets, default to the `Wasm` object file format. llvm-svn: 304117
* [AVR] Remove SREG from CPI's Uses; authored by Florian ZeitzDylan McKay2017-05-291-1/+0
| | | | | | | | | | | | | | Summary: CPI does not read the status register, but only writes it. Reviewers: dylanmckay Reviewed By: dylanmckay Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33223 llvm-svn: 304116
* [TableGen][X86] Fix formatting I accidentally messed up in r304099. NFCCraig Topper2017-05-281-1/+1
| | | | llvm-svn: 304115
* [ItaniumDemangle] Fix a exponential string copying bugErik Pilkington2017-05-281-0/+3
| | | | | | This is a port of libcxxabi's r304113. llvm-svn: 304114
* Prune trailing whitespace. (To regenerate makefiles)NAKAMURA Takumi2017-05-281-2/+2
| | | | llvm-svn: 304112
* DebugInfo: Omit an empty CU when a subprogram was moved into its useDavid Blaikie2017-05-282-8/+64
| | | | | | | | When the only use of a CU is for a subprogram that's only emitted into the using CU (to avoid cross-CU references in DWO files), avoid creating that CU at all. llvm-svn: 304111
* [AArch64][Falkor] Combine sched details files into one. NFC.Geoff Berry2017-05-282-514/+503
| | | | llvm-svn: 304109
* [AArch64][Falkor] Fix some sched details.Geoff Berry2017-05-284-294/+461
| | | | | | | | | | | | | | | | | | | | - Remove all uses of base sched model entries and set them all to Unsupported so all the opcodes are described in AArch64SchedFalkorDetails.td. - Remove entries for unsupported half-float opcodes. - Remove entries for unsupported LSE extension opcodes. - Add entry for MOVbaseTLS (and set Sched in base td file entry to WriteSys) and a few other pseudo ops. - Fix a few FP load/store with reg offset entries to use the LSLfast predicates. - Add Q size BIF/BIT/BSL entries. - Fix swapped Q/D sized CLS/CLZ/CNT/RBIT entires. - Fix pre/post increment address register latency (this operand is always dest 0). - Fix swapped FCVTHD/FCVTHS/FCVTDH/FCVTDS entries. - Fix XYZ resource over usage on LD[1-4] opcodes. llvm-svn: 304108
* [TableGen][X86] Use CHAR_BIT with sizeof instead of hardcoded 8. NFCCraig Topper2017-05-281-1/+2
| | | | llvm-svn: 304100
* [TableGen][X86] Mark a couple global tables as const. NFCCraig Topper2017-05-281-2/+2
| | | | llvm-svn: 304099
* [TableGen][X86] Improve formatting of the fold table output by indenting the ↵Craig Topper2017-05-281-2/+2
| | | | | | body of the table and adding blank lines between tables. NFC llvm-svn: 304098
* [TableGen][X86] Add an llvm_unreachable to a switch so we get an error if we ↵Craig Topper2017-05-281-0/+1
| | | | | | need expansion in the future. llvm-svn: 304097
* [TableGen][X86] Remove unnecessary std::string creations. NFCCraig Topper2017-05-281-4/+4
| | | | llvm-svn: 304096
* [TableGen][X86] Replace a global std::vector with a regular array. ↵Craig Topper2017-05-281-2/+2
| | | | | | llvm::find works on arrays, just need to use std::end to check the result. llvm-svn: 304095
* [TableGen][X86] getValueAsString returns a std::string not a StringRef. ↵Craig Topper2017-05-281-1/+1
| | | | | | Capture it that way to avoid a StringRef to a temporary. llvm-svn: 304093
* [x86] auto-generate better checks; NFCSanjay Patel2017-05-282-59/+204
| | | | llvm-svn: 304090
* [InstrProf] Use more ArrayRef/StringRef.Benjamin Kramer2017-05-282-11/+11
| | | | | | No functional change intended. llvm-svn: 304089
* [X86] Adding new LLVM TableGen backend that generates the X86 backend memory ↵Ayman Musa2017-05-289-3427/+745
| | | | | | | | | | | folding tables. X86 backend holds huge tables in order to map between the register and memory forms of each instruction. This TableGen Backend automatically generated all these tables with the appropriate flags for each entry. Differential Revision: https://reviews.llvm.org/D32684 llvm-svn: 304088
* [X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen ↵Ayman Musa2017-05-288-89/+175
| | | | | | | | | | | | | | | | | | | | | | backend) to X86Inst class and set its value for the relevant instructions. Some register-register instructions can be encoded in 2 different ways, this happens when 2 register operands can be folded (separately). For example if we look at the MOV8rr and MOV8rr_REV, both instructions perform exactly the same operation, but are encoded differently. Here is the relevant information about these instructions from Intel's 64-ia-32-architectures-software-developer-manual: Opcode Instruction Op/En 64-Bit Mode Compat/Leg Mode Description 8A /r MOV r8,r/m8 RM Valid Valid Move r/m8 to r8. 88 /r MOV r/m8,r8 MR Valid Valid Move r8 to r/m8. Here we can see that in order to enable the folding of the output and input registers, we had to define 2 "encodings", and as a result we got 2 move 8-bit register-register instructions. In the X86 backend, we define both of these instructions, usually one has a regular name (MOV8rr) while the other has "_REV" suffix (MOV8rr_REV), must be marked with isCodeGenOnly flag and is not emitted from CodeGen. Automatically generating the memory folding tables relies on matching encodings of instructions, but in these cases where we want to map both memory forms of the mov 8-bit (MOV8rm & MOV8mr) to MOV8rr (not to MOV8rr_REV) we have to somehow point from the MOV8rr_REV to the "regular" appropriate instruction which in this case is MOV8rr. This field enable this "pointing" mechanism - which is used in the TableGen backend for generating memory folding tables. Differential Revision: https://reviews.llvm.org/D32683 llvm-svn: 304087
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