summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* Update these register allocators to set the PhysRegUsed info in MachineFunction.Chris Lattner2005-01-233-11/+35
| | | | llvm-svn: 19791
* Add support for the PhysRegsUsed array.Chris Lattner2005-01-231-2/+3
| | | | llvm-svn: 19789
* Expose more information from register allocation to passes that run afterChris Lattner2005-01-231-0/+26
| | | | | | it. llvm-svn: 19788
* Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>Chris Lattner2005-01-231-6/+5
| | | | llvm-svn: 19787
* Get rid of a several dozen more and instructions in specint.Chris Lattner2005-01-231-5/+36
| | | | llvm-svn: 19786
* Fix crash comparing empty file against nonempty file.Chris Lattner2005-01-231-1/+2
| | | | llvm-svn: 19782
* Adjust to changes in SelectionDAG interfacesChris Lattner2005-01-231-9/+119
| | | | | | | The first half of correct chain insertion for libcalls. This is not enough to fix Fhourstones yet though. llvm-svn: 19781
* Remove the 3 HACK HACK HACKs I put in before, fixing them properly withChris Lattner2005-01-231-14/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the new TLI that is available. Implement support for handling out of range shifts. This allows us to compile this code (a 64-bit rotate): unsigned long long f3(unsigned long long x) { return (x << 32) | (x >> (64-32)); } into this: f3: mov %EDX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%ESP + 8] ret GCC produces this: $ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer .. f3: push %ebx mov %ebx, DWORD PTR [%esp+12] mov %ecx, DWORD PTR [%esp+8] mov %eax, %ebx mov %edx, %ecx pop %ebx ret The Simple ISEL produces (eww gross): f3: sub %ESP, 4 mov DWORD PTR [%ESP], %ESI mov %EDX, DWORD PTR [%ESP + 8] mov %ECX, DWORD PTR [%ESP + 12] mov %EAX, 0 mov %ESI, 0 or %EAX, %ECX or %EDX, %ESI mov %ESI, DWORD PTR [%ESP] add %ESP, 4 ret llvm-svn: 19780
* Adjust to changes in SelectionDAG interface.Chris Lattner2005-01-231-2/+2
| | | | llvm-svn: 19779
* Give SelectionDAG a TargetLowering instance instead of TM instance.Chris Lattner2005-01-231-4/+5
| | | | llvm-svn: 19778
* Build Alpha by default.Chris Lattner2005-01-231-1/+1
| | | | llvm-svn: 19777
* Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_allocaReid Spencer2005-01-231-1/+4
| | | | llvm-svn: 19776
* Support Cygwin assembly generation. The cygwin version of Gnu ASsemblerReid Spencer2005-01-231-11/+37
| | | | | | | doesn't support certain directives and symbols on cygwin are prefixed with an underscore. This patch makes the necessary adjustments to the output. llvm-svn: 19775
* Add support for fp tolerancesChris Lattner2005-01-231-3/+11
| | | | llvm-svn: 19774
* This method takes sys::Path objects now.Chris Lattner2005-01-231-2/+2
| | | | llvm-svn: 19773
* Adjust to changed interface.Chris Lattner2005-01-231-1/+2
| | | | llvm-svn: 19772
* Make DiffFilesWithTolerance take sys::Path's instead of std::stringsChris Lattner2005-01-231-55/+9
| | | | | | Delete dead functions. llvm-svn: 19771
* Remove two dead methods and improve the comments for DiffFilesWithTolerance.Chris Lattner2005-01-231-26/+10
| | | | | | Also, make DiffFilesWithTolerance take sys::Path objects instead of std::strings. llvm-svn: 19770
* Fix a bug in previous checkinChris Lattner2005-01-231-2/+2
| | | | llvm-svn: 19769
* Drop dead #includeChris Lattner2005-01-231-2/+0
| | | | llvm-svn: 19768
* The meat of this utility has been moved to FileUtilities, where it can beChris Lattner2005-01-231-153/+8
| | | | | | used by other tools. llvm-svn: 19767
* Add a new method, refactored out of fpcmpChris Lattner2005-01-231-0/+184
| | | | llvm-svn: 19766
* New method.Chris Lattner2005-01-231-0/+13
| | | | llvm-svn: 19765
* Let me introduce you to the early stages of the llvm backend for the alpha ↵Andrew Lenharth2005-01-2215-0/+2305
| | | | | | processor llvm-svn: 19764
* Get this to work for 64-bit systems.Chris Lattner2005-01-221-6/+11
| | | | llvm-svn: 19763
* We're working towards LLVM 1.5 now so bump the version number. This changeReid Spencer2005-01-221-1/+1
| | | | | | | won't be propagated to the configure script until there's a need to change configure.ac for some larger purpose. llvm-svn: 19762
* Minor fix.Chris Lattner2005-01-221-1/+1
| | | | llvm-svn: 19761
* This is the final big of factoring. This shares cases in suboperandChris Lattner2005-01-221-8/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | differences, which means that identical instructions (after stripping off the first literal string) do not run any different code at all. On the X86, this turns this code: switch (MI->getOpcode()) { case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break; case X86::AND32mr: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::OR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break; case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break; case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break; case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; } into this: switch (MI->getOpcode()) { case X86::ADC32mi: case X86::ADC32mr: case X86::ADD32mi: case X86::ADD32mr: case X86::AND32mi: case X86::AND32mr: case X86::CMP32mi: case X86::CMP32mr: case X86::MOV32mi: case X86::MOV32mr: case X86::OR32mi: case X86::OR32mr: case X86::SBB32mi: case X86::SBB32mr: case X86::SHLD32mrCL: case X86::SHRD32mrCL: case X86::SUB32mi: case X86::SUB32mr: case X86::TEST32mi: case X86::TEST32mr: case X86::XCHG32mr: case X86::XOR32mi: case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: case X86::ADD32mi8: case X86::AND32mi8: case X86::OR32mi8: case X86::ROL32mi: case X86::ROR32mi: case X86::SAR32mi: case X86::SBB32mi8: case X86::SHL32mi: case X86::SHR32mi: case X86::SUB32mi8: case X86::TEST8mi: case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; } After this, the generated asmwriters look pretty much as though they were generated by hand. This shrinks the X86 asmwriter.inc files from 55101->39669 and 55429->39551 bytes each, and PPC from 16766->12859 bytes. llvm-svn: 19760
* Implement *even more* factoring. In particular, if all of the instructionChris Lattner2005-01-221-20/+62
| | | | | | | | | | | | | | | | | | strings starts out with a constant string, we emit the string first, using a table lookup (instead of a switch statement). Because this is usually the opcode portion of the asm string, the differences between the instructions have now been greatly reduced. This allows many more case statements to be grouped together. This patch also allows instruction cases to be grouped together when the instruction patterns are exactly identical (common after the opcode string has been ripped off), and when the differing operand is a MachineInstr operand that needs to be formatted. The end result of this is a mean and lean generated AsmPrinter! llvm-svn: 19759
* Refactor code for numbering instructions into CodeGenTarget.Chris Lattner2005-01-223-10/+29
| | | | llvm-svn: 19758
* Fix VC++ compilation errorJeff Cohen2005-01-221-0/+1
| | | | llvm-svn: 19757
* QOI feature implemented.Chris Lattner2005-01-221-2/+3
| | | | llvm-svn: 19756
* Implement factoring of instruction pattern strings. In particular, instead ofChris Lattner2005-01-221-10/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | emitting code like this: case PPC::ADD: O << "add "; printOperand(MI, 0, MVT::i64); O << ", "; prin tOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '\n '; break; case PPC::ADDC: O << "addc "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; case PPC::ADDE: O << "adde "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; ... Emit code like this: case PPC::ADD: case PPC::ADDC: case PPC::ADDE: ... switch (MI->getOpcode()) { case PPC::ADD: O << "add "; break; case PPC::ADDC: O << "addc "; break; case PPC::ADDE: O << "adde "; break; ... } printOperand(MI, 0, MVT::i64); O << ", "; printOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << "\n"; break; This shrinks the PPC asm writer from 24785->15205 bytes (even though the new asmwriter has much more whitespace than the old one), and the X86 printers shrink quite a bit too. The important implication of this is that GCC no longer hits swap when building the PPC backend in optimized mode. Thus this fixes PR448. -Chris llvm-svn: 19755
* Fix the ::: problemChris Lattner2005-01-221-1/+1
| | | | llvm-svn: 19754
* Minor refactoring, no functionality change.Chris Lattner2005-01-221-15/+20
| | | | llvm-svn: 19753
* oopsJeff Cohen2005-01-221-1/+1
| | | | llvm-svn: 19752
* Use binary mode for reading/writing bytecode filesJeff Cohen2005-01-2212-38/+77
| | | | llvm-svn: 19751
* Add (non-working) project bugpoint to Visual StudioJeff Cohen2005-01-222-0/+182
| | | | llvm-svn: 19750
* Seperate asmstring parsing from emission. This allows the code to be simplerChris Lattner2005-01-221-86/+153
| | | | | | | | | | | | | | | | | | | and more understandable. It also allows us to do simple things like fold consequtive literal strings together. For example, instead of emitting this for the X86 backend: O << "adc" << "l" << " "; we now generate this: O << "adcl "; *whoa* :) This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes for the intel/att asm writers respectively. llvm-svn: 19749
* Don't exclude FileUtilies and ToolRunner from VC++ buildJeff Cohen2005-01-221-6/+3
| | | | llvm-svn: 19748
* Fix VC++ complaintJeff Cohen2005-01-222-2/+3
| | | | llvm-svn: 19747
* Fix destroyDirectory bugJeff Cohen2005-01-221-5/+8
| | | | llvm-svn: 19746
* Implicitly defined registers can clobber callee saved registers too!Chris Lattner2005-01-221-0/+6
| | | | | | This fixes the return-address-not-being-saved problem in the Alpha backend. llvm-svn: 19741
* make double-dollar properly escape asmstringsAndrew Lenharth2005-01-221-0/+1
| | | | llvm-svn: 19740
* More bugfixes for IA64 shifts.Chris Lattner2005-01-221-2/+2
| | | | llvm-svn: 19739
* Fix problems with non-x86 targets.Chris Lattner2005-01-221-3/+3
| | | | llvm-svn: 19738
* Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.Chris Lattner2005-01-221-4/+9
| | | | llvm-svn: 19737
* Remove unneeded line.Chris Lattner2005-01-211-1/+0
| | | | llvm-svn: 19736
* test commitChris Lattner2005-01-211-0/+1
| | | | llvm-svn: 19735
* Handle comparisons of gep instructions that have different typed indicesChris Lattner2005-01-211-5/+9
| | | | | | as long as they are the same size. llvm-svn: 19734
OpenPOWER on IntegriCloud