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llvm-svn: 227594
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Added a test case for it.
Also added run lines for the test case in r227566.
Bugs found with afl-fuzz
llvm-svn: 227589
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llvm-svn: 227588
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I thought it was enough to just not add the tool subdirectory,
but apparently I need to explicitly mark it ignore.
llvm-svn: 227587
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In preparation for adding PDB support to LLVM, this moves the
DWARF parsing code to its own subdirectory under DebugInfo, and
renames LLVMDebugInfo to LLVMDebugInfoDWARF.
This is purely a mechanical / build system change.
Differential Revision: http://reviews.llvm.org/D7269
Reviewed by: Eric Christopher
llvm-svn: 227586
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The FPU directive permits the user to switch the target FPU, enabling
instructions that would be otherwise unavailable. However, when configuring the
new subtarget features, we would not enable the implied functions for newer
FPUs. This would result in invalid rejection of valid input. Ensure that we
inherit the implied FPU functionality when enabling newer versions of the FPU.
Fortunately, these are mostly hierarchical, unlike the CPUs.
Addresses PR22395.
llvm-svn: 227584
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llvm-svn: 227582
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analyses back into the LTO code generator.
The pass manager builder (and the transforms library in general)
shouldn't be referencing the target machine at all.
This makes the LTO population work like the others -- the data layout
and target transform info need to be pre-populated.
llvm-svn: 227576
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covering switch.
llvm-svn: 227575
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r227519.
llvm-svn: 227574
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llvm-svn: 227573
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instead of using InstAlias.
Summary:
This is needed by the .cprestore assembler directive.
This directive needs to be able to insert an LW instruction after every JALR replacement of a JAL pseudo-instruction
(and never after a JALR which has NOT been a result of a pseudo-instruction replacement).
The problem with using InstAlias for these is that after it replaces the pseudo-instruction, we can't find out if the resulting JALR instruction
was generated by an InstAlias or not, so we don't know whether or not to insert our LW instruction.
By replacing it manually, we know when the pseudo-instruction replacement happens and we can insert the LW instruction correctly.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: emaste, llvm-commits
Differential Revision: http://reviews.llvm.org/D5601
llvm-svn: 227568
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Bug found with afl-fuzz
llvm-svn: 227566
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llvm-svn: 227564
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llvm-svn: 227563
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use bit vectors rather than arrays.
For target descriptions with very large and very dense register files, TableGen
can take an extremely long time to run. This change makes a dent in that (~15%
in my measurements) by accelerating the single hottest operation with better data
structures.
I believe there's still a lot of room to make this even faster with more global
changes that require replacing some of the existing datastructures in this area
with bit vectors, but that's a more involved change and I wanted to get this
simpler improvement in first.
llvm-svn: 227562
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test/Transforms/LoopVectorize/AArch64 folder.
llvm-svn: 227561
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Previously, only -1 and +1 step values are supported for induction variables. This patch extends LV to support
arbitrary constant steps.
Initial patch by Alexey Volkov. Some bug fixes are added in the following version.
Differential Revision: http://reviews.llvm.org/D6051 and http://reviews.llvm.org/D7193
llvm-svn: 227557
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use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector.
Patch by Wei-cheng Wang.
llvm-svn: 227550
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llvm-svn: 227548
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llvm-svn: 227547
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llvm-svn: 227546
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so we need to move the dbg.declare intrinsics that describe them, too.
llvm-svn: 227544
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for the target dependent one.
llvm-svn: 227542
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upon as an argument and store/use that in the entire function.
llvm-svn: 227541
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llvm-svn: 227539
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version. Update NVPTXInstrInfo accordingly.
llvm-svn: 227538
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accordingly.
llvm-svn: 227535
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accumulateAndSortLibcalls in LTOCodeGenerator.cpp collects names of runtime
library functions which are used to identify user-defined functions that should
be protected. Previously, this function would only scan the TargetLowering
object belonging to the "main" subtarget for the library function names. This
commit changes it to scan all per-function subtargets.
Differential Revision: http://reviews.llvm.org/D7275
llvm-svn: 227533
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line.
This is needed for a test case I plan to commit later.
llvm-svn: 227532
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llvm-svn: 227531
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llvm-svn: 227530
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llvm-svn: 227529
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incarnation of target transform info.
This is in preparation for starting to redesign TTI to be amenable to
the new PM world.
llvm-svn: 227525
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llvm-svn: 227523
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whether or not this headers exists.
llvm-svn: 227522
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llvm-svn: 227521
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llvm-svn: 227520
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In the large code model, we now put __chkstk in %r11 before calling it.
Refactor the code so that we only do this once. Simplify things by using
__chkstk_ms instead of __chkstk on cygming. We already use that symbol
in the prolog emission, and it simplifies our logic.
Second half of PR18582.
llvm-svn: 227519
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MSP430 backend.
llvm-svn: 227517
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llvm-svn: 227516
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llvm-svn: 227514
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that's actually sitting on the target machine.
llvm-svn: 227513
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calls that don't take a Function argument from Mips. Notable
exceptions: the AsmPrinter and MipsTargetObjectFile. The
latter needs to be fixed, and the former will be fixed when the
general AsmPrinter changes happen.
llvm-svn: 227512
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between the linker's TLS optimizations and Clang's TLS code generation.
For now, Clang has been changed to disable linker TLS optimizations
until it (and LLVM more generally) are emitting TLS code sequences
compatible with the old bugs found in the linkers. That's a better fix
to handle bootstrapping on that platform.
llvm-svn: 227511
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This is just an alias for CALL64pcrel32, and we can just use that opcode
with explicit defs in the MI.
No functionality change.
llvm-svn: 227508
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does not scale very well yet, but might be a good start.
llvm-svn: 227507
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These are needed so this pass will produce output when
e.g. -print-after-all is used.
Phabricator Review: http://reviews.llvm.org/D7264
Patch by Geoff Berry <gberry@codeaurora.org>!
llvm-svn: 227506
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win64: Call __chkstk through a register with the large code model
Fixes half of PR18582. True dynamic allocas will still have a
CALL64pcrel32 which will fail.
Reviewers: majnemer
Differential Revision: http://reviews.llvm.org/D7267
llvm-svn: 227503
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llvm-svn: 227502
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