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* [AVX512] Remove VEX_LIG from vmovd/vmovq instructions. From what I can tell ↵Craig Topper2015-12-281-14/+14
| | | | | | from the Intel docs these instructions require the L-bit to be 0. llvm-svn: 256486
* [AVX512] Fix some places that used FR64 instead of FR64X.Craig Topper2015-12-281-6/+6
| | | | llvm-svn: 256484
* [AVX512] Bring vmovq instructions names into alignment with the AVX and SSE ↵Craig Topper2015-12-282-26/+38
| | | | | | | | names. Add a missing encoding to disassembler and assembler. I believe this also fixes a case where a 64-bit memory form that is documented as being unsupported in 32-bit mode was able to be selected there. llvm-svn: 256483
* [X86] Move address for store target from outs to ins on a couple instructions.Craig Topper2015-12-281-3/+4
| | | | llvm-svn: 256482
* [X86] Add proper Uses/Defs/mayLoad flags for AAA/AAD/AAM/AAS/DAA/DAS/XLAT ↵Craig Topper2015-12-281-6/+7
| | | | | | instructions. llvm-svn: 256481
* [lcg] Fix a few more formatting goofs found by clang-format. NFC.Chandler Carruth2015-12-281-4/+4
| | | | llvm-svn: 256480
* [lcg] Fix formatting errors found with clang-format, remove the nowChandler Carruth2015-12-281-56/+52
| | | | | | | optional '\brief' tag and reflow some comments based on the added horizontal space. NFC. llvm-svn: 256479
* [AVX512] Remove separate instruction and patterns for lowering ↵Craig Topper2015-12-272-22/+16
| | | | | | ctlz_zero_undef. Change the operation for CTLZ_ZERO_UNDEF to Expand so SelectionDAG will convert them to CTLZ before lowering. llvm-svn: 256477
* [SelectionDAG] Teach LegalizeVectorOps to not unroll CTLZ_ZERO_UNDEF and ↵Craig Topper2015-12-271-0/+14
| | | | | | CTTZ_ZERO_UNDEF if the non-ZERO_UNDEF form is legal or custom. Will be used to simplify X86 code in a follow on commit. llvm-svn: 256476
* [AVX512] Remove alternate data type versions of VALIGND, VALIGNQ, VMOVSHDUP ↵Craig Topper2015-12-271-19/+3
| | | | | | and VMOVSLDUP. They don't have any tests and I don't think they can be selected. If they are truly needed they should be implemented with patterns against the normal instructions and not separate instructions. llvm-svn: 256475
* [lit] Implement support of per test timeout in lit.Dan Liew2015-12-2717-32/+585
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should work with ShTest (executed externally or internally) and GTest test formats. To set the timeout a new option ``--timeout=`` has been added which specifies the maximum run time of an individual test in seconds. By default this 0 which causes no timeout to be enforced. The timeout can also be set from a lit configuration file by modifying the ``lit_config.maxIndividualTestTime`` property. To implement a timeout we now require the psutil Python module if a timeout is requested. This dependency is confined to the newly added ``lit.util.killProcessAndChildren()``. A note has been added into the TODO document describing how we can remove the dependency on the ``pustil`` module in the future. It would be nice to remove this immediately but that is a lot more work and Daniel Dunbar believes it is better that we get a working implementation first and then improve it. To avoid breaking the existing behaviour the psutil module will not be imported if no timeout is requested. The included testcases are derived from test cases provided by Jonathan Roelofs which were in an previous attempt to add a per test timeout to lit (http://reviews.llvm.org/D6584). Thanks Jonathan! Reviewers: ddunbar, jroelofs, cmatthews, MatzeB Subscribers: cmatthews, llvm-commits Differential Revision: http://reviews.llvm.org/D14706 llvm-svn: 256471
* AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.Igor Breger2015-12-2719-904/+4090
| | | | | | | | | Fix TRUNCATE lowering vector to vector i1, use LSB and not MSB. Implement VPMOVB/W/D/Q2M intrinsic. Differential Revision: http://reviews.llvm.org/D15675 llvm-svn: 256470
* [X86][AVX512] change broadcast to use maskable patternAsaf Badouh2015-12-271-17/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D15786 llvm-svn: 256469
* [attrs] Extract the pure inference of function attributes intoChandler Carruth2015-12-2712-884/+999
| | | | | | | | | | | | | | | | | | | | | | | | | a standalone pass. There is no call graph or even interesting analysis for this part of function attributes -- it is literally inferring attributes based on the target library identification. As such, we can do it using a much simpler module pass that just walks the declarations. This can also happen much earlier in the pass pipeline which has benefits for any number of other passes. In the process, I've cleaned up one particular aspect of the logic which was necessary in order to separate the two passes cleanly. It now counts inferred attributes independently rather than just counting all the inferred attributes as one, and the counts are more clearly explained. The two test cases we had for this code path are both ... woefully inadequate and copies of each other. I've kept the superset test and updated it. We need more testing here, but I had to pick somewhere to stop fixing everything broken I saw here. Differential Revision: http://reviews.llvm.org/D15676 llvm-svn: 256466
* [attrs] Split off the forced attributes utility into its own pass thatChandler Carruth2015-12-2711-80/+182
| | | | | | | | | | | | | | | is (by default) run much earlier than FuncitonAttrs proper. This allows forcing optnone or other widely impactful attributes. It is also a bit simpler as the force attribute behavior needs no specific iteration order. I've added the pass into the default module pass pipeline and LTO pass pipeline which mirrors where function attrs itself was being run. Differential Revision: http://reviews.llvm.org/D15668 llvm-svn: 256465
* [AVX-512] Remove alernate integer forms for VPERMILPS and VPERMILPD. There ↵Craig Topper2015-12-271-8/+0
| | | | | | no tests for them and I don't see any way to select them anyway. If they are really needed they should be implemented as patterns and not full fledged instructions. llvm-svn: 256462
* Make the test properly constrainedDavid Majnemer2015-12-271-1/+1
| | | | llvm-svn: 256460
* InstrProfTest.cpp: Don't assume string literals are always merged.NAKAMURA Takumi2015-12-271-29/+37
| | | | | | | MSC18 Debug didn't merge them. FIXME: I tweaked just to appease a builder. Almost string literals should be addressed identically there. llvm-svn: 256459
* Try to passify buildbotDavid Majnemer2015-12-271-1/+10
| | | | llvm-svn: 256458
* Prune the feature "tls". No one is using it since TLS is enabled for Cygwin.NAKAMURA Takumi2015-12-271-4/+0
| | | | llvm-svn: 256457
* [X86, Win64] Use a frame pointer if pushf is emittedDavid Majnemer2015-12-278-35/+121
| | | | | | | | | | | | | | | A frame pointer must be used if stack pointer is modified after the prologue. LLVM will emit pushf/popf if we need to save/restore the FLAGS register, requiring us to have a frame pointer for the function. There is a small twist: this sequence might exist in user code via inline-assembly. For now, conservatively assume that such functions require a frame pointer. For real world justification, please see clang's implementation of __readeflags. This fixes PR25945. llvm-svn: 256456
* [WinEH] Add comments explaining the EH tablesDavid Majnemer2015-12-274-47/+130
| | | | | | | This is aids in debugging WinEH, similar functionality is present for DWARF EH. llvm-svn: 256455
* [x86] lower calls to llvm.maxnum.v4f32 using maxpsSanjay Patel2015-12-262-138/+26
| | | | | | | This is a follow-on to: http://reviews.llvm.org/rL255700 llvm-svn: 256454
* [X86] Fix an unused variable warning in released builds.Craig Topper2015-12-261-0/+2
| | | | llvm-svn: 256453
* [X86] Add support for printing shuffle comments for AVX512 PSHUFB instructions.Craig Topper2015-12-262-12/+39
| | | | llvm-svn: 256452
* [X86] Fold some variable declarations and initializations into if ↵Craig Topper2015-12-261-6/+3
| | | | | | statements. NFC llvm-svn: 256451
* Fix safepoint intrinsic signatures in test.Benjamin Kramer2015-12-262-4/+4
| | | | | | Should bring back the bots after r256443. llvm-svn: 256450
* [gc.statepoint] Change gc.statepoint intrinsic's return type to token type ↵Chen Li2015-12-2663-483/+464
| | | | | | | | | | | | | | instead of i32 type Summary: This patch changes gc.statepoint intrinsic's return type to token type instead of i32 type. Using token types could prevent LLVM to merge different gc.statepoint nodes into PHI nodes and cause further problems with gc relocations. The patch also changes the way on how gc.relocate and gc.result look for their corresponding gc.statepoint on unwind path. The current implementation uses the selector value extracted from a { i8*, i32 } landingpad as a hook to find the gc.statepoint, while the patch directly uses a token type landingpad (http://reviews.llvm.org/D15405) to find the gc.statepoint. Reviewers: sanjoy, JosephTremoulet, pgavlin, igor-laevsky, mjacob Subscribers: reames, mjacob, sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D15662 llvm-svn: 256443
* Add test case for r256433. "[X86] Fix shuffle decoding for variable VPERMIL ↵Craig Topper2015-12-261-1/+9
| | | | | | to be tolerant of the Constant type not matching due to folding in the constant pool and to get VPERMILPD correct." llvm-svn: 256435
* Revert r256432 "Test"Craig Topper2015-12-261-9/+1
| | | | | | This is the test case for r256433, but it got committed incorrectly in my local repo. llvm-svn: 256434
* [X86] Fix shuffle decoding for variable VPERMIL to be tolerant of the ↵Craig Topper2015-12-263-34/+64
| | | | | | Constant type not matching due to folding in the constant pool and to get VPERMILPD correct. llvm-svn: 256433
* TestCraig Topper2015-12-261-1/+9
| | | | llvm-svn: 256432
* [X86] Fix copy and paste typo from pasting from another Makefile to restore ↵Craig Topper2015-12-251-1/+1
| | | | | | code. llvm-svn: 256431
* [X86] Put back the include path to the main X86 sources in the AsmParser ↵Craig Topper2015-12-251-0/+3
| | | | | | library to fix the bots. llvm-svn: 256430
* [X86] Remove X86CodeGen dependency from the AsmParser library.Craig Topper2015-12-252-4/+1
| | | | llvm-svn: 256429
* [X86] Move getX86SubSuperRegisterOrZero to X86MCTargetDesc.cpp so it can be ↵Craig Topper2015-12-255-193/+193
| | | | | | used by AsmParser library without depending on X86CodeGen library. llvm-svn: 256428
* Remove extra forward declarations and scrub includes for all in tree ↵Craig Topper2015-12-2518-31/+4
| | | | | | InstPrinters. NFC llvm-svn: 256427
* [X86] Move AVX512 STATIC_ROUNDING enum to X86BaseInfo.h to fix a layering ↵Craig Topper2015-12-253-10/+10
| | | | | | violation in AsmParser. llvm-svn: 256426
* [X86] Replace MVT::SimpleValueType in the AsmParser library and ↵Craig Topper2015-12-257-118/+108
| | | | | | | | getX86SubSuperRegister with just an unsigned representing size. This a is step towards fixing a layering violation so the X86 AsmParser won't depending on CodeGen types. llvm-svn: 256425
* [X86] Don't pass the default value to the High argument of ↵Craig Topper2015-12-252-8/+5
| | | | | | getX86SubSuperRegister. Most place don't care about this argument. NFC llvm-svn: 256424
* [llvm-objdump] Use stderr and not stdout for fatal errors.Davide Italiano2015-12-251-2/+2
| | | | llvm-svn: 256423
* [X86] getX86SubSuperRegisterOrZero shouldn't call getX86SubSuperRegister ↵Craig Topper2015-12-251-1/+1
| | | | | | recursively. It should call itself instead. Otherwise it might fire an assertion when it was designed not too. llvm-svn: 256422
* [X86] Add missing X86II::MRM_C4, MRM_C5, etc. encodings to ↵Craig Topper2015-12-251-15/+19
| | | | | | getMemoryOperandNo. These aren't used by any instructions, but could be someday. NFC llvm-svn: 256421
* [X86] Use assert instead of if and llvm_unreachable. NFCCraig Topper2015-12-251-2/+1
| | | | llvm-svn: 256420
* [X86] Minor identation fixes. NFCCraig Topper2015-12-251-2/+2
| | | | llvm-svn: 256419
* [CodeGen] Use generic printAsOperand machinery instead of hand rolling itDavid Majnemer2015-12-251-3/+7
| | | | | | | | We already know how to properly print out basic blocks in printAsOperand, we should not roll it ourselves in AsmPrinter::EmitBasicBlockStart. No functionality change is intended. llvm-svn: 256413
* [IR] Mark the Type subclass helper methods 'inline' and move their ↵Craig Topper2015-12-253-60/+55
| | | | | | definitions to DerivedTypes.h so they can be inlined by the compiler. llvm-svn: 256406
* [Transforms] Use asserts instead of ifs around llvm_unreachable. NFCCraig Topper2015-12-251-34/+20
| | | | llvm-svn: 256405
* [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.Dan Gohman2015-12-256-67/+111
| | | | | | | | | | | | | Move RegStackify after coalescing and teach it to use LiveIntervals instead of depending on SSA form. This avoids a problem where a register in a COPY instruction is stackified and then subsequently coalesced with a register that is not stackified. This also puts it after the scheduler, which allows us to simplify the EXPR_STACK constraint, as we no longer have instructions being reordered after stackification and before coloring. llvm-svn: 256402
* [InstCombine] transform more extract/insert pairs into shuffles (PR2109)Sanjay Patel2015-12-242-19/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an extension of the shuffle combining from r203229: http://reviews.llvm.org/rL203229 The idea is to widen a short input vector with undef elements so the existing shuffle transform for extract/insert can kick in. The motivation is to finally solve PR2109: https://llvm.org/bugs/show_bug.cgi?id=2109 For that example, the IR becomes: %1 = bitcast <2 x i32>* %P to <2 x float>* %ld1 = load <2 x float>, <2 x float>* %1, align 8 %2 = shufflevector <2 x float> %ld1, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> %i2 = shufflevector <4 x float> %A, <4 x float> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ret <4 x float> %i2 And x86 SSE output improves from: movq (%rdi), %xmm1 ## xmm1 = mem[0],zero movdqa %xmm1, %xmm2 shufps $229, %xmm2, %xmm2 ## xmm2 = xmm2[1,1,2,3] shufps $48, %xmm0, %xmm1 ## xmm1 = xmm1[0,0],xmm0[3,0] shufps $132, %xmm1, %xmm0 ## xmm0 = xmm0[0,1],xmm1[0,2] shufps $32, %xmm0, %xmm2 ## xmm2 = xmm2[0,0],xmm0[2,0] shufps $36, %xmm2, %xmm0 ## xmm0 = xmm0[0,1],xmm2[2,0] retq To the almost optimal: movhpd (%rdi), %xmm0 Note: There's a tension in the existing transform related to generating arbitrary shufflevector masks. We avoid that in other places in InstCombine because we're scared that codegen can't handle strange masks, but it looks like we're ok with producing those here. I purposely chose weird insert/extract indexes for the regression tests to see the effect in these cases. For PowerPC+Altivec, AArch64, and X86+SSE/AVX, I think the codegen is equal or better for these examples. Differential Revision: http://reviews.llvm.org/D15096 llvm-svn: 256394
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