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* Fix two bugs in the pipeliner in renaming phis in the prolog and epilogKrzysztof Parzyszek2016-12-223-2/+155
| | | | | | | | | | | | | | | When the pipeliner is renaming phi values, it may need to iterate through the phi operands to check for other phis. However, the pipeliner should stop once it reaches a phi that is outside the pipelined loop. Also, when the generateExistingPhis code is unable to reuse an existing phi, the default code that computes the PhiOp2 is only to be used when the pipeliner is generating the kernel. Otherwise, the phi may be a value computed earlier in the same epilog. Patch by Brendon Cahoon. llvm-svn: 290355
* AMDGPU: Use i16 for i16 shift amountMatt Arsenault2016-12-223-45/+94
| | | | llvm-svn: 290351
* [NewGVN] Add the pass to PassRegistry.def.Davide Italiano2016-12-224-1/+3
| | | | | | | We need to hook up here to get it working with the new PM. Add a test while here (and remove a typo). llvm-svn: 290350
* AMDGPU: Fix missing 16-bit cmpx instructionsMatt Arsenault2016-12-222-0/+306
| | | | llvm-svn: 290349
* AMDGPU: Use i16 comparison instructionsMatt Arsenault2016-12-225-7/+435
| | | | llvm-svn: 290348
* AMDGPU: Fixed '!NodePtr->isKnownSentinel()' assertMatt Arsenault2016-12-221-17/+4
| | | | | | | | Caused by dereferencing end iterator when trying to const cast the iterator. Patch by Martin Sherburn llvm-svn: 290347
* [GVN] Initial check-in of a new global value numbering algorithm.Davide Italiano2016-12-2297-0/+8160
| | | | | | | | | | | | | | | | | | | | | The code have been developed by Daniel Berlin over the years, and the new implementation goal is that of addressing shortcomings of the current GVN infrastructure, i.e. long compile time for large testcases, lack of phi predication, no load/store value numbering etc... The current code just implements the "core" GVN algorithm, although other pieces (load coercion, phi handling, predicate system) are already implemented in a branch out of tree. Once the core is stable, we'll start adding pieces on top of the base framework. The test currently living in test/Transform/NewGVN are a copy of the ones in GVN, with proper `XFAIL` (missing features in NewGVN). A flag will be added in a future commit to enable NewGVN, so that interested parties can exercise this code easily. Differential Revision: https://reviews.llvm.org/D26224 llvm-svn: 290346
* [WebAssembly] Add an "explicit" keyword to a constructor.Dan Gohman2016-12-221-1/+1
| | | | llvm-svn: 290345
* [WebAssembly] Don't use variadic operand indices in the MCOperandInfo array.Dan Gohman2016-12-221-4/+5
| | | | llvm-svn: 290344
* [WebAssembly] Don't old negative load/store offsets in fast-isel.Dan Gohman2016-12-222-9/+54
| | | | | | | WebAssembly's load/store offsets are unsigned and don't wrap, so it's not valid to fold in a negative offset. llvm-svn: 290342
* [AMDGPU] Add pseudo SDWA instructionsSam Kolton2016-12-225-85/+159
| | | | | | | | | | | | Summary: This is needed for later SDWA support in CodeGen. Reviewers: vpykhtin, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D27412 llvm-svn: 290338
* [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwaSam Kolton2016-12-226-8/+37
| | | | | | | | | | | | Summary: Real instruction should copy constraints from real instruction. This allows auto-generated disassembler to correctly process tied operands. Reviewers: nhaustov, vpykhtin, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D27847 llvm-svn: 290336
* [X86][AVX2] Passing the appropriate memory operand class to VPMADDWD ↵Ayman Musa2016-12-223-1/+115
| | | | | | | | | | instruction. Replacing the memory operand in the ymm version of VPMADDWD from i128mem to i256mem. Differential Revision: https://reviews.llvm.org/D28024 llvm-svn: 290333
* [PM] Loosen the check ever so slightly -- MSVC appears to not includeChandler Carruth2016-12-221-4/+4
| | | | | | | a space after the comma in template arguments with our hacky type name system. llvm-svn: 290331
* [PM] Make a couple of CHECK lines a bit more precise, NFC.Chandler Carruth2016-12-221-4/+4
| | | | | | | | | I was staring at these and didn't realize these were module-layer proxies as opposed to some other layer. Justin and I have a plan to rename things to make the names themselves much easier to reason about, but I at least want the CHECK lines to be precise for now. llvm-svn: 290328
* [PM] Remove now-dead extern template and explicit instantiationChandler Carruth2016-12-222-7/+0
| | | | | | | | | | | | declarations. We're using a custom class here instead of the helper template, these bits just didn't get deleted when the other bits did get deleted. This was found by a really nice MSVC warning about explicitly instantiating a template where some member functions aren't defined and thus can't be instantiatied. llvm-svn: 290327
* [PM] Introduce a reasonable port of the main per-module pass pipelineChandler Carruth2016-12-228-42/+434
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from the old pass manager in the new one. I'm not trying to support (initially) the numerous options that are currently available to customize the pass pipeline. If we end up really wanting them, we can add them later, but I suspect many are no longer interesting. The simplicity of omitting them will help a lot as we sort out what the pipeline should look like in the new PM. I've also documented to the best of my ability *why* each pass or group of passes is used so that reading the pipeline is more helpful. In many cases I think we have some questionable choices of ordering and I've left FIXME comments in place so we know what to come back and revisit going forward. But for now, I've left it as similar to the current pipeline as I could. Lastly, I've had to comment out several places where passes are not ported to the new pass manager or where the loop pass infrastructure is not yet ready. I did at least fix a few bugs in the loop pass infrastructure uncovered by running the full pipeline, but I didn't want to go too far in this patch -- I'll come back and re-enable these as the infrastructure comes online. But I'd like to keep the comments in place because I don't want to lose track of which passes need to be enabled and where they go. One thing that seemed like a significant API improvement was to require that we don't build pipelines for O0. It seems to have no real benefit. I've also switched back to returning pass managers by value as at this API layer it feels much more natural to me for composition. But if others disagree, I'm happy to go back to an output parameter. I'm not 100% happy with the testing strategy currently, but it seems at least OK. I may come back and try to refactor or otherwise improve this in subsequent patches but I wanted to at least get a good starting point in place. Differential Revision: https://reviews.llvm.org/D28042 llvm-svn: 290325
* Fix an assertion in DwarfExpression when emitting fragments in vector registersAdrian Prantl2016-12-223-5/+86
| | | | | | | | | | | | | When DwarfExpression is emitting a fragment that is located in a register and that fragment is smaller than the register, and the register must be composed from sub-registers (are you still with me?) the last DW_OP_piece operation must not be larger than the size of the fragment itself, since the last piece of the fragment could be smaller than the last subregister that is being emitted. rdar://problem/29779065 llvm-svn: 290324
* Refactor the DIExpression fragment query interface (NFC)Adrian Prantl2016-12-2211-50/+59
| | | | | | ... so it becomes available to DIExpressionCursor. llvm-svn: 290322
* DAG: Add helper for testing constant valuesMatt Arsenault2016-12-222-0/+20
| | | | | | | | There are helpers for testing for constant or constant build_vector, and for splat ConstantFP vectors, but not for a constantfp or non-splat ConstantFP vector. llvm-svn: 290317
* AMDGPU: Fix missing commute table entries for cmpxMatt Arsenault2016-12-221-4/+4
| | | | | | No tests because these aren't currently used anywhere. llvm-svn: 290316
* [ThinLTO] Save 8B per summary entry by rearranging the fields (NFC)Mehdi Amini2016-12-221-3/+3
| | | | | | | | Size goes from 72B to 64B per entry. Differential Revision: https://reviews.llvm.org/D27970 llvm-svn: 290314
* AMDGPU: Swap order of operands in fadd/fsub combineMatt Arsenault2016-12-224-16/+16
| | | | | | | FMA is canonicalized to constant in the middle operand. Do the same so fmad matches and avoid an extra combine step. llvm-svn: 290313
* AMDGPU: Check fast math flags in fadd/fsub combinesMatt Arsenault2016-12-223-7/+78
| | | | llvm-svn: 290312
* AMDGPU: Form more FMAs if fusion is allowedMatt Arsenault2016-12-227-850/+1215
| | | | | | | Extend the existing fadd/fsub->fmad combines to produce FMA if allowed. llvm-svn: 290311
* AMDGPU: Move combines into separate functionsMatt Arsenault2016-12-222-152/+174
| | | | llvm-svn: 290309
* AMDGPU: Enable some f32 fadd/fsub combines for f16Matt Arsenault2016-12-224-10/+504
| | | | llvm-svn: 290308
* AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16Matt Arsenault2016-12-222-12/+43
| | | | llvm-svn: 290307
* AMDGPU: setcc test cleanupMatt Arsenault2016-12-222-234/+244
| | | | llvm-svn: 290306
* AMDGPU: Allow rcp and rsq usage with f16Matt Arsenault2016-12-223-14/+188
| | | | llvm-svn: 290302
* AMDGPU: Custom lower f16 fdivMatt Arsenault2016-12-223-17/+50
| | | | llvm-svn: 290301
* AMDGPU: Implement f16 fcanonicalizeMatt Arsenault2016-12-224-0/+181
| | | | llvm-svn: 290300
* AMDGPU: Update isFPImmLegal for f16Matt Arsenault2016-12-221-1/+2
| | | | | | I don't think this matters because ConstantFP is legal. llvm-svn: 290299
* Clear the PendingTypeTests vector after moving from it.Peter Collingbourne2016-12-221-0/+2
| | | | | | | This is to put the vector into a well defined state. Apparently the state of a vector after being moved from is valid but unspecified. Found with clang-tidy. llvm-svn: 290298
* [AArch64] Correct the check of signed 9-bit imm in getIndexedAddressParts().Haicheng Wu2016-12-222-2/+188
| | | | | | | | -256 is a legal indexed address part. Differential Revision: https://reviews.llvm.org/D27537 llvm-svn: 290296
* Pass GetAssumptionCache to InlineFunctionInfo constructorEaswaran Raman2016-12-221-1/+1
| | | | | | Differential revision: https://reviews.llvm.org/D28038 llvm-svn: 290295
* [NVVMIntrRange] Only set range metadata if none is already presentDavid Majnemer2016-12-222-0/+14
| | | | | | | The range metadata inserted by NVVMIntrRange is pessimistic, range metadata already present could be more precise. llvm-svn: 290294
* Renumber testcase metadata nodes after r290153.Adrian Prantl2016-12-22144-11342/+11678
| | | | | | | | | | | | | This patch renumbers the metadata nodes in debug info testcases after https://reviews.llvm.org/D26769. This is a separate patch because it causes so much churn. This was implemented with a python script that pipes the testcases through llvm-as - | llvm-dis - and then goes through the original and new output side-by side to insert all comments at a close-enough location. Differential Revision: https://reviews.llvm.org/D27765 llvm-svn: 290292
* [LLParser] Make the line field of DIMacro(File) optional.Adrian Prantl2016-12-222-2/+23
| | | | | | Otherwise these records do not survive roundtrips. llvm-svn: 290291
* Legalize metadata in legacy testcasesAdrian Prantl2016-12-211-1/+1
| | | | llvm-svn: 290288
* Legalize metadata in legacy testcasesAdrian Prantl2016-12-211-8/+7
| | | | llvm-svn: 290287
* Legalize metadata in legacy testcasesAdrian Prantl2016-12-211-1/+5
| | | | llvm-svn: 290286
* Legalize metadata in legacy testcasesAdrian Prantl2016-12-212-3/+8
| | | | llvm-svn: 290285
* [GlobalISel] Add basic Selector-emitter tblgen backend.Ahmed Bougacha2016-12-2110-7/+446
| | | | | | | | | | | | | | | | | This adds a basic tablegen backend that analyzes the SelectionDAG patterns to find simple ones that are eligible for GlobalISel-emission. That's similar to FastISel, with one notable difference: we're not fed ISD opcodes, so we need to map the SDNode operators to generic opcodes. That's done using GINodeEquiv in TargetGlobalISel.td. Otherwise, this is mostly boilerplate, and lots of filtering of any kind of "complicated" pattern. On AArch64, this is sufficient to match G_ADD up to s64 (to ADDWrr/ADDXrr) and G_BR (to B). Differential Revision: https://reviews.llvm.org/D26878 llvm-svn: 290284
* [AsmWriter] Remove redundant cast<>s. NFC.Ahmed Bougacha2016-12-211-2/+2
| | | | llvm-svn: 290283
* [WebAssembly] Fix the opcode value for i64.rotr.Dan Gohman2016-12-211-1/+1
| | | | llvm-svn: 290281
* IR: Function summary representation for type tests.Peter Collingbourne2016-12-218-10/+102
| | | | | | | | | | | Each function summary has an attached list of type identifier GUIDs. The idea is that during the regular LTO phase we would match these GUIDs to type identifiers defined by the regular LTO module and store the resolutions in a top-level "type identifier summary" (which will be implemented separately). Differential Revision: https://reviews.llvm.org/D27967 llvm-svn: 290280
* [sancov] skip duplicated pointsMike Aizatsky2016-12-211-0/+5
| | | | llvm-svn: 290278
* [sancov] hash prefix results in huge merge files, use shorter prefixMike Aizatsky2016-12-212-21/+20
| | | | llvm-svn: 290277
* [AArch64] Remove a redundant check. NFC.Haicheng Wu2016-12-211-2/+1
| | | | | | | | The case AM.Scale == 0 is already handled by the code right above. Differential Revision: https://reviews.llvm.org/D28003 llvm-svn: 290275
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