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All other tools have this -- it's needed to avoid hanging lit on Windows in
case of a crash.
llvm-svn: 194060
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All other custom operations tags have LLVM prefix.
llvm-svn: 194058
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Workaround for an OCaml bug:
http://caml.inria.fr/mantis/view.php?id=4166
llvm-svn: 194057
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Submit the basic port of the rest of ARM constant islands code to Mips.
Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose. When everything
has been completed I will summarize the port and notify people that
are knowledgable regarding the ARM Constant Islands code so they can
review it in it's entirety if they wish.
llvm-svn: 194053
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These were incorrectly pointing to HAVE_LOG despite being checked for
correctly in config-ix.cmake.
Patch by James Lyon!
llvm-svn: 194051
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instructions.
llvm-svn: 194048
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class SIMD(lselem-post).
Including following 14 instructions:
4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4).
llvm-svn: 194043
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llvm-svn: 194041
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This reverts commit d8acf0078cf363252727acff00f85ae8074f95b3.
llvm-svn: 194040
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This reverts commit 9cacd131c22b888303cb88e9a3235b2d7b2f19a1.
llvm-svn: 194039
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This test compares the output of llvm-cov against a coverage file
generated by gcov.
llvm-svn: 194038
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This will allow for much easier testing when the input files are in a
different folder from the test script.
llvm-svn: 194034
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This patch enables llvm-cov to correctly output the run count stored in
the GCDA file. GCOVProfiling currently does not generate this
information, so the GCDA run data had to be hacked on from a GCDA file
generated by gcc. This is corrected by a subsequent patch.
With the run and program data included, both llvm-cov and gcov produced
the same output.
llvm-svn: 194033
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llvm-svn: 194032
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ErrorOr had quiet a bit of complexity and indirection to be able to hold a user
type with the error.
That feature is not used anymore. This patch removes it, it will live in svn
history if we ever need it again.
If we do need it again, IMHO there is one thing that should be done
differently: Holding extra info in the error is not a property a function also
returning a value or not. The ability to hold extra info should be in the error
type and ErrorOr templated over it so that we don't need the funny looking
ErrorOr<void>.
llvm-svn: 194030
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As with the other loop unrolling parameters (the unrolling threshold, partial
unrolling, etc.) runtime unrolling can now also be controlled via the
constructor. This will be necessary for moving non-trivial unrolling late in
the pass manager (after loop vectorization).
No functionality change intended.
llvm-svn: 194027
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constant islands code to Mips."
It broke -Asserts build.
llvm-svn: 194026
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ResolveFrameIndex had what appeared to be a very nasty hack for when the
frame-index referred to a callee-saved register. In this case it "adjusted" the
offset so that the address was correct if (and only if) the MachineInstr
immediately followed the respective push.
This "worked" for all forms of GPR & DPR but was only ever used to set the
frame pointer itself, and once this was put in a more sensible location the
entire state-tracking machinery it relied on became redundant. So I stripped
it.
The only wrinkle is that "add r7, sp, #0" might theoretically be slower (need
an actual ALU slot) compared to "mov r7, sp" so I added a micro-optimisation
that also makes emitARMRegUpdate and emitT2RegUpdate also work when NumBytes ==
0.
No test changes since there shouldn't be any functionality change.
llvm-svn: 194025
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If an inline assembly operand has multiple constraints (e.g. "Ir" for immediate
or register) and an operand modifier (E.g. "w" for "print register as wN") then
we need to decide behaviour when the modifier doesn't apply to the constraint.
Previousely produced some combination of an assertion failure and a fatal
error. GCC's behaviour appears to be to ignore the modifier and print the
operand in the default way. This patch should implement that.
llvm-svn: 194024
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when compiling with DEBUG.
llvm-svn: 194021
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islands. I forgot to add it to svn on that patch. Ooops.
llvm-svn: 194020
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Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose.
llvm-svn: 194019
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llvm-svn: 194017
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those produced by clang for the inline asm bswap conversion.
Modified from a patch by Chris Smowton.
llvm-svn: 194016
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strict weak ordering.
STL debug mode checks this.
llvm-svn: 194015
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This fixes an assertion failure with a different sized address space.
llvm-svn: 194014
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When the elements are extracted from a select on vectors
or a vector select, do the select on the extracted scalars
from the input if there is only one use.
llvm-svn: 194013
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llvm-svn: 194011
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llvm-svn: 194007
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llvm-svn: 194006
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llvm-svn: 194001
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In order to create an ObjectFile implementation that uses bitcode files, we
need to propagate the bitcode errors to the ObjectFile interface, so we need
to convert it to use the same error handling as ObjectFile: error_code.
llvm-svn: 193996
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llvm-svn: 193992
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llvm-svn: 193988
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This is just bdver2 + FSGSBase.
llvm-svn: 193984
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Enable pretty
stack traces by default if you use PrettyStackTraceProgram, so that existing LLVM-based
tools will continue to get it without any changes.
llvm-svn: 193971
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llvm-svn: 193968
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llvm-svn: 193967
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llvm-svn: 193966
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llvm-svn: 193965
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added EVEX_KZ to tablegen
llvm-svn: 193959
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llvm-svn: 193958
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llvm-svn: 193957
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Instead of doing a RPO traversal of the whole function remember the blocks
containing gathers (typically <= 2) and scan them in dominator-first order.
The actual CSE is still quadratic, but I'm not confident that adding a
scoped hash table here is worth it as we're only looking at the generated
instructions and not arbitrary code.
llvm-svn: 193956
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This reverts commit r193356, it caused PR17781.
A reduced test case covering this regression has been added to the test suite.
llvm-svn: 193955
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llvm-svn: 193954
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llvm-svn: 193953
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OCaml's type unit is not compatible with C's type void.
llvm-svn: 193952
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llvm-svn: 193951
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llvm-svn: 193950
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