| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 76679
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pool entry will require relocations against it. I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.
llvm-svn: 76678
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getAnalysisIfAvailable<TargetData>.
llvm-svn: 76676
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to help support use when TargetData is not available.
llvm-svn: 76675
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llvm-svn: 76674
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their appropriate sections before the code itself. They need to be emitted
before the function because on some targets (x86 but not x86_64) the later
may reference a JT or CP entry address
llvm-svn: 76672
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(x pred y) with more thorough code that does more complete canonicalization
before resorting to range checks. This helps it find more cases where
the canonicalized expressions match.
llvm-svn: 76671
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llvm-svn: 76669
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llvm-svn: 76668
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depends on XS1A, but I think the ReadOnlySection is already set up for this
and there is no testcase that this breaks. If this is really needed, we can
add the appropriate parameterization to TargetAsmInfo in the future to support
this.
llvm-svn: 76667
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llvm-svn: 76666
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LLVM IR, it should be rejected by a front-end.
llvm-svn: 76665
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to twist your brain to see it, I believe it is the same as ELFTargetAsmInfo::SelectSectionForGlobal.
llvm-svn: 76664
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llvm-svn: 76662
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llvm-svn: 76661
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llvm-svn: 76660
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the generic ELF version instead. This will result in its mergable constant
sections getting named ".rodata.cst4" instead of ".cp.const4", but the
linker looks at the section flags, not the name of the section AFAICT.
llvm-svn: 76659
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as 32-bit code by default, and if gcc defaults to 64-bit code then ocamlc
requires a -cc "gcc -arch i386" option. We were hardcoding -cc g++
and throwing away any other compiler options that were determined when
ocamlc was configured and built.
llvm-svn: 76658
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This fixes a regression in the vmcore.ml dejagnu test.
llvm-svn: 76657
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llvm-svn: 76655
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llvm-svn: 76654
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implemented exactly the same way as its ELFTargetAsmInfo subclass
has them.
llvm-svn: 76653
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llvm-svn: 76646
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llvm-svn: 76645
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llvm-svn: 76639
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llvm-svn: 76636
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llvm-svn: 76635
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llvm-svn: 76634
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be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
llvm-svn: 76633
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llvm-svn: 76631
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llvm-svn: 76629
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this:
%ESI<def> = MOV32rr %EDI<kill>
ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
%reg1027<def> = MOVZX64rr32 %ESI
%reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead>
%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
%RDI<def> = MOV64rr %RSP
%RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead>
%RSP<def> = MOV64rr %RDI
into this:
4 %reg1024<def> = MOV32rr %EDI<kill>
12 ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
20 %reg1025<def> = MOVZX64rr32 %reg1024
28 %reg1026<def> = MOV64rr %reg1025<kill>
36 %reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead>
44 %reg1027<def> = MOV64rr %reg1026<kill>
52 %reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
60 %reg1028<def> = MOV64rr %RSP
68 %reg1029<def> = MOV64rr %reg1028<kill>
76 %reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead>
84 %RSP<def> = MOV64rr %reg1029
This helps greatly when debugging register allocation and coalescing
problems.
llvm-svn: 76615
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llvm-svn: 76612
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and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
llvm-svn: 76604
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MachineBasicBlock. We'll use these shortly.
llvm-svn: 76603
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printers to do neat and wonderful things when printing debug
information. The ideas is to allow passes to configer printers to emit
pass-specific information when dumping IR.
llvm-svn: 76602
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efficiency. Fix a few formatting bugs along the way.
llvm-svn: 76601
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llvm-svn: 76600
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llvm-svn: 76598
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llvm-svn: 76597
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llvm-svn: 76596
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llvm-svn: 76595
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llvm-svn: 76594
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chain to the super class instead of initializing mangler directly.
This gives it .file and module level inline asm support among other
things.
llvm-svn: 76593
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This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.
llvm-svn: 76592
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matches of "st" -> "stdin"
llvm-svn: 76591
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LLVM IR concept.
llvm-svn: 76590
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Also, tweak the return type of size().
llvm-svn: 76588
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llvm-svn: 76587
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llvm-svn: 76586
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