| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 157450
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Store (debugging) register names as offsets into a string table instead
of as char pointers.
llvm-svn: 157449
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small bug in the process.
llvm-svn: 157446
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llvm-svn: 157438
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(except the part about choosing direction)
llvm-svn: 157437
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llvm-svn: 157433
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Like this:
foreach i = 0-127 in ...
Use braces for composite ranges:
foreach i = {0-3,9-7} in ...
llvm-svn: 157432
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Only fully expanded Records should go into RecordKeeper.
llvm-svn: 157431
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Use static type checking.
llvm-svn: 157430
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llvm-svn: 157429
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llvm-svn: 157428
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The Hazard checker implements in-order contraints, or interlocked
resources. Ready instructions with hazards do not enter the available
queue and are not visible to other heuristics.
The major code change is the addition of SchedBoundary to encapsulate
the state at the top or bottom of the schedule, including both a
pending and available queue.
The scheduler now counts cycles in sync with the hazard checker. These
are minimum cycle counts based on known hazards.
Targets with no itinerary (x86_64) currently remain at cycle 0. To fix
this, we need to provide some maximum issue width for all targets. We
also need to add the concept of expected latency vs. minimum latency.
llvm-svn: 157427
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llvm-svn: 157426
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llvm-svn: 157425
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llvm-svn: 157424
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llvm-svn: 157423
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llvm-svn: 157422
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Patch by Nicklas Bo Jensen.
llvm-svn: 157421
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This back-end was deprecated in favor of the NVPTX back-end.
NV_CONTRIB
llvm-svn: 157417
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operand.
llvm-svn: 157416
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llvm-svn: 157415
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Expand test case for this.
Patch by Reed Kotler.
llvm-svn: 157410
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First code from the Mips16 compiler. Includes trivial test program.
Patch by Reed Kotler.
llvm-svn: 157408
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I'm not sure it's really worth expressing this as a range rather than 3 specific equalities, but it doesn't seem fundamentally wrong either.
llvm-svn: 157398
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Submitted by: Anton Lokhmotov <Anton.Lokhmotov@arm.com>
Approved by: o Anton Korobeynikov
o Micah Villmow
o David Neto
llvm-svn: 157393
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llvm-svn: 157389
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LowerSwitch::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.
test/Transform/LowerSwitch/feature.ll - this test was refactored: grep + count was replaced with FileCheck usage.
llvm-svn: 157384
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llvm-svn: 157381
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llvm-svn: 157380
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cycle.
llvm-svn: 157378
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llvm-svn: 157377
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llvm-svn: 157375
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llvm-svn: 157374
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to pass the tables around.
llvm-svn: 157373
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llvm-svn: 157371
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sizeof/sizeof.
llvm-svn: 157369
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llvm-svn: 157368
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uint16_t. Simplify loop iterating over one of those tables. No functional change intended.
llvm-svn: 157367
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intended.
llvm-svn: 157358
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llvm-svn: 157357
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Live ranges with a constrained register class may benefit from splitting
around individual uses. It allows the remaining live range to use a
larger register class where it may allocate. This is like spilling to a
different register class.
This is only attempted on constrained register classes.
<rdar://problem/11438902>
llvm-svn: 157354
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llvm-svn: 157349
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llvm-svn: 157348
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llvm-svn: 157342
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CHECK. The latter error was hidden by the former, and the test harness
used by e.g. "make check" silently ignored that opt was printing an
error message about an unknown flag instead of running on the test file.
llvm-svn: 157341
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Now that the coalescer keeps live intervals and machine code in sync at
all times, it needs to deal with identity copies differently.
When merging two virtual registers, all identity copies are removed
right away. This means that other identity copies must come from
somewhere else, and they are going to have a value number.
Deal with such copies by merging the value numbers before erasing the
copy instruction. Otherwise, we leave dangling value numbers in the live
interval.
This fixes PR12927.
llvm-svn: 157340
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llvm-svn: 157337
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Patch by Jush Lu <jush.msn@gmail.com>.
llvm-svn: 157336
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llvm-svn: 157329
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Apparently LLVM only stopped emitting this after LLVM 3.0
llvm-svn: 157325
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