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* Extend -new-coalescer SSA update to handle mapped values as well.Jakob Stoklund Olesen2012-09-202-9/+62
| | | | | | | | | | | | | The old-fashioned many-to-one value mapping doesn't always work when merging vector lanes. A value can map to multiple different values, and it can even be necessary to insert new PHIs. When a value number is defined by a copy from a value number that required SSa update, include the live range of the copied value number in the SSA update as well. It is not necessarily a copy of the original value number any longer. llvm-svn: 164329
* Only emit DW_AT_object_pointer if this is a definition.Eric Christopher2012-09-202-5/+2
| | | | llvm-svn: 164326
* SimplifyCFG: sink common codes from IF, ELSE blocks down to END block.Manman Ren2012-09-202-0/+226
| | | | | | | | | | | | We already have HoistThenElseCodeToIf, this patch implements SinkThenElseCodeToEnd. When END block has only two predecessors and each predecessor terminates with unconditional branches, we compare instructions in IF and ELSE blocks backwards and check whether we can sink the common instructions down. rdar://12191395 llvm-svn: 164325
* Try to make these tests more portable.Evan Cheng2012-09-203-7/+7
| | | | llvm-svn: 164320
* Fix broken check lines.Benjamin Kramer2012-09-201-3/+3
| | | | llvm-svn: 164317
* Fix function names in coding style examplesAndrew Trick2012-09-201-4/+4
| | | | llvm-svn: 164311
* Revert r164308 to fix buildbots.Bill Wendling2012-09-205-33/+30
| | | | llvm-svn: 164309
* Make the 'get*AlignmentFromAttr' functions into member functions within the ↵Bill Wendling2012-09-205-30/+33
| | | | | | Attributes class. llvm-svn: 164308
* Remove more bare uses of the different Attribute enums.Bill Wendling2012-09-202-16/+32
| | | | llvm-svn: 164307
* Specify cpu to get the correct instruction ordering. Remove XFAIL.Roman Divacky2012-09-201-6/+1
| | | | llvm-svn: 164306
* Make the 'getAsString' function a method of the Attributes class.Bill Wendling2012-09-204-54/+54
| | | | llvm-svn: 164305
* Fix 80-col violations.Nadav Rotem2012-09-201-13/+19
| | | | llvm-svn: 164297
* Make sure lli compiles all code before invalidating instruction caches.Tim Northover2012-09-201-0/+3
| | | | | | Patch from Amara Emerson. llvm-svn: 164296
* Change enum type in a static table to uint8_t instead. Saves about 700 ↵Craig Topper2012-09-201-6/+6
| | | | | | hundred bytes of static data. Change unsigned char in same table to uint8_t for explicitness. llvm-svn: 164285
* Specify CPu to prevent failure on ATOM due to different code schedulingMichael Liao2012-09-201-1/+1
| | | | llvm-svn: 164283
* Fix Sphinx warnings.Sean Silva2012-09-202-3/+4
| | | | | | Toctree was not being interlinked properly. llvm-svn: 164282
* Re-work X86 code generation of atomic ops with spin-loopMichael Liao2012-09-2013-553/+1709
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Rewrite/merge pseudo-atomic instruction emitters to address the following issue: * Reduce one unnecessary load in spin-loop previously the spin-loop looks like thisMBB: newMBB: ld t1 = [bitinstr.addr] op t2 = t1, [bitinstr.val] not t3 = t2 (if Invert) mov EAX = t1 lcs dest = [bitinstr.addr], t3 [EAX is implicit] bz newMBB fallthrough -->nextMBB the 'ld' at the beginning of newMBB should be lift out of the loop as lcs (or CMPXCHG on x86) will load the current memory value into EAX. This loop is refined as: thisMBB: EAX = LOAD [MI.addr] mainMBB: t1 = OP [MI.val], EAX LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined] JNE mainMBB sinkMBB: * Remove immopc as, so far, all pseudo-atomic instructions has all-register form only, there is no immedidate operand. * Remove unnecessary attributes/modifiers in pseudo-atomic instruction td * Fix issues in PR13458 - Add comprehensive tests on atomic ops on various data types. NOTE: Some of them are turned off due to missing functionality. - Revise tests due to the new spin-loop generated. llvm-svn: 164281
* Sphinxify DebuggingJITedCodeSean Silva2012-09-202-184/+147
| | | | | | LGTM by Michael Spencer llvm-svn: 164280
* Fix static function names in CodingStandards examples.Andrew Trick2012-09-201-6/+6
| | | | | | Try not to violate conventions immediately before explaining them. llvm-svn: 164278
* Convert some attribute existence queries over to use the predicate methods.Bill Wendling2012-09-194-38/+38
| | | | llvm-svn: 164268
* ARM: Tidy up IntrinsicsARM.td a bit.Jim Grosbach2012-09-191-225/+207
| | | | | | | Make the TargetPrefix setting one big setting instead of being spread out everywhere. No functional change. llvm-svn: 164265
* Add predicates for queries on whether an attribute exists.Bill Wendling2012-09-192-7/+87
| | | | llvm-svn: 164264
* Add in new data types that are used by AMDIL/ANL among others.Micah Villmow2012-09-195-64/+155
| | | | llvm-svn: 164261
* Soften the pattern-can-never-match error in TableGen into a warning. This ↵Owen Anderson2012-09-191-2/+5
| | | | | | pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). llvm-svn: 164256
* Implement a correct copy constructor for Record. Now that we're using the ↵Owen Anderson2012-09-191-0/+8
| | | | | | | | ID number as a key in maps (for determinism), it is imperative that ID numbers be globally unique, even when we copy construct a Record. This fixes some obscure failure cases involving registers defined inside multiclasses or foreach constructs that would not receive a unique ID, and would end up being omitted from the AsmMatcher tables. llvm-svn: 164251
* Resolve conflicts involving dead vector lanes for -new-coalescer.Jakob Stoklund Olesen2012-09-192-9/+182
| | | | | | | | | | | | | | | | | | | | | A common coalescing conflict in vector code is lane insertion: %dst = FOO %src = BAR %dst:ssub0 = COPY %src The live range of %src interferes with the ssub0 lane of %dst, but that lane is never read after %src would have clobbered it. That makes it safe to merge the live ranges and eliminate the COPY: %dst = FOO %dst:ssub0 = BAR This patch teaches the new coalescer to resolve conflicts where dead vector lanes would be clobbered, at least as long as the clobbered vector lanes don't escape the basic block. llvm-svn: 164250
* This patch adds memory support functions which will later be used to ↵Andrew Kaylor2012-09-196-90/+747
| | | | | | implement section-specific protection handling in MCJIT. llvm-svn: 164249
* Add support for macro parameters/arguments delimited by spaces,Preston Gurd2012-09-196-33/+188
| | | | | | | | | | to improve compatibility with GNU as. Based on a patch by PaX Team. Fixed assertion failures on non-Darwin and added additional test cases. llvm-svn: 164248
* Add support for accessing an MDNode's operands via the C binding. Patch byDuncan Sands2012-09-192-0/+34
| | | | | | Anthony Bryant. llvm-svn: 164247
* Support default parameters/arguments for assembler macros.Preston Gurd2012-09-192-9/+41
| | | | | | | | This patch is based on the one by PaX Team. Patch by Andy Zhang! llvm-svn: 164246
* Enhance unmatched '.endr' directive error message in assembler.Preston Gurd2012-09-192-2/+2
| | | | | | | | The directive can be matched with directives other than '.rept' Patch by Andy Zhang! llvm-svn: 164245
* Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArithMichael Liao2012-09-192-177/+142
| | | | | | | | | | | - Merge the processing of LOAD_ADD with other atomic load-arith operations - Separate the logic getting target constant for atomic-load-op and add an optimization for atomic-load-add on i16 with negative value - Optimize a minor case for atomic-fetch-add i16 with negative operand. Test case is revised. llvm-svn: 164243
* Renaming functions to match coding style guidelinesMichael Ilseman2012-09-191-4/+4
| | | | llvm-svn: 164238
* Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.Jordan Rose2012-09-191-1/+1
| | | | | | | XFAIL needs a trailing colon. Hopefully this will get the buildbots happy again while Bill works on getting it passing. llvm-svn: 164237
* Doxygen-ify commentsMichael Ilseman2012-09-191-8/+16
| | | | llvm-svn: 164235
* XFAIL test/CodeGen/PowerPC/structsinregs.llBill Schmidt2012-09-191-0/+6
| | | | llvm-svn: 164233
* Put the * and & next to the variable, rather than the type.Michael Ilseman2012-09-191-73/+73
| | | | llvm-svn: 164232
* Document the interface for integer expansion, using doxygen-style commentsMichael Ilseman2012-09-191-0/+8
| | | | llvm-svn: 164231
* Forward declarationsMichael Ilseman2012-09-191-0/+4
| | | | llvm-svn: 164230
* GCC doesn't understand that OrigAliasResult having a value is correlated withDuncan Sands2012-09-191-1/+1
| | | | | | | ArePhisAssumedNoAlias, and warns that OrigAliasResult may be used uninitialized. Pacify GCC. llvm-svn: 164229
* Small structs for PPC64 SVR4 must be passed right-justified in registers.Bill Schmidt2012-09-193-61/+347
| | | | | | | | | | | | | | | lib/Target/PowerPC/PPCISelLowering.{h,cpp} Rename LowerFormalArguments_Darwin to LowerFormalArguments_Darwin_Or_64SVR4. Rename LowerFormalArguments_SVR4 to LowerFormalArguments_32SVR4. Receive small structs right-justified in LowerFormalArguments_Darwin_Or_64SVR4. Rename LowerCall_Darwin to LowerCall_Darwin_Or_64SVR4. Rename LowerCall_SVR4 to LowerCall_32SVR4. Pass small structs right-justified in LowerCall_Darwin_Or_64SVR4. test/CodeGen/PowerPC/structsinregs.ll New test. llvm-svn: 164228
* SimplifyCFG: Don't generate invalid code for switch used to initializeHans Wennborg2012-09-192-9/+42
| | | | | | | | | | | | | two variables where the first variable is returned and the second ignored. I don't think this occurs in practice (other passes should have cleaned up the unused phi node), but it should still be handled correctly. Also make the logic for determining if we should return early less sketchy. llvm-svn: 164225
* Fix minor typo in IntervalPartition.hWill Dietz2012-09-191-2/+2
| | | | llvm-svn: 164222
* Make MapVector a bit more expensive but harder to misuse. We now onlyRafael Espindola2012-09-191-87/+14
| | | | | | | | | provide insertion order iteration, instead of the old option of DenseMap order iteration over keys and insertion order iteration over values. This is implemented by keeping two copies of each key. llvm-svn: 164221
* InlineCost: Make TotalAllocaSizeRecursiveCaller unsigned to avoid ↵Benjamin Kramer2012-09-191-1/+1
| | | | | | | | sign-compare warnings. It's a size, not a cost. llvm-svn: 164219
* IntegerDivision: Style cleanups, avoid warning about mixing || and && ↵Benjamin Kramer2012-09-191-7/+5
| | | | | | without parens. llvm-svn: 164216
* Remove unused and broken CloneFunction wrapper.Benjamin Kramer2012-09-191-7/+0
| | | | | | It converted the CodeInfo argument to bool implicitly. llvm-svn: 164215
* Move load_to_switch.ll to test/CodeGen/SPARC/Hans Wennborg2012-09-191-1/+1
| | | | | | | Because the test invokes llc -march=sparc, it needs to be in a directory which is only run when the sparc target is built. llvm-svn: 164211
* rename testNadav Rotem2012-09-191-0/+0
| | | | llvm-svn: 164210
* Prevent inlining of callees which allocate lots of memory into a recursive ↵Nadav Rotem2012-09-193-14/+99
| | | | | | | | | | | | | | | | | | caller. Example: void foo() { ... foo(); // I'm recursive! bar(); } bar() { int a[1000]; // large stack size } rdar://10853263 llvm-svn: 164207
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