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* CodeGenPrep: turn lookup tables into switches for some targets.Hans Wennborg2012-09-192-4/+198
| | | | | | | | | | | | | | | | | | | This is a follow-up from r163302, which added a transformation to SimplifyCFG that turns some switches into loads from lookup tables. It was pointed out that some targets, such as GPUs and deeply embedded targets, might not find this appropriate, but SimplifyCFG doesn't have enough information about the target to decide this. This patch adds the reverse transformation to CodeGenPrep: it turns loads from lookup tables back into switches for targets where we do not build jump tables (assuming these are also the targets where lookup tables are inappropriate). Hopefully we will eventually get to have target information in SimplifyCFG, and then this CodeGenPrep transformation can be removed. llvm-svn: 164206
* Remove code for setting the VEX L-bit as a function of operand size from the ↵Craig Topper2012-09-195-41/+4
| | | | | | code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. llvm-svn: 164204
* whitespace.Nadav Rotem2012-09-191-9/+0
| | | | llvm-svn: 164203
* Add explicit VEX_L tags to all 256-bit instructions. This will allow us to ↵Craig Topper2012-09-193-240/+254
| | | | | | remove code from the code emitters that examined operands to set the L-bit. llvm-svn: 164202
* Silence -Wnon-virtual-dtor in llvm-stress.Andrew Trick2012-09-191-0/+4
| | | | | | | | This was making it hard to scan my builds for new warnings. The warning still fires with ToT clang. But if my workaround is unnecessary for whatever reason, feel free to revert. llvm-svn: 164201
* SchedMachineModel: compress the CPU's WriteLatencyTable.Andrew Trick2012-09-193-7/+44
| | | | llvm-svn: 164199
* De-nest if's and fix mix-upSean Silva2012-09-191-41/+37
| | | | | | | | | | | | | | | | | | Two deeply nested if's obscured that the sense of the conditions was mixed up. Amazingly, TableGen's output is exactly the same even with the sense of the tests fixed; it seems that all of TableGen's conversions are symmetric so that the inverted sense was nonetheless correct "by accident". As such, I couldn't come up with a test case. If there does in fact exist a non-symmetric conversion in TableGen's type system, then a test case should be prepared. Despite the symmetry, both if's are left in place for robustness in the face of future changes. Review by Jakob. llvm-svn: 164195
* Iterate deterministicaly over ClassInfo*'sSean Silva2012-09-191-2/+12
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164191
* Iterate deterministically over register classesSean Silva2012-09-191-2/+3
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164190
* Refactor Record* by-ID comparator to Record.hSean Silva2012-09-193-18/+19
| | | | | | | | | | | This is a generally useful utility; there's no reason to have it hidden in CodeGenDAGPatterns.cpp. Also, rename it to fit the other comparators in Record.h Review by Jakob. llvm-svn: 164189
* llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode.NAKAMURA Takumi2012-09-191-1/+1
| | | | | | -mcpu doesn't infer -arch. Consider non-x86 host. llvm-svn: 164185
* Tidy up. Minor formatting.Jim Grosbach2012-09-181-3/+2
| | | | llvm-svn: 164182
* Tidy up. 80 columns.Jim Grosbach2012-09-181-2/+6
| | | | llvm-svn: 164181
* comment typoAndrew Trick2012-09-181-1/+1
| | | | llvm-svn: 164180
* Fix the last crasher I've gotten a reproduction for in SROA. This oneChandler Carruth2012-09-182-0/+22
| | | | | | | | | | | from the dragonegg build bots when we turned on the full version of the pass. Included a much reduced test case for this pesky bug, despite bugpoint's uncooperative behavior. Also, I audited all the similar code I could find and didn't spot any other cases where this mistake cropped up. llvm-svn: 164178
* Test commitSean Silva2012-09-181-1/+1
| | | | llvm-svn: 164174
* New utility for expanding integer division for targets that don't support it.Michael Ilseman2012-09-183-0/+333
| | | | | | Implementation derived from compiler-rt's implementation of signed and unsigned integer division. llvm-svn: 164173
* MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648Evan Cheng2012-09-183-3/+16
| | | | llvm-svn: 164169
* FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character ↵Benjamin Kramer2012-09-183-3/+12
| | | | | | after the colon. llvm-svn: 164165
* Add test for r164155 and remove two tests superseded by ppc64-calls.ll.Roman Divacky2012-09-183-32/+14
| | | | llvm-svn: 164162
* Add hidden flag to exclude aliases from output.Jan Sjödin2012-09-182-2/+31
| | | | llvm-svn: 164158
* Add a MapVector class. It provides a regular set iteration, butRafael Espindola2012-09-181-0/+153
| | | | | | also provides a insertion order iteration over the values. llvm-svn: 164157
* Fix the isLocalCall() by checking for linker weakness as well.Roman Divacky2012-09-181-1/+2
| | | | llvm-svn: 164155
* TargetSchedule: cleanup computeOperandLatency logic & diagnostics.Andrew Trick2012-09-181-6/+16
| | | | llvm-svn: 164154
* misched: Make ScheduleDAGInstrs use the TargetSchedule interface.Andrew Trick2012-09-181-16/+14
| | | | llvm-svn: 164153
* Revert r164051.Akira Hatanaka2012-09-181-4/+0
| | | | llvm-svn: 164150
* LSR critical edge splitting fix for PR13756.Andrew Trick2012-09-182-14/+56
| | | | llvm-svn: 164147
* Fix getCommonType in a different way from the way I fixed it whenChandler Carruth2012-09-182-3/+3
| | | | | | | | | | | | working on FCA splitting. Instead of refusing to form a common type when there are uses of a subsection of the alloca as well as a use of the entire alloca, just skip the subsection uses and continue looking for a whole-alloca use with a type that we can use. This produces slightly prettier IR I think, and also fixes the other failure in the test. llvm-svn: 164146
* Fix build for compilers that don't understand injected class names properly.Benjamin Kramer2012-09-181-2/+2
| | | | llvm-svn: 164142
* Avoid symbol name clash when filling TOC.Roman Divacky2012-09-184-3/+42
| | | | | | Patch by Adhemerval Zanella. llvm-svn: 164141
* SROA: Use CRTP for OpSplitter to get rid of virtual dispatch and the ↵Benjamin Kramer2012-09-181-8/+7
| | | | | | virtual-dtor warnings that come with it. llvm-svn: 164140
* On PPC64 emit the environment pointer. Patch by Adhemerval Zanella.Roman Divacky2012-09-183-0/+4
| | | | llvm-svn: 164139
* Optimize local func calls to not emit nop for TOC restoration.Roman Divacky2012-09-182-2/+59
| | | | | | Patch by Adhemerval Zanella. llvm-svn: 164138
* Add PowerPC64 relocation definitions. Patch by Adhemerval Zanella!Roman Divacky2012-09-181-0/+15
| | | | llvm-svn: 164137
* SROA: Replace the member function template contraption for recursively ↵Benjamin Kramer2012-09-181-97/+105
| | | | | | | | splitting aggregates into a real class. No intended functionality change. llvm-svn: 164135
* Add test for r164132.Roman Divacky2012-09-181-0/+7
| | | | llvm-svn: 164134
* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-1813-50/+71
| | | | | | | | | store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. llvm-svn: 164132
* SROA.cpp: Appease msvc.NAKAMURA Takumi2012-09-181-1/+1
| | | | | | ...I don't know why this could appease msvc...baad. llvm-svn: 164130
* llvm/test/DebugInfo: Move two tests, 2010-04-13-PubType.ll and ↵NAKAMURA Takumi2012-09-182-0/+0
| | | | | | linkage-name.ll to X86. llvm-svn: 164129
* XFAIL SROA test until Chandler can get to it.Benjamin Kramer2012-09-181-0/+1
| | | | llvm-svn: 164128
* Coding standards: fix typo: '= deleted' -> '= delete'.Dmitri Gribenko2012-09-181-2/+2
| | | | llvm-svn: 164126
* Make MachinePostDominatorTree::DT privateTom Stellard2012-09-181-2/+4
| | | | llvm-svn: 164125
* LNT builders have picked up new SROA, disable it to get the remaining ↵Benjamin Kramer2012-09-181-1/+1
| | | | | | builders green again. llvm-svn: 164124
* Fix a warning in release builds and a test case I forgot to update withChandler Carruth2012-09-182-1/+2
| | | | | | a fix to getCommonType in the previous patch. llvm-svn: 164120
* Add a major missing piece to the new SROA pass: aggressive splitting ofChandler Carruth2012-09-183-8/+270
| | | | | | | | | | | | | | | | | | | | | | | FCAs. This is essential in order to promote allocas that are used in struct returns by frontends like Clang. The FCA load would block the rest of the pass from firing, resulting is significant regressions with the bullet benchmark in the nightly test suite. Thanks to Duncan for repeated discussions about how best to do this, and to both him and Benjamin for review. This appears to have blocked many places where the pass tries to fire, and so I'm expect somewhat different results with this fix added. As with the last big patch, I'm including a change to enable the SROA by default *temporarily*. Ben is going to remove this as soon as the LNT bots pick up the patch. I'm just trying to get a round of LNT numbers from the stable machines in the lab. NOTE: Four clang tests are expected to fail in the brief window where this is enabled. Sorry for the noise! llvm-svn: 164119
* Fix instcombine to obey requested alignment when merging allocas.Richard Osborne2012-09-182-3/+31
| | | | llvm-svn: 164117
* More domain conversion; convert VFP VMOVS to NEON instructions in more cases ↵James Molloy2012-09-182-15/+74
| | | | | | - when we may clobber the other S-lane by converting an S to a D instruction, make an effort to work out if the S lane is clobberable or not. llvm-svn: 164114
* Make custom operand parsing mnemonic indices use the same mnemonic table as ↵Craig Topper2012-09-181-34/+39
| | | | | | the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. llvm-svn: 164109
* Use variable type for index into mnemonic table. Shrinks size of index field ↵Craig Topper2012-09-181-5/+14
| | | | | | on in tree targets. Saving static data space. llvm-svn: 164108
* Replaced ReInitMCSubtargetInfo with InitMCProcessor.Andrew Trick2012-09-183-18/+20
| | | | | | | | Now where we used to call ReInitMCSubtargetInfo, we actually recompute the same information as InitMCSubtargetInfo instead of only setting the feature bits. llvm-svn: 164105
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