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* InstCombine: creating selects from -1 and 0 is fine, they combine into a ↵Benjamin Kramer2010-12-222-3/+18
| | | | | | sext from i1. llvm-svn: 122453
* X86: Lower a select directly to a setcc_carry if possible.Benjamin Kramer2010-12-223-54/+36
| | | | | | | | | | | | | | | | | | int test(unsigned long a, unsigned long b) { return -(a < b); } compiles to _test: ## @test cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7] sbbl %eax, %eax ## encoding: [0x19,0xc0] ret ## encoding: [0xc3] instead of _test: ## @test xorl %ecx, %ecx ## encoding: [0x31,0xc9] cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7] movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff] cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1] ret ## encoding: [0xc3] llvm-svn: 122451
* Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has beenRafael Espindola2010-12-221-19/+5
| | | | | | fixed. llvm-svn: 122448
* Constify.Dan Gohman2010-12-221-1/+1
| | | | llvm-svn: 122447
* Assert that the AddrDelta expression is really constant and wrap it in a setRafael Espindola2010-12-222-2/+10
| | | | | | if we have a lame assembler. llvm-svn: 122446
* When RegAllocGreedy decides to spill the interferences of the current register,Jakob Stoklund Olesen2010-12-221-37/+89
| | | | | | pick the victim with the lowest total spill weight. llvm-svn: 122445
* Include a shadow of the original CFG edges in the edge bundle graph.Jakob Stoklund Olesen2010-12-221-0/+4
| | | | llvm-svn: 122444
* Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a muchRafael Espindola2010-12-224-7/+11
| | | | | | better name and matches what is used in the MachO writer. llvm-svn: 122443
* MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups.Daniel Dunbar2010-12-222-25/+39
| | | | llvm-svn: 122441
* Add reduced test from 8845.Rafael Espindola2010-12-221-0/+25
| | | | llvm-svn: 122438
* Revert r122359 while I debug PR8845.Rafael Espindola2010-12-221-5/+19
| | | | llvm-svn: 122427
* Fix another conditional expression mismatched enum type warning.Matt Beaumont-Gay2010-12-221-1/+2
| | | | llvm-svn: 122419
* When determining whether the new instruction was already present inDuncan Sands2010-12-222-6/+19
| | | | | | | | the original instruction, half the cases were missed (making it not wrong but suboptimal). Also correct a typo (A <-> B) in the second chunk. llvm-svn: 122414
* Make this test not depend on how the variable is named.Duncan Sands2010-12-221-2/+2
| | | | llvm-svn: 122413
* MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which isDaniel Dunbar2010-12-222-23/+73
| | | | | | esp. important given that the LOCAL_SECTDIFF enumeration got redefined. llvm-svn: 122412
* MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I ↵Daniel Dunbar2010-12-221-4/+68
| | | | | | figure out how it is supposed to work. llvm-svn: 122410
* MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds.Daniel Dunbar2010-12-221-6/+3
| | | | llvm-svn: 122409
* MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds.Daniel Dunbar2010-12-221-0/+16
| | | | llvm-svn: 122408
* MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations.Daniel Dunbar2010-12-222-3/+128
| | | | llvm-svn: 122407
* MC/Mach-O/ARM: Fix thinko.Daniel Dunbar2010-12-221-1/+1
| | | | llvm-svn: 122406
* Use references and simplify.Rafael Espindola2010-12-223-8/+5
| | | | llvm-svn: 122405
* Simplify the handling of .size expressions.Rafael Espindola2010-12-222-27/+6
| | | | llvm-svn: 122404
* MC/Mach-O/ARM: Stub out RecordARMRelocation, which is mostly a copy ofDaniel Dunbar2010-12-221-1/+78
| | | | | | RecordRelocation with lots of FIXMEs. llvm-svn: 122402
* Simplify.Daniel Dunbar2010-12-221-6/+5
| | | | llvm-svn: 122401
* MC/Mach-O: Split out RecordARMRelocation for now, it is weird enough it isn'tDaniel Dunbar2010-12-221-0/+15
| | | | | | | clear how to keep in the generic path (yet). - Will revisit when it actually works. llvm-svn: 122400
* Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C)Duncan Sands2010-12-226-73/+154
| | | | | | | | if both A op B and A op C simplify. This fires fairly often but doesn't make that much difference. On gcc-as-one-file it removes two "and"s and turns one branch into a select. llvm-svn: 122399
* ptx: add ld instruction and testChe-Liang Chiou2010-12-227-22/+225
| | | | llvm-svn: 122398
* Add some statistics, good for understanding how much more powerfulDuncan Sands2010-12-222-16/+60
| | | | | | instcombine is compared to instsimplify. llvm-svn: 122397
* Fixes file extension for loadable modules on OS X.Oscar Fuentes2010-12-221-1/+7
| | | | | | Patch by Wesley Peck! llvm-svn: 122395
* Fix a bug in ReduceLoadWidth that wasn't handling extendingChris Lattner2010-12-222-4/+25
| | | | | | | | | | | | | | | | | | | | | loads properly. We miscompiled the testcase into: _test: ## @test movl $128, (%rdi) movzbl 1(%rdi), %eax ret Now we get a proper: _test: ## @test movl $128, (%rdi) movsbl (%rdi), %eax movzbl %ah, %eax ret This fixes PR8757. llvm-svn: 122392
* more cleanups, move a check for "roundedness" earlier to rejectChris Lattner2010-12-221-14/+20
| | | | | | unhanded cases faster and simplify code. llvm-svn: 122391
* reduce indentation and improve comments, no functionality change.Chris Lattner2010-12-221-51/+53
| | | | llvm-svn: 122389
* Don't generate carry bit when loading immediate values on the Microblaze.Wesley Peck2010-12-222-2/+2
| | | | llvm-svn: 122385
* Add support for some of the LLVM atomic operations to the MBlaze backend.Wesley Peck2010-12-223-156/+386
| | | | llvm-svn: 122384
* Modeling the carry bit in the MSR register of the MicroBlaze.Wesley Peck2010-12-223-83/+140
| | | | llvm-svn: 122381
* Fix a regression introduced into the MBlaze delay slot filler.Wesley Peck2010-12-221-6/+25
| | | | llvm-svn: 122379
* Give GVN back the ability to perform simple conditional propagation on ↵Owen Anderson2010-12-212-52/+137
| | | | | | | | | conditional branch values. I still think that LVI should be handling this, but that capability is some ways off in the future, and this matters for some significant benchmarks. llvm-svn: 122378
* GCC objects to the two sides of a conditional expression having different enumMatt Beaumont-Gay2010-12-211-2/+2
| | | | | | | types, but they're just getting converted to unsigned anyway, so cast first (and ask questions later). llvm-svn: 122377
* Remove dead code.Owen Anderson2010-12-211-9/+0
| | | | llvm-svn: 122371
* In DelayForLiveRegsBottomUp, handle instructions that read and writeAndrew Trick2010-12-211-15/+4
| | | | | | | the same physical register. Simplifies the fix from the previous checkin r122211. llvm-svn: 122370
* whitespaceAndrew Trick2010-12-211-42/+42
| | | | llvm-svn: 122368
* Reapply 122353-122355 with fixes. 122354 was wrong;Dale Johannesen2010-12-213-7/+44
| | | | | | | | the shift type was needed one place, the shift count type another. The transform in 123555 had the same problem. llvm-svn: 122366
* Add some x86 specific dagcombines for conditional increments.Benjamin Kramer2010-12-212-0/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | (add Y, (sete X, 0)) -> cmp X, 1; adc 0, Y (add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y (sub (sete X, 0), Y) -> cmp X, 1; sbb 0, Y (sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y for unsigned foo(unsigned a, unsigned b) { if (a == 0) b++; return b; } we now get: foo: cmpl $1, %edi movl %esi, %eax adcl $0, %eax ret instead of: foo: testl %edi, %edi sete %al movzbl %al, %eax addl %esi, %eax ret llvm-svn: 122364
* GVN's Expression is not POD-like (it contains a SmallVector). Simplify code ↵Benjamin Kramer2010-12-211-13/+3
| | | | | | while at it. llvm-svn: 122362
* Revert 122353-122355 for the moment, they broke stuff.Dale Johannesen2010-12-213-42/+6
| | | | llvm-svn: 122360
* Simplify EvaluateAsAbsolute now that EvaluateAsRelocatableImpl does allRafael Espindola2010-12-211-19/+5
| | | | | | the folding it can. llvm-svn: 122359
* Don't relax org or align. They change size as the relaxation happens, but theyRafael Espindola2010-12-212-62/+30
| | | | | | | are not actually relaxed. For example, a section with only alignments will never needs relaxation. llvm-svn: 122356
* Add a new transform to DAGCombiner.Dale Johannesen2010-12-212-0/+36
| | | | llvm-svn: 122355
* Get the type of a shift from the shift, not from its shiftDale Johannesen2010-12-212-4/+4
| | | | | | | | count operand. These should be the same but apparently are not always, and this is cleaner anyway. This improves the code in an existing test. llvm-svn: 122354
* Shift by the word size is invalid IR; don't create it.Dale Johannesen2010-12-211-2/+2
| | | | llvm-svn: 122353
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