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* [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.Daniel Sanders2016-05-0329-599/+710
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is much closer to the way MIPS relocation expressions work (%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the various bodges in MipsAsmParser::evaluateRelocExpr(). Removing those bodges ensures that the constant stored in MCValue is the full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used to correct the %hi/%lo matching needed to sort the relocation table correctly. As part of this: * Gave MCExpr::print() the ability to omit parenthesis when emitting a symbol reference inside a MipsMCExpr operator like %hi(X). Without this we print things like %lo(($L1)). * %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of the related special cases have been removed or moved to MipsMCExpr. We can remove the rest as we gain support for the less common relocations when they are not part of this specific combination. * Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_'). * fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical and merged into fixup_Mips_GOT. * MO_GOT16 and MO_GOT turned out to be identical and have been merged into MO_GOT. * VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they have been merged into MEK_GOT Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19716 llvm-svn: 268379
* [X86][SSSE3] Missing combine opportunity to simplify to a MOVQ shuffleSimon Pilgrim2016-05-031-0/+15
| | | | llvm-svn: 268378
* [AVX512] Add support for commutative MAX/MIN . In general VMAX{PS,PD} and ↵Igor Breger2016-05-032-2/+77
| | | | | | | | VMIN{PS,PD} instruction are not commutative . In combine pass only if UnsafeFPMath are used VMAX/VMAX are converted to commutative nodes VMAXC/VMAXC. Differential Revision: http://reviews.llvm.org/D19860 llvm-svn: 268375
* Mark that SpeculativeExecution preserves Globals Alias Analysis.Kristof Beyls2016-05-032-0/+28
| | | | | | | | | | | | | | | | | | | | A few benchmarks with lots of accesses to global variables in the hot loops regressed a lot since r266399, which added the SpeculativeExecution pass to the default pipeline. The problem is that this pass doesn't mark Globals Alias Analysis as preserved. Globals Alias Analysis is computed in a module pass, whereas SpeculativeExecution is a function pass, and a lot of passes dependent on the Globals Alias Analysis to optimize these benchmarks are also function passes. As such, the Globals Alias Analysis information cannot be recomputed between SpeculativeExecution and the following function passes needing that information. SpeculativeExecution doesn't invalidate Globals Alias Analysis, so mark it as such to fix those performance regressions. Differential Revision: http://reviews.llvm.org/D19806 llvm-svn: 268370
* [AVX512] Fix lowerV4X128VectorShuffle to select correctly input operands .Igor Breger2016-05-032-4/+50
| | | | | | Differential Revision: http://reviews.llvm.org/D19803 llvm-svn: 268368
* [lib/Object] Make this assertion more useful.Davide Italiano2016-05-031-3/+2
| | | | llvm-svn: 268367
* [CodeGen] Add some space optimized forms of EmitNode and MorphNodeTo that ↵Craig Topper2016-05-033-11/+33
| | | | | | | | implicitly indicate the number of result VTs. This shaves about 16K off the X86 matching table taking it down to about 470K. Overall this reduces the llc binary size with all in-tree targets by about 40K. llvm-svn: 268365
* Fix uppercase typoMatthias Braun2016-05-031-1/+1
| | | | llvm-svn: 268362
* Remove unused header, NFCVedant Kumar2016-05-031-1/+0
| | | | llvm-svn: 268361
* AArch64/optimizeCondBranch: Remove earlier kill flag when forming TBZMatthias Braun2016-05-032-0/+50
| | | | | | | This fixes -verify-machineinstrs complaints when compiling test-suite/SingleSource/Benchmarks/Shootout-C++/wordfreq.cpp llvm-svn: 268360
* test commitJack Liu2016-05-031-1/+1
| | | | llvm-svn: 268358
* [LoopUnroll] Unroll loops which have exit blocks to EH padsDavid Majnemer2016-05-034-16/+56
| | | | | | | | | | | | | We were overly cautious in our analysis of loops which have invokes which unwind to EH pads. The loop unroll transform is safe because it only clones blocks in the loop body, it does not try to split critical edges involving EH pads. Instead, move the necessary safety check to LoopUnswitch. N.B. The safety check for loop unswitch is covered by an existing test which fails without it. llvm-svn: 268357
* Change operation_not_supported to not_supported.Zachary Turner2016-05-031-1/+1
| | | | | | Apparently operation_not_supported is... not supported everywhere. llvm-svn: 268348
* [codeview] Maintain the type enum-to-classname mapping in the .def fileReid Kleckner2016-05-032-52/+40
| | | | | | This way it will be easy to stamp out something like a type visitor. llvm-svn: 268347
* Parse the TPI (type information) stream of PDB files.Zachary Turner2016-05-0315-5/+308
| | | | | | | | | | | | | | | This parses the TPI stream (stream 2) from the PDB file. This stream contains some header information followed by a series of codeview records. There is some additional complexity here in that alongside this stream of codeview records is a serialized hash table in order to efficiently query the types. We parse the necessary bookkeeping information to allow us to reconstruct the hash table, but we do not actually construct it yet as there are still a few things that need to be understood first. Differential Revision: http://reviews.llvm.org/D19840 Reviewed By: ruiu, rnk llvm-svn: 268343
* Move llvm-readobj/StreamWriter to Support.Zachary Turner2016-05-0315-126/+106
| | | | | | | | | We wish to re-use this from llvm-pdbdump, and it provides a nice way to print structured data in scoped format that could prove useful for many other dumping tools as well. Moving to support and changing name to ScopedPrinter to better reflect its purpose. llvm-svn: 268342
* ThinLTO: do not import function whose linkage prevents inlining.Mehdi Amini2016-05-035-24/+40
| | | | | | | | | | | There is not point in importing a "weak" or a "linkonce" function since we won't be able to inline it anyway. We already had a targeted check for WeakAny, this is using the same check on GlobalValue as the inline, i.e. isMayBeOverriddenLinkage() From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268341
* livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFCMatthias Braun2016-05-0313-29/+29
| | | | | | | The block must no be nullptr for the addLiveIns()/addLiveOuts() function. llvm-svn: 268340
* Moved test case for r268323 to DebugInfo/X86 to unbreak aarch64.Wolfgang Pieb2016-05-031-0/+0
| | | | llvm-svn: 268339
* Adding period to the end of a comment to test out commit access.Douglas Yung2016-05-031-1/+1
| | | | llvm-svn: 268337
* LivePhysRegs: Automatically determine presence of pristine regs.Matthias Braun2016-05-0310-35/+43
| | | | | | | | | | | | | | | | | | | | | | Remove the AddPristinesAndCSRs parameters from addLiveIns()/addLiveOuts(). We need to respect pristine registers after prologue epilogue insertion, Seeing that we got this wrong in at least two commits already, we should rather pay the small price to query MachineFrameInfo for it. There are three cases that did not set AddPristineAndCSRs to true even after register allocation: - ExecutionDepsFix: live-out registers are used as a hint that the register is used soon. This is not true for pristine registers so use the new addLiveOutsNoPristines() to maintain this behaviour. - SystemZShortenInst: Not setting AddPristineAndCSRs to true looks like a bug, should do the right thing automatically now. - StackMapLivenessAnalysis: Not adding pristine registers looks like a bug to me. Added a FIXME comment but maintain the current behaviour as a change may need to get coordinated with GC runtimes. llvm-svn: 268336
* MITests: Update libdeps.NAKAMURA Takumi2016-05-031-1/+2
| | | | llvm-svn: 268335
* NFC: An iterator for stepping through CodeView type stream in llvm-readobjAdrian McCarthy2016-05-021-39/+125
| | | | | | | | | | | | This is a small refactoring step toward moving CodeView type stream logic from llvm-readobj to a library. It abstracts the logic of stepping through the stream into an iterator class and updates llvm-readobj to use that iterator. This has no functional change; llvm-readobj produces identical output. The next step is to abstract the parsing of the different leaf types and then move that and the iterator into a library. Since this is my first contrib outside LLDB, please let me know if I'm messing up on any of the LLVM style guidelines, idioms, or patterns. Differential Revision: http://reviews.llvm.org/D19746 llvm-svn: 268334
* [MC] Create unique .pdata sections for every .text sectionReid Kleckner2016-05-0214-144/+308
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This adds a unique ID to the COFF section uniquing map, similar to the one we have for ELF. The unique id is not currently exposed via the assembler because we don't have a use case for it yet. Users generally create .pdata with the .seh_* family of directives, and the assembler internally needs to produce .pdata and .xdata sections corresponding to the code section. The association between .text sections and the assembler-created .xdata and .pdata sections is maintained as an ID field of MCSectionCOFF. The CFI-related sections are created with the given unique ID, so if more code is added to the same text section, we can find and reuse the CFI sections that were already created. Reviewers: majnemer, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19376 llvm-svn: 268331
* Add unittest for LiveIntervalAnalysis::handleMove()Matthias Braun2016-05-022-3/+309
| | | | | | | This re-applies r260905. It requires LiveIntervals to not require LiveVariables which was reverted and re-applied in r267954. llvm-svn: 268329
* [MachineBlockPlacement] Let the target optimize the branches at the end.Quentin Colombet2016-05-022-4/+17
| | | | | | | | | | | | | | | After the layout of the basic blocks is set, the target may be able to get rid of unconditional branches to fallthrough blocks that the generic code does not catch. This happens any time TargetInstrInfo::AnalyzeBranch is not able to analyze all the branches involved in the terminators sequence, while still understanding a few of them. In such situation, AnalyzeBranch can directly modify the branches if it has been instructed to do so. This patch takes advantage of that. llvm-svn: 268328
* [X86] Model FAULTING_LOAD_OP as a terminator and branch.Quentin Colombet2016-05-024-39/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | This operation may branch to the handler block and we do not want it to happen anywhere within the basic block. Moreover, by marking it "terminator and branch" the machine verifier does not wrongly assume (because of AnalyzeBranch not knowing better) the branch is analyzable. Indeed, the target was seeing only the unconditional branch and not the faulting load op and thought it was a simple unconditional block. The machine verifier was complaining because of that and moreover, other optimizations could have done wrong transformation! In the process, simplify the representation of the handler block in the faulting load op. Now, we directly reference the handler block instead of using a label. This has the benefits of: 1. MC knows how to issue a label for a BB, so leave that to it. 2. Accessing the target BB from its label is painful, whereas it is direct from a MBB operand. Note: The 2 bytes offset in implicit-null-check.ll comes from the fact the unconditional jumps are not removed anymore, as the whole terminator sequence is not analyzable anymore. Will fix it in a subsequence commit. llvm-svn: 268327
* Simplify. NFC.Rafael Espindola2016-05-021-4/+1
| | | | llvm-svn: 268326
* DebugInfo: Avoid propagating incorrect debug locations in SelectionDAG via CSE.Wolfgang Pieb2016-05-023-32/+138
| | | | | | | | | | | | | | | | | | Summary: When SelectionDAG performs CSE it is possible that the context's source location is different from that of the selected node. This can lead to incorrect line number records. We update the debug location to the one that occurs earlier in the instruction sequence. This fixes PR21006. Reviewers: echristo, sdmitrouk Subscribers: jevinskie, asl, llvm-commits Differential Revision: http://reviews.llvm.org/D12094 llvm-svn: 268323
* Revert "ThinLTO: do not import function whose linkage prevents inlining."Mehdi Amini2016-05-024-38/+22
| | | | | | | This reverts commit r268315, the tests are not passing. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268317
* [llvm-pdbdump] Fix read past EOF when file is too small.Zachary Turner2016-05-021-0/+4
| | | | llvm-svn: 268316
* ThinLTO: do not import function whose linkage prevents inlining.Mehdi Amini2016-05-024-22/+38
| | | | | | | | | | | There is not point in importing a "weak" or a "linkonce" function since we won't be able to inline it anyway. We already had a targeted check for WeakAny, this is using the same check on GlobalValue as the inline, i.e. isMayBeOverriddenLinkage() From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268315
* Fix llvm-size to exit with non zero when it can’t open a file.Kevin Enderby2016-05-022-2/+6
| | | | | | rdar://26027819 llvm-svn: 268313
* Remove redundant return, NFCVedant Kumar2016-05-021-1/+0
| | | | llvm-svn: 268312
* Fix a typo, NFCVedant Kumar2016-05-021-1/+1
| | | | llvm-svn: 268311
* [X86][SSE] Added placeholder for 128/256-bit wide shuffle combinesSimon Pilgrim2016-05-021-6/+14
| | | | | | Begun adding placeholder for future support for vperm2f128/vshuff64x2 style 128/256-bit wide shuffles llvm-svn: 268306
* Don't try to create thin bsd archives.Rafael Espindola2016-05-023-1/+9
| | | | | | Not such variant has been specified yet. llvm-svn: 268305
* [dsymutil] Create the temporary files in the system temp directory.Frederic Riss2016-05-022-6/+7
| | | | | | | | | | llvm-dsymutil used to create the temporary files in the output directory. This works fine except when the output directory contains a '%' char, which is then replaced by llvm::sys::fs::createUniqueFile() generating an invalid path. Just use the default temp dir for those files. llvm-svn: 268304
* Code refactoring -- preparation for new PM porting /NFCXinliang David Li2016-05-021-9/+19
| | | | llvm-svn: 268301
* [codeview] Isolate type dumping from object file stateReid Kleckner2016-05-021-18/+38
| | | | | | | | | | | | | | This isolates the state we use for type dumping from the knowledge of object files. We can use CVTypeDumper to dump types from anywhere in memory now. NFC Reviewers: zturner Differential Revision: http://reviews.llvm.org/D19824 llvm-svn: 268300
* Thread Expected<...> up from libObject’s getType() for symbols to allow ↵Kevin Enderby2016-05-0226-106/+229
| | | | | | | | | | | | | | | | | | | | | | llvm-objdump to produce a good error message. Produce another specific error message for a malformed Mach-O file when a symbol’s section index is more than the number of sections. The existing test case in test/Object/macho-invalid.test for macho-invalid-section-index-getSectionRawName now reports the error with the message indicating that a symbol at a specific index has a bad section index and that bad section index value. Again converting interfaces to Expected<> from ErrorOr<> does involve touching a number of places. Where the existing code reported the error with a string message or an error code it was converted to do the same. Also there some were bugs in the existing code that did not deal with the old ErrorOr<> return values.  So now with Expected<> since they must be checked and the error handled, I added a TODO and a comment: "// TODO: Actually report errors helpfully" and a call something like consumeError(NameOrErr.takeError()) so the buggy code will not crash since needed to deal with the Error. llvm-svn: 268298
* AMDGPU: Custom lower v2i32 loads and storesMatt Arsenault2016-05-022-8/+137
| | | | | | | This will allow us to split up 64-bit private accesses when necessary. llvm-svn: 268296
* AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratchTom Stellard2016-05-022-3/+2
| | | | | | | | | We were using v_readlane_b32 with the lane set to zero, but this won't work if thread 0 is not active. Differential Revision: http://reviews.llvm.org/D19745 llvm-svn: 268295
* AMDGPU: Make i64 loads/stores promote to v2i32Matt Arsenault2016-05-026-73/+26
| | | | | | | | | | | | Now that unaligned access expansion should not attempt to produce i64 accesses, we can remove the hack in PreprocessISelDAG where this is done. This allows splitting i64 private accesses while allowing the new add nodes indexing the vector components can be folded with the base pointer arithmetic. llvm-svn: 268293
* [LVI] Add an API to LazyValueInfo so that it can export ConstantRangesJohn Regehr2016-05-022-0/+22
| | | | | | | | | that it computes. Currently this is used for testing and precision tuning, but it might be used by optimizations later. Differential Revision: http://reviews.llvm.org/D19179 llvm-svn: 268291
* [X86][AVX2] Added 128-bit wide shuffle testSimon Pilgrim2016-05-021-0/+14
| | | | | | Demonstrate missing 128-bit wide shuffle combine support llvm-svn: 268290
* Fix instance of -Winconsistent-missing-override in AMDGPU codeReid Kleckner2016-05-021-1/+1
| | | | llvm-svn: 268289
* Revert "[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for ↵Reid Kleckner2016-05-025-418/+59
| | | | | | | | | | | empty block including lifetime intrinsics" This reverts commit r268254. This change causes assertion failures while building Chromium. Reduced test case coming soon. llvm-svn: 268288
* AMDGPU/SI: Set the kill flag on temp VGPRs used to restore SGPRs from scratchTom Stellard2016-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | Summary: When we restore an SGPR value from scratch, we first load it into a temporary VGPR and then use v_readlane_b32 to copy the value from the VGPR back into an SGPR. We weren't setting the kill flag on the VGPR in the v_readlane_b32 instruction, so the register scavenger wasn't able to re-use this temp value later. I wasn't able to create a lit test for this. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19744 llvm-svn: 268287
* Fix typosPiotr Padlewski2016-05-021-1/+1
| | | | llvm-svn: 268281
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