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* ScalarOpts: Use std::list for Candidates, NFCDuncan P. N. Exon Smith2016-09-111-2/+3
| | | | | | | There is nothing intrusive about the Candidate list; use std::list over llvm::ilist for simplicity. llvm-svn: 281177
* ScalarOpts: Sort includes, NFCDuncan P. N. Exon Smith2016-09-111-2/+1
| | | | llvm-svn: 281176
* ADT: Remove ilist_iterator::reset(), NFCDuncan P. N. Exon Smith2016-09-112-3/+1
| | | | | | | | ilist_iterator::reset was unnecessary API, and wasn't any clearer (or safer) at the call site than constructing a temporary and assigning it to the iterator. llvm-svn: 281175
* [ORC] Fix the RPC unit test for header changes in r281171.Lang Hames2016-09-111-2/+2
| | | | llvm-svn: 281173
* CodeGen: Give MachineBasicBlock::reverse_iterator a handle to the current MIDuncan P. N. Exon Smith2016-09-1114-70/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that MachineBasicBlock::reverse_instr_iterator knows when it's at the end (since r281168 and r281170), implement MachineBasicBlock::reverse_iterator directly on top of an ilist::reverse_iterator by adding an IsReverse template parameter to MachineInstrBundleIterator. This replaces another hard-to-reason-about use of std::reverse_iterator on list iterators, matching the changes for ilist::reverse_iterator from r280032 (see the "out of scope" section at the end of that commit message). MachineBasicBlock::reverse_iterator now has a handle to the current node and has obvious invalidation semantics. r280032 has a more detailed explanation of how list-style reverse iterators (invalidated when the pointed-at node is deleted) are different from vector-style reverse iterators like std::reverse_iterator (invalidated on every operation). A great motivating example is this commit's changes to lib/CodeGen/DeadMachineInstructionElim.cpp. Note: If your out-of-tree backend deletes instructions while iterating on a MachineBasicBlock::reverse_iterator or converts between MachineBasicBlock::iterator and MachineBasicBlock::reverse_iterator, you'll need to update your code in similar ways to r280032. The following table might help: [Old] ==> [New] delete &*RI, RE = end() delete &*RI++ RI->erase(), RE = end() RI++->erase() reverse_iterator(I) std::prev(I).getReverse() reverse_iterator(I) ++I.getReverse() --reverse_iterator(I) I.getReverse() reverse_iterator(std::next(I)) I.getReverse() RI.base() std::prev(RI).getReverse() RI.base() ++RI.getReverse() --RI.base() RI.getReverse() std::next(RI).base() RI.getReverse() (For more details, have a look at r280032.) llvm-svn: 281172
* [ORC] Rename RPCChannel to RPCByteChannel. NFC.Lang Hames2016-09-116-44/+46
| | | | llvm-svn: 281171
* CodeGen: Assert that bundle iterators are validDuncan P. N. Exon Smith2016-09-113-11/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | Add an assertion to the MachineInstrBundleIterator from instr_iterator that the underlying iterator is valid. This is possible know that we can check ilist_node::isSentinel (since r281168), and is consistent with the constructors from MachineInstr* and MachineInstr&. Avoiding the new assertion in operator== and operator!= requires four (!!!!) new overloads each. (As an aside, I'm strongly in favour of: - making the conversion from instr_iterator explicit; - making the conversion from pointer explicit; - making the conversion from reference explicit; and - removing all the extra overloads of operator== and operator!= except const_instr_iterator. I'm not signing up for that at this point, but being clear about when something is an MachineInstr-iterator (possibly instr_end()) vs MachineInstr-bundle-iterator (possibly end()) vs MachineInstr* (possibly nullptr) vs MachineInstr& (known valid) would surely make code cleaner... and it would remove a ton of boilerplate from MachineInstrBundleIterator operators.) llvm-svn: 281170
* Fix the modules build after r281167Duncan P. N. Exon Smith2016-09-111-0/+2
| | | | | | | Add an #include for <type_traits> to llvm/ADT/ilist_node_options.h to make it standalone. llvm-svn: 281169
* CodeGen: Turn on sentinel tracking for MachineInstr iteratorsDuncan P. N. Exon Smith2016-09-115-11/+15
| | | | | | | | | | | | | | | | | | | | This is a prep commit before fixing MachineBasicBlock::reverse_iterator invalidation semantics, ala r281167 for ilist::reverse_iterator. This changes MachineBasicBlock::Instructions to track which node is the sentinel regardless of LLVM_ENABLE_ABI_BREAKING_CHECKS. There's almost no functionality change (aside from ABI). However, in the rare configuration: #if !defined(NDEBUG) && !defined(LLVM_ENABLE_ABI_BREAKING_CHECKS) the isKnownSentinel() assertions in ilist_iterator<>::operator* suddenly have teeth for MachineInstr. If these assertions start firing for your out-of-tree backend, have a look at the suggestions in the commit message for r279314, and at some of the commits leading up to it that avoid dereferencing the end() iterator. llvm-svn: 281168
* ADT: Add sentinel tracking and custom tags to ilistsDuncan P. N. Exon Smith2016-09-1114-156/+642
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds two declarative configuration options for intrusive lists (available for simple_ilist, iplist, and ilist). Both of these options affect ilist_node interoperability and need to be passed both to the node and the list. Instead of adding a new traits class, they're specified as optional template parameters (in any order). The two options: 1. Pass ilist_sentinel_tracking<true> or ilist_sentinel_tracking<false> to control whether there's a bit on ilist_node "prev" pointer indicating whether it's the sentinel. The default behaviour is to use a bit if and only if LLVM_ENABLE_ABI_BREAKING_CHECKS. 2. Pass ilist_tag<TagA> and ilist_tag<TagB> to allow insertion of a single node into two different lists (simultaneously). I have an immediate use-case for (1) ilist_sentinel_tracking: fixing the validation semantics of MachineBasicBlock::reverse_iterator to match ilist::reverse_iterator (ala r280032: see the comments at the end of the commit message there). I'm adding (2) ilist_tag in the same commit to validate that the options framework supports expansion. Justin Bogner mentioned this might enable a possible cleanup in SelectionDAG, but I'll leave this to others to explore. In the meantime, the unit tests and the comments for simple_ilist and ilist_node have usage examples. Note that there's a layer of indirection to support optional, out-of-order, template paramaters. Internal classes are templated on an instantiation of the non-variadic ilist_detail::node_options. User-facing classes use ilist_detail::compute_node_options to compute the correct instantiation of ilist_detail::node_options. The comments for ilist_detail::is_valid_option describe how to add new options (e.g., ilist_packed_int<int NumBits>). llvm-svn: 281167
* [AVX512] Fix pattern for vgetmantsd and all other instructions that use same ↵Igor Breger2016-09-111-8/+1
| | | | | | | | class. Fix memory operand size, remove unnecessary pattern. Differential Revision: http://reviews.llvm.org/D24443 llvm-svn: 281164
* Fixup failing debuginfo test for change in SimplifyCFG.James Molloy2016-09-111-2/+1
| | | | | | This reverts this test back to its original pre-r280364 behaviour as we don't sink allocas any more. llvm-svn: 281163
* [SimplifyCFG] Be even more conservative in SinkThenElseCodeToEndJames Molloy2016-09-113-29/+44
| | | | | | | | This should *actually* fix PR30244. This cranks up the workaround for PR30188 so that we never sink loads or stores of allocas. The idea is that these should be removed by SROA/Mem2Reg, and any movement of them may well confuse SROA or just cause unwanted code churn. It's not ideal that the midend should be crippled like this, but that unwanted churn can really cause significant regressions in important workloads (tsan). llvm-svn: 281162
* [AArch64] Fixup test after r281160James Molloy2016-09-111-1/+1
| | | | | | How I missed this locally is beyond me. I suspect llc didn't recompile. This is just changing the CHECK line back to what it was before r280364. llvm-svn: 281161
* [SimplifyCFG] Harden up the profitability heuristic for block splitting ↵James Molloy2016-09-112-8/+72
| | | | | | | | | | | | during sinking Exposed by PR30244, we will split a block currently if we think we can sink at least one instruction. However this isn't right - the reason we split predecessors is so that we can sink instructions that otherwise couldn't be sunk because it isn't safe to do so - stores, for example. So, change the heuristic to only split if it thinks it can sink at least one non-speculatable instruction. Should fix PR30244. llvm-svn: 281160
* [CodeGen] Make the TwoAddressInstructionPass check if the instruction is ↵Craig Topper2016-09-111-1/+4
| | | | | | commutable before calling findCommutedOpIndices for every operand. Also make sure the operand is a register before each call to save some work on commutable instructions that might have an operand. llvm-svn: 281158
* [AVX-512] Add test cases to demonstrate opportunities for commuting ↵Craig Topper2016-09-111-0/+529
| | | | | | vpternlog. Commuting will be added in a future commit. llvm-svn: 281157
* [AVX-512] Add VPTERNLOG to load folding tables.Craig Topper2016-09-112-0/+36
| | | | llvm-svn: 281156
* [X86] Side effecting asm in AVX512 integer stack folding test should return ↵Craig Topper2016-09-111-20/+20
| | | | | | 2 x i64 not 8 x i64. llvm-svn: 281155
* [X86] Make a helper method into a static function local to the cpp file.Craig Topper2016-09-112-11/+10
| | | | llvm-svn: 281154
* Add handling of !invariant.load to PropagateMetadata.Justin Lebar2016-09-112-6/+23
| | | | | | | | | | | | | | Summary: This will let e.g. the load/store vectorizer propagate this metadata appropriately. Reviewers: arsenm Subscribers: tra, jholewinski, hfinkel, mzolotukhin Differential Revision: https://reviews.llvm.org/D23479 llvm-svn: 281153
* [NVPTX] Use ldg for explicitly invariant loads.Justin Lebar2016-09-112-13/+49
| | | | | | | | | | | | | | | | | | Summary: With this change (plus some changes to prevent !invariant from being clobbered within llvm), clang will be able to model the __ldg CUDA builtin as an invariant load, rather than as a target-specific llvm intrinsic. This will let the optimizer play with these loads -- specifically, we should be able to vectorize them in the load-store vectorizer. Reviewers: tra Subscribers: jholewinski, hfinkel, llvm-commits, chandlerc Differential Revision: https://reviews.llvm.org/D23477 llvm-svn: 281152
* [CodeGen] Split out the notions of MI invariance and MI dereferenceability.Justin Lebar2016-09-1124-70/+112
| | | | | | | | | | | | | | | | | | | Summary: An IR load can be invariant, dereferenceable, neither, or both. But currently, MI's notion of invariance is IR-invariant && IR-dereferenceable. This patch splits up the notions of invariance and dereferenceability at the MI level. It's NFC, so adds some probably-unnecessary "is-dereferenceable" checks, which we can remove later if desired. Reviewers: chandlerc, tstellarAMD Subscribers: jholewinski, arsenm, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D23371 llvm-svn: 281151
* MCInstrDesc: Flags (uint64_t) was checked using (1 << MCID::XYZ), but this Sjoerd Meijer2016-09-101-32/+32
| | | | | | | | | should have been (1ULL << MCID::XYZ). Currently this works because enum Flag has 31 values, but extending it will result in a compile warnings/errors. This was part of the accepted patch in https://reviews.llvm.org/D23601, but it was suggested to apply this first as a separate patch. llvm-svn: 281149
* It should also be legal to pass a swifterror parameter to a call as a swifterrorArnold Schwaighofer2016-09-103-8/+82
| | | | | | | | argument. rdar://28233388 llvm-svn: 281147
* [llvm-cov] Move the 'jump to first unexecuted line' linkVedant Kumar2016-09-107-39/+36
| | | | | | | Having it in the same row as the source name is jarring. Move it next to the "Source" column label. llvm-svn: 281146
* [llvm-cov] Minor visual tweaks for html reportsVedant Kumar2016-09-106-76/+35
| | | | | | | - Change the location of the 'Region Coverage' column. - Use less css and text for some labels. llvm-svn: 281145
* InstCombine: Don't combine loads/stores from swifterror to a new typeArnold Schwaighofer2016-09-103-0/+41
| | | | | | | | | This generates invalid IR: the only users of swifterror can be call arguments, loads, and stores. rdar://28242257 llvm-svn: 281144
* Add an isSwiftError predicate to ValueArnold Schwaighofer2016-09-102-0/+16
| | | | llvm-svn: 281143
* ADT: Move ilist_node_access to ilist_detail::NodeAccess...Duncan P. N. Exon Smith2016-09-105-29/+60
| | | | | | | | | | | | | | | | | ... and make a few ilist-internal API changes, in preparation for changing how ilist_node is templated. The only effect for ilist users should be changing the friend target from llvm::ilist_node_access to llvm::ilist_detail::NodeAccess (which is only necessary when they inherit privately from ilist_node). - Split out SpecificNodeAccess, which has overloads of getNodePtr and getValuePtr that are untemplated. - Use more typedefs to prevent more changes later. - Force inheritance to use *NodeAccess (to emphasize that ilist *users* shouldn't be doing this). There should be no functionality change here. llvm-svn: 281142
* ADT: Use typedefs for ilist_base and ilist_node_base, NFCDuncan P. N. Exon Smith2016-09-103-42/+48
| | | | | | | This is a prep commit to minimize changes in a follow-up that is adding a template parameter to ilist_node_base and ilist_base. llvm-svn: 281141
* [InstCombine] clean up foldICmpBinOpEqualityWithConstant / ↵Sanjay Patel2016-09-101-59/+56
| | | | | | | | | foldICmpIntrinsicWithConstant ; NFC 1. Rename variables to be consistent with related/preceding code (may want to reorganize). 2. Fix comments/formatting. llvm-svn: 281140
* [InstCombine] rename and reorganize some icmp folding functions; NFCSanjay Patel2016-09-102-24/+23
| | | | | | | | | | Everything under foldICmpInstWithConstant() should now be working for splat vectors via m_APInt matchers. Ie, I've removed all of the FIXMEs that I added while cleaning that section up. Note that not all of the associated FIXMEs in the regression tests are gone though, because some of the tests require earlier folds that are still scalar-only. llvm-svn: 281139
* We also need to pass swifterror in R12 under swiftcc not only under cccArnold Schwaighofer2016-09-102-0/+25
| | | | | | rdar://28190687 llvm-svn: 281138
* [AMDGPU] Refactor MUBUF/MTBUF instructionsValery Pykhtin2016-09-106-1168/+1306
| | | | | | Differential revision: https://reviews.llvm.org/D24295 llvm-svn: 281137
* [gold/LTO] Add test case for r281134Teresa Johnson2016-09-101-0/+10
| | | | | | Add test case that was supposed to go in with r281134. llvm-svn: 281135
* [LTO] Handle null GV in Symbol objectTeresa Johnson2016-09-101-0/+2
| | | | | | | | | Similar to other Symbol methods, have Symbol::getComdat handle a null GV gracefully. Fixes PR30326. llvm-svn: 281134
* [WebAssembly] Fix typos in commentsHeejin Ahn2016-09-101-11/+14
| | | | llvm-svn: 281131
* [libFuzzer] print a failed-merge warning only in the merge modeKostya Serebryany2016-09-101-0/+1
| | | | llvm-svn: 281130
* AMDGPU: Implement is{LoadFrom|StoreTo}FrameIndexMatt Arsenault2016-09-106-21/+90
| | | | llvm-svn: 281128
* AMDGPU: Fix scheduling info for spill pseudosMatt Arsenault2016-09-101-2/+3
| | | | | | | These defaulted to Write32Bit. I don't think this actually matters since these don't exist during scheduling. llvm-svn: 281127
* [asan] Add flag to allow lifetime analysis of problematic allocasVitaly Buka2016-09-102-6/+15
| | | | | | | | | | | | | | Summary: Could be useful for comparison when we suspect that alloca was skipped because of this. Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24437 llvm-svn: 281126
* [CodeGen] Rename MachineInstr::isInvariantLoad to ↵Justin Lebar2016-09-109-22/+24
| | | | | | | | | | | | | | | | | | | | isDereferenceableInvariantLoad. NFC Summary: I want to separate out the notions of invariance and dereferenceability at the MI level, so that they correspond to the equivalent concepts at the IR level. (Currently an MI load is MI-invariant iff it's IR-invariant and IR-dereferenceable.) First step is renaming this function. Reviewers: chandlerc Subscribers: MatzeB, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D23370 llvm-svn: 281125
* [libFuzzer] don't print help for internal flags Kostya Serebryany2016-09-102-0/+3
| | | | llvm-svn: 281124
* [libFuzzer] print a visible message if merge fails due to a crash Kostya Serebryany2016-09-103-0/+24
| | | | llvm-svn: 281122
* Remove dead code in the SelectionDAG headers (NFC)Vedant Kumar2016-09-102-13/+0
| | | | | | | | | | | I tested this with "ninja check-llvm-codegen" on a Release build with all architectures enabled, and again with a Debug build on x86. Found with llvm-cov. Differential Revision: https://reviews.llvm.org/D24433 llvm-svn: 281120
* AMDGPU: Fix immediate folding logic when shrinking instructionsMatt Arsenault2016-09-0910-39/+43
| | | | | | | | | | If the literal is being folded into src0, it doesn't matter if it's an SGPR because it's being replaced with the literal. Also fixes initially selecting 32-bit versions of some instructions which also confused commuting. llvm-svn: 281117
* Inliner: Don't mark swifterror allocas with lifetime markersArnold Schwaighofer2016-09-092-0/+20
| | | | | | | | | This would create a bitcast use which fails the verifier: swifterror values may only be used by loads, stores, and as function arguments. rdar://28233244 llvm-svn: 281114
* X86: Fold tail calls into conditional branches also for 64-bit (PR26302)Hans Wennborg2016-09-096-15/+44
| | | | | | | | | This extends the optimization in r280832 to also work for 64-bit. The only quirk is that we can't do this for 64-bit Windows (yet). Differential Revision: https://reviews.llvm.org/D24423 llvm-svn: 281113
* AMDGPU: Run LoadStoreVectorizer pass by defaultMatt Arsenault2016-09-099-24/+25
| | | | llvm-svn: 281112
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