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* Make x86 REP_MOV* and REP_STO instructions use the correct operand sizes in ↵Lang Hames2012-03-292-25/+59
| | | | | | 64-bit mode. llvm-svn: 153680
* Fix missed files in JIT unittests MakefileDanil Malyshev2012-03-291-1/+2
| | | | llvm-svn: 153672
* Expand FREM.Akira Hatanaka2012-03-292-0/+15
| | | | llvm-svn: 153671
* Add more constness to CodeGenRegisters.Jakob Stoklund Olesen2012-03-293-7/+7
| | | | llvm-svn: 153667
* Don't PRE compares.Jakob Stoklund Olesen2012-03-292-1/+76
| | | | | | | | | | | | CodeGenPrepare sinks compare instructions down to their uses to prevent live flags and predicate registers across basic blocks. PRE of a compare instruction prevents that, forcing the i1 compare result into a general purpose register. That is usually more expensive than the redundant compare PRE was trying to eliminate in the first place. llvm-svn: 153657
* Replace assert(0) with llvm_unreachable to avoid warnings about dropping off ↵Benjamin Kramer2012-03-291-6/+5
| | | | | | the end of a non-void function in Release builds. llvm-svn: 153643
* Add support for objc property decls according to the page at:Eric Christopher2012-03-296-15/+65
| | | | | | | | | | http://llvm.org/docs/SourceLevelDebugging.html#objcproperty including type and DECL. Expand the metadata needed accordingly. rdar://11144023 llvm-svn: 153639
* Make some headway towards compiling all of LLVM.Bill Wendling2012-03-292-36/+55
| | | | | | | | | | | | | | | | | Module-level ASM may contain definitions of functions and globals. However, we were not telling the linker that these globals had definitions. As far as it was concerned, they were just declarations. Attempt to resolve this by inserting module-level ASM functions and globals into the '_symbol' set so that the linker will know that they have values. This gets us further towards our goal of compiling LLVM, but it still has problems when linking libLTO.dylib because of the `-dead_strip' flag that's passed to the linker. <rdar://problem/11124216> llvm-svn: 153638
* Only allow symbolic names for (v)cmpss/sd/ps/pd encodings 8-31 to be used ↵Craig Topper2012-03-291-12/+13
| | | | | | with 'v' version of instructions. llvm-svn: 153636
* For X86, change load/dec-or-inc/store into dec-or-inc, respectively.Joel Jones2012-03-293-101/+273
| | | | | | | | | | | | | | | | | This is a code change to add support for changing instruction sequences of the form: load inc/dec of 8/16/32/64 bits store into the appropriate X86 inc/dec through memory instruction: inc[qlwb] / dec[qlwb] The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode. The comments have also been expanded. llvm-svn: 153635
* Cleanup whitespace.Bill Wendling2012-03-291-15/+12
| | | | llvm-svn: 153634
* Cache the end() iterator.Bill Wendling2012-03-291-3/+3
| | | | llvm-svn: 153632
* Reverted to revision 153616 to unblock buildJoel Jones2012-03-293-273/+101
| | | | llvm-svn: 153623
* For X86, change load/dec-or-inc/store into dec-or-inc, respectively.Joel Jones2012-03-293-101/+273
| | | | | | | | | | | | | | | | | This is a code change to add support for changing instruction sequences of the form: load inc/dec of 8/16/32/64 bits store into the appropriate X86 inc/dec through memory instruction: inc[qlwb] / dec[qlwb] The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode. The comments have also been expanded. llvm-svn: 153617
* Enable machine code verification in the entire code generator.Jakob Stoklund Olesen2012-03-283-15/+5
| | | | | | | | | | Some targets still mess up the liveness information, but that isn't verified after MRI->invalidateLiveness(). The verifier can still check other useful things like register classes and CFG, so it should be enabled after all passes. llvm-svn: 153615
* Enable machine code verification after PreSched2 passes.Jakob Stoklund Olesen2012-03-282-2/+4
| | | | | | | | | | The late scheduler depends on accurate liveness information if it is breaking anti-dependencies, so we should be able to verify it. Relax the terminator checking in the machine code verifier so it can handle the basic blocks created by if conversion. llvm-svn: 153614
* Cleanup some whitespaces.Bill Wendling2012-03-282-136/+132
| | | | llvm-svn: 153612
* Don't kill the base register when expanding strd.Jakob Stoklund Olesen2012-03-282-0/+19
| | | | | | | | | | | | | | When an strd instruction doesn't get the registers it wants, it can be expanded into two str instructions. Make sure the first str doesn't kill the base register in the case where the base and data registers are identical: t2STRi12 %R0<kill>, %R0, 4, pred:14, pred:%noreg t2STRi12 %R2<kill>, %R0, 8, pred:14, pred:%noreg <rdar://problem/11101911> llvm-svn: 153611
* Preserve implicit defs in ARMLoadStoreOptimizer.Jakob Stoklund Olesen2012-03-282-4/+23
| | | | | | | | | | | When a number of sub-register VLRDS instructions are combined into a VLDM, preserve any super-register implicit defs. This is required to keep the register scavenger and machine code verifier happy. Enable machine code verification after ARMLoadStoreOptimizer. ARM/2012-01-26-CopyPropKills.ll was failing because of this. llvm-svn: 153610
* Tidy up. Whitespace.Jim Grosbach2012-03-281-3/+3
| | | | llvm-svn: 153609
* Move getPointerToNamedFunction() from JIT/MCJIT to JITMemoryManager.Danil Malyshev2012-03-2814-332/+233
| | | | llvm-svn: 153607
* Handle intrinsics in GlobalsModRef. Fixes pr12351.Rafael Espindola2012-03-282-0/+39
| | | | llvm-svn: 153604
* Spill DPair registers, not just QPR.Jakob Stoklund Olesen2012-03-284-7/+22
| | | | | | | | | The arm_neon intrinsics can create virtual registers from the DPair register class which allows both even-odd and odd-even D-register pairs. This fixes PR12389. llvm-svn: 153603
* Also verify after ExpandPostRAPseudos.Jakob Stoklund Olesen2012-03-281-1/+1
| | | | llvm-svn: 153599
* Inline function into its one caller.Bill Wendling2012-03-281-7/+2
| | | | llvm-svn: 153598
* Enable machine code verification after the late machine optimization passes.Jakob Stoklund Olesen2012-03-281-3/+3
| | | | | | | Branch folding invalidates liveness and disables liveness verification on some targets. llvm-svn: 153597
* Skip liveness verification when MRI->tracksLiveness() is false.Jakob Stoklund Olesen2012-03-281-105/+112
| | | | | | | | | Extract the liveness verification into its own method. This makes it possible to run the machine code verifier after liveness information is no longer required to be valid. llvm-svn: 153596
* Reformat the LTOModule code to be more inline with LLVM's coding standards. AddBill Wendling2012-03-282-105/+170
| | | | | | a bunch of comments for the various functions. No intended functionality change. llvm-svn: 153595
* Revert r153516: "Invalidate liveness in Thumb2ITBlockPass."Jakob Stoklund Olesen2012-03-282-8/+0
| | | | | | | | | | | | | | Revert r153519: "ARMLoadStoreOptimizer invalidates register liveness." These patches caused miscompilations in povray by turning off branch folding's updating of live-in lists. It turns out the the late scheduler depends on the live-in lists, even if it doesn't need correct kill flags. <rdar://problem/11139228> llvm-svn: 153593
* Allow removeLiveIn to be called with a register that isn't live-in.Jakob Stoklund Olesen2012-03-281-2/+2
| | | | | | | | | This avoids the silly double search: if (isLiveIn(Reg)) removeLiveIn(Reg); llvm-svn: 153592
* Revert r153521 as it's causing large regressions on the nightly testers.Chad Rosier2012-03-283-56/+0
| | | | | | | | Original commit message for r153521 (aka r153423): Use the new range metadata in computeMaskedBits and add a new optimization to instruction simplify that lets us remove an and when loding a boolean value. llvm-svn: 153587
* Fixed commuteInstructions bug where if its called pre-regalloc the subreg ↵Pete Cooper2012-03-281-6/+15
| | | | | | indices weren't commuted llvm-svn: 153579
* GlobalOpt: If we have an inbounds GEP from a ConstantAggregateZero global ↵Benjamin Kramer2012-03-282-0/+17
| | | | | | that we just determined to be constant, replace all loads from it with a zero value. llvm-svn: 153576
* Add another note about a missed compare with nsw arithmetic instcombine.Benjamin Kramer2012-03-281-0/+7
| | | | llvm-svn: 153574
* Fixup VST1.32 with writeback instruction. Also re-factor non-writeback version.Richard Barton2012-03-282-21/+21
| | | | llvm-svn: 153573
* Switch to WeakVHs in the value mapper, and aggressively prune dead basicChandler Carruth2012-03-283-14/+24
| | | | | | | | | blocks in the function cloner. This removes the last case of trivially dead code that I've been seeing in the wild getting inlined, analyzed, re-inlined, optimized, only to be deleted. Nukes a FIXME from the cleanup tests. llvm-svn: 153572
* More debug output.Eric Christopher2012-03-281-1/+2
| | | | llvm-svn: 153571
* Fix the output of the DW_TAG_friend tag to include DW_AT_friendEric Christopher2012-03-283-8/+63
| | | | | | | | and not the rest of the member tag. Fixes PR11695 llvm-svn: 153570
* Some whitespace cleanup.Bill Wendling2012-03-281-19/+14
| | | | llvm-svn: 153567
* Use the correct filename for the error message.Bill Wendling2012-03-281-1/+1
| | | | llvm-svn: 153564
* Use Nakamura's suggestion of bypassing using 'filename' and just the ↵Bill Wendling2012-03-281-5/+2
| | | | | | pointers directly. llvm-svn: 153558
* Turn off post-RA scheduler by default.Akira Hatanaka2012-03-281-1/+1
| | | | llvm-svn: 153557
* Fix 80-column violation.Chad Rosier2012-03-281-2/+2
| | | | llvm-svn: 153556
* Fix test case.Akira Hatanaka2012-03-281-0/+2
| | | | llvm-svn: 153555
* Turn on post register allocation scheduler.Akira Hatanaka2012-03-284-0/+22
| | | | llvm-svn: 153554
* Sort relocation entries before they are written out to a file. MIPS ABIAkira Hatanaka2012-03-281-0/+103
| | | | | | | imposes a constraint that GOT16 referring to a local symbol or HI16 has to be followed immediately by a matching LO16 relocation. llvm-svn: 153553
* Emit all directives except for ".cprestore" during asm printing rather than emitAkira Hatanaka2012-03-287-151/+188
| | | | | | | | | | | | | | | | them as machine instructions. Directives ".set noat" and ".set at" are now emitted only at the beginning and end of a function except in the case where they are emitted to enclose .cpload with an immediate operand that doesn't fit in 16-bit field or unaligned load/stores. Also, make the following changes: - Remove function isUnalignedLoadStore and use a switch-case statement to determine whether an instruction is an unaligned load or store. - Define helper function CreateMCInst which generates an instance of an MCInst from an opcode and a list of operands. llvm-svn: 153552
* Mark flag neverHasSideEffects of pattern-less instructions that do not haveAkira Hatanaka2012-03-281-0/+5
| | | | | | any side effects. llvm-svn: 153551
* MSVC doesn't like the mixing of declarations and statements in a .c file.Francois Pichet2012-03-271-1/+2
| | | | llvm-svn: 153549
* Add a note about a cute little fabs optimization.Benjamin Kramer2012-03-271-0/+5
| | | | llvm-svn: 153543
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