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* Simplify the logic, NFC.Rafael Espindola2015-06-241-12/+8
| | | | llvm-svn: 240554
* ADTTests: merge #ifdef checks from r240436.Alex Lorenz2015-06-241-3/+1
| | | | | | | This commit merges the #ifdef and #ifndef checks into one #if, as suggested by Duncan P. N. Exon Smith. llvm-svn: 240553
* Don't get confused with sections whose section number is reserved.Rafael Espindola2015-06-244-12/+116
| | | | | | | It is perfectly possible for SHNDX to contain indexes that have the same value as reserved st_shndx values. llvm-svn: 240544
* [X86][AVX] Added full set of 256-bit vector shift tests.Simon Pilgrim2015-06-243-0/+1774
| | | | llvm-svn: 240542
* Eliminate additional redundant copies of Triple objects. NFC.Daniel Sanders2015-06-242-2/+2
| | | | | | | | Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10654 llvm-svn: 240540
* Fix instruction scheduling live register trackingPawel Bylica2015-06-242-8/+43
| | | | | | | | | | | | | | | | | | | Summary: This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405). During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling. Test Plan: Regression test included. Reviewers: hfinkel, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9993 llvm-svn: 240538
* [llvm-stress] Simple refactoring and better style. NFC.Pawel Bylica2015-06-241-53/+36
| | | | llvm-svn: 240534
* [mips][microMIPS] Implement BREAK, EHB and EI instructionsZoran Jovanovic2015-06-249-2/+96
| | | | | | http://reviews.llvm.org/D10090 llvm-svn: 240531
* Change how symbol sizes are handled in lib/Object.Rafael Espindola2015-06-2419-79/+89
| | | | | | | | | | | | | | COFF and MachO only define symbol sizes for common symbols. Reflect that in the class hierarchy by having a method for common symbols only in the base and a general one in ELF. This avoids the need of using a magic value for the size, which had a few problems * Most callers didn't check for it. * The ones that did could not tell the magic value from a file actually having that value. llvm-svn: 240529
* [ADT] Teach DenseMap to support StringRef keys.Chandler Carruth2015-06-242-0/+52
| | | | | | | | | | | | While often you want to use something specialized like StringMap, when the strings already have persistent storage a normal densemap over them can be more efficient. This can't go into StringRef.h because of really obnoxious header chains from the hashing code to the endian detection code to CPU feature detection code to StringMap. llvm-svn: 240528
* Hexagon: Paper over the undefined behaviour introduced by r238692Justin Bogner2015-06-242-1/+3
| | | | | | | | | | | | | | | | This stops shifting a 32-bit value by such absurd amounts as 96 and 120. We do this by dropping a call to the function that was doing this entirely, which rather surprisingly doesn't break *any* tests. I've also added an assert in the misbehaving function to prove that it's no longer being called with completely invalid arguments. This change looks pretty bogus and we should probably be reverting r238692 instead, but this is hard to do with the number of follow ups that have happened since. It can't be any worse than the undefined behaviour that was happening before though. llvm-svn: 240526
* MILexer.cpp: Try to fix a warning. [-Wsign-compare]NAKAMURA Takumi2015-06-241-1/+1
| | | | llvm-svn: 240525
* [TableGen] Restore the use of the TheInit field in Record to cache the ↵Craig Topper2015-06-242-12/+8
| | | | | | Record's DefInit. I broke this when I fixed memory leaks recently. Remove the DenseMap that mapped Record's to DefInit. llvm-svn: 240524
* Do not treat ARM _MoveToCoprocessor* intrinsics as MSBuiltins.Bob Wilson2015-06-241-2/+0
| | | | | | | Those builtins are now handled via ad-hoc code in clang with r240522 to deal with reordering the arguments to fix PR22560. llvm-svn: 240523
* Hexagon: Avoid left shifting negative values (it's UB)Justin Bogner2015-06-241-1/+1
| | | | | | Found by ubsan. llvm-svn: 240521
* SystemZ: Rephrase this allOnes calculation to avoid UBJustin Bogner2015-06-241-1/+3
| | | | | | | | | | | | | This allOnes function hits undefined behaviour if Count is greater than 64, but we can avoid that and simplify the calculation by just saturating if such a value is passed in. This comes up under ubsan becauseRxSBGOperands is sometimes created with values that are 128 bits wide. Somebody more familiar with this code should probably look into whether that's expected, as a 64 bit mask may or may not be appropriate for such types. llvm-svn: 240520
* Don't repeat name in comments.Rafael Espindola2015-06-241-9/+9
| | | | llvm-svn: 240516
* [X86] Don't generate vbroadcasti128 for v4i64 splats from memory.Ahmed Bougacha2015-06-242-4/+59
| | | | | | | | | | | | | | | | | | | | | We used to erroneously match: (v4i64 shuffle (v2i64 load), <0,0,0,0>) Whereas vbroadcasti128 is more like: (v4i64 shuffle (v2i64 load), <0,1,0,1>) This problem doesn't exist for vbroadcastf128, which kept matching the intrinsic after r231182. We should perhaps re-introduce the intrinsic here as well, but that's a separate issue still being discussed. While there, add some proper vbroadcastf128 tests. We don't currently match those, like for loading vbroadcastsd/ss on AVX (the reg-reg broadcasts where added in AVX2). Fixes PR23886. llvm-svn: 240488
* Remove unused GlobalVariable::replaceUsesOfWithOnConstant. NFC.Pete Cooper2015-06-243-24/+5
| | | | | | | | | | | | | | | The only caller of this method is Value::replaceAllUsesWith which explicitly checks that we are not a GlobalValue. So replace the body with an unreachable to ensure that we never call it. The unreachable itself is moved to GlobalValue not GlobalVariable as that is the base class of all the globals we don't want to call this method on. Note, this patch is short lived as i'll soon refactor all callers of this method. llvm-svn: 240486
* [X86] update_llc_test_checks vector-shuffle-*. NFC.Ahmed Bougacha2015-06-244-70/+50
| | | | | | Some of them had gone stale. llvm-svn: 240485
* MIR Serialization: Serialize immediate machine operands.Alex Lorenz2015-06-235-2/+79
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10573 llvm-svn: 240481
* fix typo; NFCSanjay Patel2015-06-231-1/+1
| | | | llvm-svn: 240480
* don't repeat function names in comments; NFCSanjay Patel2015-06-231-18/+15
| | | | llvm-svn: 240478
* Add "-mcpu=" option to llvm-rtdyldPetar Jovanovic2015-06-231-1/+7
| | | | | | | | | | | This patch adds the -mcpu= option to llvm-rtdyld. With this option, one can test relocations for different types of CPUs (e.g. Mips64r6). Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D10503 llvm-svn: 240477
* MIR Parser: Use correct source locations for machine instruction diagnostics.Alex Lorenz2015-06-238-10/+67
| | | | | | | | | | | | This commit translates the source locations for MIParser diagnostics from the locations in the machine instruction string to the locations in the MIR file. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10574 llvm-svn: 240474
* Devirtualize Constant::destroyConstant.Pete Cooper2015-06-235-52/+89
| | | | | | | | | | | | | | | This reorganizes destroyConstant and destroyConstantImpl. Now there is only destroyConstant in Constant itself, while subclasses are required to implement destroyConstantImpl. destroyConstantImpl no longer calls delete but is instead only responsible for removing the constant from any maps in which it is contained. Reviewed by Duncan Exon Smith. llvm-svn: 240471
* [X86][SSE] Added full set of 128-bit vector shift tests.Simon Pilgrim2015-06-234-527/+2458
| | | | | | Removed some old duplicate tests. llvm-svn: 240465
* Let llvm::ReplaceInstWithInst copy debug location from old to new instruction.Alexey Samsonov2015-06-233-996/+1012
| | | | | | | | | | | | | | Currently some users of this function do this explicitly, and all the rest forget to do this. ThreadSanitizer was one of such users, and had missing debug locations for calls into TSan runtime handling atomic operations, eventually leading to poorly symbolized stack traces and malfunctioning suppressions. This is another change relevant to PR23837. llvm-svn: 240460
* Pass 2 more variables to lit tests.Evgeniy Stepanov2015-06-231-1/+1
| | | | | | | | Pass ADB and ADB_SERIAL environment variables to lit tests. This would allow running Android tests in compiler-rt when there is more than one device attached to the host. llvm-svn: 240459
* Revert "[FaultMaps] Move FaultMapParser to Object/"Sanjoy Das2015-06-236-231/+184
| | | | | | | This reverts commit r240364 (git c49542e5bb186). The issue r240364 was trying to fix was fixed independently in r240362. llvm-svn: 240448
* Adding the missing LTO API to lto.exportsSteven Wu2015-06-231-0/+1
| | | | | | | | | | | | | | Summary: lto_codegen_set_should_embed_uselists is introduced in r235943 but not added to lto.exports. Add to export list to expose the API. Reviewers: dexonsmith Subscribers: rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D10658 llvm-svn: 240442
* Don't pass a 32 bit value to "%08" PRIx64.Rafael Espindola2015-06-231-4/+4
| | | | | | Should fix the arm bots. llvm-svn: 240439
* This change fixes three bugs in loop unswitching. This change causes an 81% ↵Mark Heffernan2015-06-231-40/+65
| | | | | | | | | | | | | | | speed-up on a benchmark that is based on EigenConvolutionKernel2D from Eigen3, where the lack of loop unswitching blocks hoisting of loads out of a nested loop (see bug 23816 for how loop unswitching and load hoisting are related). Change 1: Unswitching on trivial conditions should always happen regardless of the computed unswitching cost, as really the cost is zero. While there is code to make that happen, the logic that checks the unswitching cost against a threshold was moved to an earlier point (revision 147935) than the point where trivial unswitching is detected, so trivial unswitching is currently blocked by the cost threshold. This change fixes that. Change 2: Before revision 147935 (from 2012-01-11), the threshold parameter was a per-loop threshold. So an unswitching happened only if the cost of the unswitching was less than the threshold. In an indirect way (and I believe unintentionally), the logic for this since then has been that the threshold is an over-all budget across all loops for all loop unswitching done by a given LoopUnswitch loop pass object. So if an unswitching with cost 100 happens in one function, that in effect reduces the threshold from 100 to 0 for the loops even in another function. This persists for the lifetime of that loop pass object. This makes no difference for most small examples but it is important for large examples. This revision fixes that. Change 3: The cost is currently calculated as std::min(NumInstructions, 5 * NumBlocks). So a loop with 2 blocks and a million instructions will have an unswitching cost of 10. I changed this to just NumInstructions, as it were before revision 147935, though I'm open to e.g. instead replacing std::min with std::max. I've tried to make the change minimally invasive while staying with what I think was the original intent of the code. Submitted on behalf of broune@. llvm-svn: 240438
* [NVPTX] Added missing test case for llvm.nvvm.sqrt.f NVPTX intrinsicArtem Belevich2015-06-231-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D10663 llvm-svn: 240437
* ADT: Add a string APSInt constructor.Alex Lorenz2015-06-234-14/+48
| | | | | | | | | | | | This commit moves the APSInt initialization code that's used by the LLLexer class into a new APSInt constructor that constructs APSInts from strings. This change is useful for MIR Serialization, as it would allow the MILexer class to use the same APSInt initialization as LLexer when parsing immediate machine operands. llvm-svn: 240436
* Pass -m to the linker in this test.Rafael Espindola2015-06-231-1/+1
| | | | | | Fixes the test on a ppc host. llvm-svn: 240431
* AsmParser: Extend the API to make the global value and metadata node slot ↵Alex Lorenz2015-06-236-32/+114
| | | | | | | | | | | | | | | | | | mappings publicly accessible. This commit creates a new structure called 'SlotMapping' in the AsmParser library. This structure can be passed into the public parsing APIs from the AsmParser library in order to extract the data structures that map from slot numbers to unnamed global values and metadata nodes. This change is useful for MIR Serialization, as the MIR Parser has to lookup the unnamed global values and metadata nodes by their slot numbers. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10551 llvm-svn: 240427
* ELF: Fix defintion of STT_LOOS and STT_HIOS.Tom Stellard2015-06-231-2/+2
| | | | | | | | | | Reviewers: chandlerc, Bigcheese, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10647 llvm-svn: 240426
* MIR Serialization: Serialize physical register machine operands.Alex Lorenz2015-06-238-4/+296
| | | | | | | | | | | This commit introduces functionality that's used to serialize machine operands. Only the physical register operands are serialized by this commit. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10525 llvm-svn: 240425
* [ARM] ARMLoadStoreOpt::UpdateBaseRegUses should stop on defJohn Brawn2015-06-231-1/+1
| | | | | | | | | | | | When UpdateBaseRegUses sees an instruction that defines the base register it must stop, as the base register value it is updating is no longer live. Ideally we would already have seen the register be killed (which is already checked for), but the kill flags may be inaccurate and we have to account for this. Differential Revision: http://reviews.llvm.org/D10566 llvm-svn: 240424
* objdump: Don't print a (always 0) size for MachO symbols.Rafael Espindola2015-06-233-18/+18
| | | | | | | | | | | Only common symbol on MachO and COFF have a size. For COFF we already had a custom format. For MachO, there is no native objdump and we were printing it as ELF. Now we only print the sizes for symbols that actually have them. llvm-svn: 240422
* SystemZ: Avoid left shifting negative values (it's UB)Justin Bogner2015-06-231-4/+4
| | | | | | Found by ubsan. llvm-svn: 240420
* [Option] Plug a leak when move-assigning an InputArgList.Benjamin Kramer2015-06-232-9/+11
| | | | | | | | The class has a non-trivial dtor so we have to clean up before we move in new members. Remove misleading comment as a default move assignment operator will never be synthesized for this class. llvm-svn: 240417
* Make helper functions static. NFC.Benjamin Kramer2015-06-232-4/+5
| | | | llvm-svn: 240416
* [BranchFolding] Document why replacing HashMachineInstr with hash_code ↵Benjamin Kramer2015-06-231-1/+3
| | | | | | doesn't work llvm-svn: 240415
* [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstrBenjamin Kramer2015-06-235-70/+37
| | | | | | Use it in CodeGen where applicable. No functionality change intended. llvm-svn: 240414
* [MachineBasicBlock] Use the const_cast(this) trick to reduce duplicationBenjamin Kramer2015-06-232-27/+6
| | | | | | NFC. llvm-svn: 240413
* Be sure to set the DataLayout before checking the cache.Rafael Espindola2015-06-231-2/+2
| | | | | | | | This makes sure the same mangling is used. Should fix the OS X bots. llvm-svn: 240411
* [mips] [IAS] Add partial support for the ULHU pseudo-instruction.Toma Tabacu2015-06-236-115/+544
| | | | | | | | | | | | | | | | Summary: This only adds support for ULHU of an immediate address with/without a source register. It does not include support for ULHU of the address of a symbol. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9671 llvm-svn: 240410
* Remove unused arguments and move ManglerPrefixTy to the implementation.Rafael Espindola2015-06-232-25/+27
| | | | llvm-svn: 240408
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