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* NFC: make AtomicOrdering an enum classJF Bastien2016-04-0637-312/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In the context of http://wg21.link/lwg2445 C++ uses the concept of 'stronger' ordering but doesn't define it properly. This should be fixed in C++17 barring a small question that's still open. The code currently plays fast and loose with the AtomicOrdering enum. Using an enum class is one step towards tightening things. I later also want to tighten related enums, such as clang's AtomicOrderingKind (which should be shared with LLVM as a 'C++ ABI' enum). This change touches a few lines of code which can be improved later, I'd like to keep it as NFC for now as it's already quite complex. I have related changes for clang. As a follow-up I'll add: bool operator<(AtomicOrdering, AtomicOrdering) = delete; bool operator>(AtomicOrdering, AtomicOrdering) = delete; bool operator<=(AtomicOrdering, AtomicOrdering) = delete; bool operator>=(AtomicOrdering, AtomicOrdering) = delete; This is separate so that clang and LLVM changes don't need to be in sync. Reviewers: jyknight, reames Subscribers: jyknight, llvm-commits Differential Revision: http://reviews.llvm.org/D18775 llvm-svn: 265602
* [MBP] Remove an unused function parameterHaicheng Wu2016-04-061-5/+3
| | | | | | NFC. llvm-svn: 265596
* [PPC] Use VSX/FP Facility integer load when an integer load's only users are ↵Ehsan Amiri2016-04-062-1/+109
| | | | | | | | | | | conversion to FP http://reviews.llvm.org/D18405 When the integer value loaded is never used directly as integer we should use VSX or Floating Point Facility integer loads and avoid extra direct move llvm-svn: 265593
* regenerate checksSanjay Patel2016-04-061-556/+828
| | | | llvm-svn: 265591
* Put quotes around #error string.James Y Knight2016-04-061-1/+1
| | | | | | | GCC reports "missing terminating ' character", even when it's being skipped by preprocessing. llvm-svn: 265590
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-06105-598/+540
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
* Revert "[RegisterBankInfo] Add methods to get the possible mapping of anQuentin Colombet2016-04-062-130/+8
| | | | | | | | | | | instruction on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers." and the follow-on commits while I find out a way to fix the win7 bot: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882 This reverts commit r265578, r265581, r265584, and r265585. llvm-svn: 265587
* [IRVerifier] Don't crash on invalid DIFile inside DISubprogram.Davide Italiano2016-04-062-0/+12
| | | | | | | r265515, this time with the correct fix. file inside DISubprogram is not mandatory. llvm-svn: 265586
* [RegisterBankInfo] Get rid of the assert in the constructor of ↵Quentin Colombet2016-04-061-2/+0
| | | | | | | | | InstructionMapping. The default constructor now uses the regular constructor and the assert is not valid anymore. llvm-svn: 265585
* [RegisterBankInfo] Call the other constructor of InstructionMapping from theQuentin Colombet2016-04-061-1/+1
| | | | | | | | | default constructor, instead of relying on the default constructor of unique_ptr. Second attempt at fixing the windows bot. llvm-svn: 265584
* [gold] Save bitcode for module partitions (save-temps + split codegen).Evgeniy Stepanov2016-04-065-20/+52
| | | | llvm-svn: 265583
* [RegisterBankInfo] Provide a default constructor for InstructionMappingQuentin Colombet2016-04-062-0/+18
| | | | | | | | | helper class. The default constructor creates invalid (isValid() == false) instances and may be used to communicate that a mapping was not found. llvm-svn: 265581
* [IRVerifier] Prefer dyn_cast<> over isa<> + cast<>.Davide Italiano2016-04-061-9/+8
| | | | | | Thanks to Rafael for the suggestion! llvm-svn: 265579
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265578
* IR: Use DenseSet instead of DenseMap for ConstantUniqueMap; NFCDuncan P. N. Exon Smith2016-04-063-43/+35
| | | | | | | | | | | | | | | | | | Use a DenseSet instead of a DenseMap for constants in LLVMContextImpl. Last time I looked at this was some time before r223588, when DenseSet<V> had no advantage over DenseMap<V,char>. After r223588, there's a 50% memory savings. This is all mechanical. There were little bits of missing API from DenseSet so I added the trivial implementations: - iterator::operator++(int) - template <class LookupKeyT> insert_as(ValueTy, LookupKeyT) There should be no functionality change, just reduced memory consumption (this wasn't on a profile or anything; just a cleanup I stumbled on). llvm-svn: 265577
* IR: Stop explicitly clearing the MDStringCacheDuncan P. N. Exon Smith2016-04-061-3/+0
| | | | | | | The MDStringCache doesn't need to be explicitly cleared before destruction. The destructor handles it at least as efficiently. llvm-svn: 265576
* [RegisterBankInfo] Add a method to get the mapping RegClass -> RegBank.Quentin Colombet2016-04-061-0/+17
| | | | | | This should be TableGen'ed at some point. llvm-svn: 265574
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-062-0/+80
| | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. llvm-svn: 265573
* vim: add missing keywordSaleem Abdulrasool2016-04-061-2/+2
| | | | | | | `source_filename` was introduced as a keyword in SVN r264884, but the syntax file was not updated. llvm-svn: 265572
* [AArch64] Change the CMake to avoid to build GlobalISel related APIsQuentin Colombet2016-04-062-18/+12
| | | | | | | | | | when GISel is not built. The positive side effects are: - We do not have to define dummy implementation - We do not have to do weird gymnastic to avoid like issues (like missing constructor or vtable for the base classes) llvm-svn: 265570
* [AArch64] Teach the subtarget how to get to the RegisterBankInfo.Quentin Colombet2016-04-064-6/+80
| | | | | | | | | | | Rework the access to GlobalISel APIs to contain how much of the APIs we need to access for the final executable to build when GlobalISel is not built. This prevents massive usage of ifdefs in various places. Now, all the GlobalISel ifdefs will be happing only in AArch64TargetMachine.cpp. llvm-svn: 265567
* [RegisterBankInfo] Make the destructor public... that may be useful!Quentin Colombet2016-04-061-2/+3
| | | | llvm-svn: 265565
* [RegisterBankInfo] Implement the verify method of the InstructionMapping ↵Quentin Colombet2016-04-062-1/+26
| | | | | | | | helper class. This checks that all the register operands get a proper mapping. llvm-svn: 265563
* Loop Unroll: add options and tweak to make Partial unrolling more usefulFiona Glaser2016-04-062-3/+24
| | | | | | | | | | | | | | | | 1. Add FullUnrollMaxCount option that works like MaxCount, but also limits the unroll count for fully unrolled loops. So if a loop has an iteration count over this, it won't fully unroll. 2. Add CLI options for MaxCount and the new option, so they can be tested (plus a test). 3. Make partial unrolling obey MaxCount. An example use-case (the out of tree one this is originally designed for) is a target’s TTI can analyze a loop and decide on a max unroll count separate from the size threshold, e.g. based on register pressure, then constrain LoopUnroll to not exceed that, regardless of the size of the unrolled loop. llvm-svn: 265562
* [MachineRegisterInfo] Document what is the expected metric for the size of ↵Quentin Colombet2016-04-061-2/+2
| | | | | | generic registers llvm-svn: 265561
* Revert r265450 "[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC."Hans Wennborg2016-04-062-81/+30
| | | | | | It caused ASan 32-bit tests to hang (PR27245). llvm-svn: 265559
* LoopUnroll: only allow non-modulo Partial unrolling when Runtime=trueFiona Glaser2016-04-062-3/+5
| | | | | | Patch by Evgeny Stupachenko <evstupac@gmail.com>. llvm-svn: 265558
* [RegisterBankInfo] Implement the verify method for the ValueMapping helper ↵Quentin Colombet2016-04-062-6/+18
| | | | | | | | | class. The method checks that the value is fully defined accross the different partial mappings and that the partial mappings are compatible between each other. llvm-svn: 265556
* [RegisterBankInfo] Add a verify method for the PartialMapping helper class.Quentin Colombet2016-04-062-0/+24
| | | | | | | This verifies that the PartialMapping can be accomadated into the related register bank. llvm-svn: 265555
* Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."Valery Pykhtin2016-04-062-116/+0
| | | | | | This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly. llvm-svn: 265554
* [RegisterBankInfo] Add a couple of helper classes for the future cost model.Quentin Colombet2016-04-062-0/+129
| | | | llvm-svn: 265553
* Revert "Re-commit r265039 "[X86] Merge adjacent stack adjustments in ↵Hans Wennborg2016-04-069-103/+32
| | | | | | | | | eliminateCallFramePseudoInstr (PR27140)"" It seems to be causing ASan tests to crash, probably due to miscompiling the run-time somehow. llvm-svn: 265551
* [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.Valery Pykhtin2016-04-062-0/+116
| | | | | | Differential revision: http://reviews.llvm.org/D16998 llvm-svn: 265550
* [AArch64] Use the default constructor of RegisterBankInfo when GlobalISel is ↵Quentin Colombet2016-04-061-1/+1
| | | | | | | | | not built. This will avoid link-time error as the defautl constructor of RegisterBankInfo is the only one available when GlobalISel is not built. llvm-svn: 265549
* [RegisterBankInfo] Inline the destructor to avoid link-time error when ↵Quentin Colombet2016-04-062-3/+12
| | | | | | GlobalISel is not built. llvm-svn: 265548
* Recommit r265309 after fixed an invalid memory reference bug happenedWei Mi2016-04-0616-1053/+948
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when DenseMap growed and moved memory. I verified it fixed the bootstrap problem on x86_64-linux-gnu but I cannot verify whether it fixes the bootstrap error on clang-ppc64be-linux. I will watch the build-bot result closely. Replace analyzeSiblingValues with new algorithm to fix its compile time issue. The patch is to solve PR17409 and its duplicates. analyzeSiblingValues is a N x N complexity algorithm where N is the number of siblings generated by reg splitting. Although it causes siginificant compile time issue when N is large, it is also important for performance since it removes redundent spills and enables rematerialization. To solve the compile time issue, the patch removes analyzeSiblingValues and replaces it with lower cost alternatives containing two parts. The first part creates a new spill hoisting method in postOptimization of register allocation. It does spill hoisting at once after all the spills are generated instead of inside every instance of selectOrSplit. The second part queries the define expr of the original register for rematerializaiton and keep it always available during register allocation even if it is already dead. It deletes those dead instructions only in postOptimization. With the two parts in the patch, it can remove analyzeSiblingValues without sacrificing performance. Differential Revision: http://reviews.llvm.org/D15302 llvm-svn: 265547
* Revert r265535 until we know how we can fix the bots Silviu Baranga2016-04-068-728/+124
| | | | llvm-svn: 265541
* [AMDGPU] AsmParser: disable DPP for unsupported instructions. New dpp tests. ↵Sam Kolton2016-04-063-23/+417
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix v_nop_dpp. Summary: 1. Disable DPP encoding for instructions that do not support it: - VOP1: - v_readfirstlane_b32 - v_clrexcp - v_movreld_b32 - v_movrels_b32 - v_movrelsd_b32 - VOP2: - v_madmk_f16/32 - v_madak_f16/32 - VOPC, VINTRP, VOP3 2. Fix DPP for v_nop 3. New DPP tests for VOP1 and VOP2 instructions Reviewers: nhaustov, tstellarAMD, vpykhtin Subscribers: tstellarAMD, arsenm Differential Revision: http://reviews.llvm.org/D18552 llvm-svn: 265538
* Simplify logic. NFC.Chad Rosier2016-04-061-7/+5
| | | | llvm-svn: 265537
* [SCEV] Introduce a guarded backedge taken count and use it in LAA and LVSilviu Baranga2016-04-068-124/+728
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When the backedge taken codition is computed from an icmp, SCEV can deduce the backedge taken count only if one of the sides of the icmp is an AddRecExpr. However, due to sign/zero extensions, we sometimes end up with something that is not an AddRecExpr. However, we can use SCEV predicates to produce a 'guarded' expression. This change adds a method to SCEV to get this expression, and the SCEV predicate associated with it. In HowManyGreaterThans and HowManyLessThans we will now add a SCEV predicate associated with the guarded backedge taken count when the analyzed SCEV expression is not an AddRecExpr. Note that we only do this as an alternative to returning a 'CouldNotCompute'. We use new feature in Loop Access Analysis and LoopVectorize to analyze and transform more loops. Reviewers: anemet, mzolotukhin, hfinkel, sanjoy Subscribers: flyingforyou, mcrosier, atrick, mssimpso, sanjoy, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D17201 llvm-svn: 265535
* [AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to ↵Evgeny Astigeevich2016-04-062-57/+101
| | | | | | | | | | | | | | | | | | | prepare it for fixing a bug in it AArch64InstrInfo::optimizeCompareInstr has a bug which causes generation of incorrect code (PR#27158). The patch refactors the function to simplify reviewing the fix of the bug. 1. Function name ‘modifiesConditionCode’ is changed to ‘areCFlagsAccessedBetweenInstrs’ to reflect that the function can check modifying accesses, reading accesses or both. 2. Function ‘AArch64InstrInfo::optimizeCompareInstr’ - Documented the function - Cmp_NZCV is DeadNZCVIdx to reflect that it is an operand index of dead NZCV - The code for the case of substituting CmpInstr is put into separate functions the main of them is ‘substituteCmpInstr’. Differential Revision: http://reviews.llvm.org/D18609 llvm-svn: 265531
* [ppc64] Temporary disable sibling call optimization on ppc64 due to breaking ↵Chuang-Yu Cheng2016-04-063-8/+8
| | | | | | | | | | | test case r265506 breaks print-stack-trace.cc test case of compiler-rt in bootstrap test. http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/1708 llvm-svn: 265528
* [SLPVectorizer] Vectorizing the libm sqrt to llvm's sqrt intrinsic requires nnanDavid Majnemer2016-04-063-4/+30
| | | | | | | | | | | | | | To quote the langref "Unlike sqrt in libm, however, llvm.sqrt has undefined behavior for negative numbers other than -0.0 (which allows for better optimization, because there is no need to worry about errno being set). llvm.sqrt(-0.0) is defined to return -0.0 like IEEE sqrt." This means that it's unsafe to replace sqrt with llvm.sqrt unless the call is annotated with nnan. Thanks to Hal Finkel for pointing this out! llvm-svn: 265521
* IR: Move MDStrings to a BumpPtrAllocatorDuncan P. N. Exon Smith2016-04-061-1/+1
| | | | | | | We never delete any MDString until the context is destroyed. Might as well throw them onto a BumpPtrAllocator. llvm-svn: 265520
* IRMover: Steal arguments when moving functions, NFCDuncan P. N. Exon Smith2016-04-065-19/+144
| | | | | | | | | | | | | | | | | | Instead of copying arguments from the source function to the destination, steal them. This has a few advantages. - The ValueMap doesn't need to be seeded with (or cleared of) Arguments. - Often the destination function won't have created any arguments yet, so this avoids malloc traffic. - Argument names don't need to be copied. Because argument lists are lazy, this required a new Function::stealArgumentListFrom helper. llvm-svn: 265519
* Revert "[IRVerifier] Don't crash on invalid DIFile inside DISubprogram."Davide Italiano2016-04-062-12/+0
| | | | | | | This reverts commit r265515 as lots of tests need to be fixed before this actually can go in. llvm-svn: 265517
* Add parentheses to silence warning.Richard Trieu2016-04-061-1/+2
| | | | llvm-svn: 265516
* [IRVerifier] Don't crash on invalid DIFile inside DISubprogram.Davide Italiano2016-04-062-0/+12
| | | | llvm-svn: 265515
* [IRVerifier] Avoid crashing on an invalid compile unit.Davide Italiano2016-04-062-7/+16
| | | | llvm-svn: 265514
* AArch64: Fix compile errorMatthias Braun2016-04-061-1/+1
| | | | | | | Fixed to adapt a use of enterBasicBlock() in my last commit (because I had follow on patches in my repository that change the code). llvm-svn: 265513
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