| Commit message (Collapse) | Author | Age | Files | Lines |
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modify it.
llvm-svn: 154098
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of the BBVectorizePass without using command line option. As pointed out
by Hal, we can ask the TargetLoweringInfo for the architecture specific
VectorizeConfig to perform vectorizing with architecture specific
information.
llvm-svn: 154096
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tree meant I forgot to svn add these testcases.
Noticed while investigating PR12274!
llvm-svn: 154090
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BasicBlock in other passes, e.g. we can call vectorizeBasicBlock in the
loop unroll pass right after the loop is unrolled.
llvm-svn: 154089
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rdar://11189467
llvm-svn: 154087
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the caller requested a null-terminated one.
When mapping the file there could be a racing issue that resulted in the file being larger
than the FileSize passed by the caller. We already have an assertion
for this in MemoryBuffer::init() but have a runtime guarantee that
the buffer will be null-terminated, so do a copy that adds a null-terminator.
Protects against crash of rdar://11161822.
llvm-svn: 154082
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Plain 'cpsr' is an alias for 'cpsr_fc'.
rdar://11153753
llvm-svn: 154080
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LSR can fold three addressing modes into its ICmpZero node:
ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset
ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset
ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
The first two cases are only used if TLI->isLegalICmpImmediate() likes
the offset.
Make sure the right Offset sign is passed to this method in the second
case. The ARM version is not symmetric.
<rdar://problem/11184260>
llvm-svn: 154079
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llvm-svn: 154070
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llvm-svn: 154063
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llvm-svn: 154062
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llvm-svn: 154054
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register indices on the source registers. No simple test case
llvm-svn: 154051
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Still not fixed in the standard ;)
llvm-svn: 154044
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llvm-svn: 154039
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types for N32 ABI. Add new test case and update existing ones.
llvm-svn: 154038
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types for N32 ABI. Test case will be updated after the patch that fixes
TargetLowering::getPICJumpTableRelocBase is checked in.
llvm-svn: 154036
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types for N32 ABI and update test case.
llvm-svn: 154034
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A MOVCCr instruction can be commuted by inverting the condition. This
can help reduce register pressure and remove unnecessary copies in some
cases.
<rdar://problem/11182914>
llvm-svn: 154033
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llvm-svn: 154032
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types for N32 ABI and update test case.
llvm-svn: 154031
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the loop should be unrolled according the value of OptSizeUnrollThreshold.
llvm-svn: 154014
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This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
llvm-svn: 154011
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reducing unroll count, otherwise the reduced unroll count is not taking
the "OptimizeForSize" attribute into account.
llvm-svn: 154007
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llvm-svn: 154004
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MSVC8 verifies this.
llvm-svn: 154002
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llvm-svn: 153997
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llvm-svn: 153996
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enum values
llvm-svn: 153984
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svn r145378 inadvertently changed the destination for the Embedded target
in the makefile. Add a "/Developer" suffix to DSTROOT to compensate.
llvm-svn: 153980
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it ;/
llvm-svn: 153979
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llvm-svn: 153978
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llvm-svn: 153977
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would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>
llvm-svn: 153976
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llvm-svn: 153975
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So far all of configure tests have been run against the default SDK and
architecture, regardless of what is actually being built. We've gotten
lucky until now. <rdar://problem/11112479>
llvm-svn: 153972
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llvm-svn: 153971
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When folding X == X we need to check getBooleanContents() to determine if the
result is a vector of ones or a vector of negative ones.
I tried creating a test case, but the problem seems to only be exposed on a
much older version of clang (around r144500).
rdar://10923049
llvm-svn: 153966
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Patch by Bernard Cafarelli!
llvm-svn: 153965
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might have more than 19 operands. Add a testcase to make sure I
never screw that up again.
Part of rdar://11026482
llvm-svn: 153961
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The colorability heuristic should count these as denied registers.
No test case - this exposed a bug on an out-of-tree target.
llvm-svn: 153958
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And indirectly, a dependency on most of the core LLVM optimization
libraries.
llvm-svn: 153957
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llvm-svn: 153956
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testing machine.
llvm-svn: 153951
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speedup.
llvm-svn: 153949
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llvm-svn: 153939
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to issue call via
PLT when LLVM is built as shared library. This mimics the X86 backend towards the approach.
llvm-svn: 153938
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llvm-svn: 153937
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llvm-svn: 153935
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llvm-svn: 153928
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