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* BBVectorize: Add the const modifier to the VectorizeConfig because we won'tHongbin Zheng2012-04-051-1/+1
| | | | | | modify it. llvm-svn: 154098
* Introduce the VectorizeConfig class, with which we can control the behaviorHongbin Zheng2012-04-052-34/+126
| | | | | | | | | of the BBVectorizePass without using command line option. As pointed out by Hal, we can ask the TargetLoweringInfo for the architecture specific VectorizeConfig to perform vectorizing with architecture specific information. llvm-svn: 154096
* An oversight when applying the patches for r150956 and r150957 to a vanilla ↵James Molloy2012-04-052-0/+76
| | | | | | | | tree meant I forgot to svn add these testcases. Noticed while investigating PR12274! llvm-svn: 154090
* Add the function "vectorizeBasicBlock" which allow users vectorize aHongbin Zheng2012-04-052-6/+32
| | | | | | | BasicBlock in other passes, e.g. we can call vectorizeBasicBlock in the loop unroll pass right after the loop is unrolled. llvm-svn: 154089
* ARM assembly aliases for two-operand V[R]SHR instructions.Jim Grosbach2012-04-052-5/+106
| | | | | | rdar://11189467 llvm-svn: 154087
* In MemoryBuffer::getOpenFile() make sure that the buffer is null-terminated ifArgyrios Kyrtzidis2012-04-051-0/+11
| | | | | | | | | | | | | the caller requested a null-terminated one. When mapping the file there could be a racing issue that resulted in the file being larger than the FileSize passed by the caller. We already have an assertion for this in MemoryBuffer::init() but have a runtime guarantee that the buffer will be null-terminated, so do a copy that adds a null-terminator. Protects against crash of rdar://11161822. llvm-svn: 154082
* ARM assembly parsing for 'msr' plain 'cpsr' operand.Jim Grosbach2012-04-052-1/+4
| | | | | | | | Plain 'cpsr' is an alias for 'cpsr_fc'. rdar://11153753 llvm-svn: 154080
* Pass the right sign to TLI->isLegalICmpImmediate.Jakob Stoklund Olesen2012-04-052-2/+15
| | | | | | | | | | | | | | | | | | LSR can fold three addressing modes into its ICmpZero node: ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg The first two cases are only used if TLI->isLegalICmpImmediate() likes the offset. Make sure the right Offset sign is passed to this method in the second case. The ARM version is not symmetric. <rdar://problem/11184260> llvm-svn: 154079
* Do not include multiple -arch options in CPPFLAGS.Bob Wilson2012-04-051-3/+2
| | | | llvm-svn: 154070
* Fix -Wnon-virtual-dtor warnings.Michael J. Spencer2012-04-041-0/+20
| | | | llvm-svn: 154063
* Reapply 154038 without the failing test.Akira Hatanaka2012-04-043-18/+18
| | | | llvm-svn: 154062
* Revert r154038. It was causing make check failures.Owen Anderson2012-04-044-64/+18
| | | | llvm-svn: 154054
* REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub ↵Pete Cooper2012-04-041-1/+2
| | | | | | register indices on the source registers. No simple test case llvm-svn: 154051
* Fix a C++11 UDL conflict.Benjamin Kramer2012-04-041-1/+1
| | | | | | Still not fixed in the standard ;) llvm-svn: 154044
* f16 FREM can now be legalized by promoting to f32Pete Cooper2012-04-041-0/+1
| | | | llvm-svn: 154039
* Fix LowerGlobalAddress to produce instructions with the correct relocationAkira Hatanaka2012-04-044-18/+64
| | | | | | types for N32 ABI. Add new test case and update existing ones. llvm-svn: 154038
* Fix LowerJumpTable to produce instructions with the correct relocationAkira Hatanaka2012-04-041-2/+2
| | | | | | | types for N32 ABI. Test case will be updated after the patch that fixes TargetLowering::getPICJumpTableRelocBase is checked in. llvm-svn: 154036
* Fix LowerConstantPool to produce instructions with the correct relocationAkira Hatanaka2012-04-042-7/+20
| | | | | | types for N32 ABI and update test case. llvm-svn: 154034
* Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.Jakob Stoklund Olesen2012-04-048-7/+95
| | | | | | | | | | A MOVCCr instruction can be commuted by inverting the condition. This can help reduce register pressure and remove unnecessary copies in some cases. <rdar://problem/11182914> llvm-svn: 154033
* Remove spurious debug output.Jakob Stoklund Olesen2012-04-041-1/+0
| | | | llvm-svn: 154032
* Fix LowerBlockAddress to produce instructions with the correct relocationAkira Hatanaka2012-04-042-12/+32
| | | | | | types for N32 ABI and update test case. llvm-svn: 154031
* Add testcase for r154007, when a function has the optsize attribute,Hongbin Zheng2012-04-041-0/+35
| | | | | | the loop should be unrolled according the value of OptSizeUnrollThreshold. llvm-svn: 154014
* Always compute all the bits in ComputeMaskedBits.Rafael Espindola2012-04-0435-417/+265
| | | | | | | | This allows us to keep passing reduced masks to SimplifyDemandedBits, but know about all the bits if SimplifyDemandedBits fails. This allows instcombine to simplify cases like the one in the included testcase. llvm-svn: 154011
* LoopUnrollPass: Use variable "Threshold" instead of "CurrentThreshold" whenHongbin Zheng2012-04-041-2/+2
| | | | | | | reducing unroll count, otherwise the reduced unroll count is not taking the "OptimizeForSize" attribute into account. llvm-svn: 154007
* Move yaml::Stream's dtor out of line so it can see Scanner's dtor.Benjamin Kramer2012-04-042-0/+3
| | | | llvm-svn: 154004
* Implement DwarfLLVMRegPair::operator< without violating asymmetry.Benjamin Kramer2012-04-041-4/+5
| | | | | | MSVC8 verifies this. llvm-svn: 154002
* Convert assert(false) followed by a return to llvm_unreachableCraig Topper2012-04-041-2/+1
| | | | llvm-svn: 153997
* Remove default case from switch that was already covering all cases.Craig Topper2012-04-041-1/+0
| | | | llvm-svn: 153996
* Removed useless switch for default case when switch was covering all the ↵Pete Cooper2012-04-041-1/+0
| | | | | | enum values llvm-svn: 153984
* Fix the install location for the Embedded makefile target.Bob Wilson2012-04-031-1/+1
| | | | | | | svn r145378 inadvertently changed the destination for the Embedded target in the makefile. Add a "/Developer" suffix to DSTROOT to compensate. llvm-svn: 153980
* Sorry about that. MSVC seems to accept just about any random string you give ↵Michael J. Spencer2012-04-032-22/+2
| | | | | | it ;/ llvm-svn: 153979
* Remove dead code for installing libLTO when building llvmCore.Bob Wilson2012-04-032-37/+7
| | | | llvm-svn: 153978
* Add YAML parser to Support.Michael J. Spencer2012-04-03182-0/+4586
| | | | llvm-svn: 153977
* Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it ↵Pete Cooper2012-04-033-0/+42
| | | | | | would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095> llvm-svn: 153976
* Removed one last bad continue statement meant to be removed in r153914.Pete Cooper2012-04-031-1/+0
| | | | llvm-svn: 153975
* When building llvmCore, pass the SDKROOT and -arch setting to configure.Bob Wilson2012-04-031-0/+10
| | | | | | | | So far all of configure tests have been run against the default SDK and architecture, regardless of what is actually being built. We've gotten lucky until now. <rdar://problem/11112479> llvm-svn: 153972
* Remove a reference to the C backend.Bob Wilson2012-04-031-1/+1
| | | | llvm-svn: 153971
* Fix an issue in SimplifySetCC() specific to vector comparisons.Chad Rosier2012-04-031-2/+10
| | | | | | | | | | | When folding X == X we need to check getBooleanContents() to determine if the result is a vector of ones or a vector of negative ones. I tried creating a test case, but the problem seems to only be exposed on a much older version of clang (around r144500). rdar://10923049 llvm-svn: 153966
* Set soname for FreeBSD as well.Anton Korobeynikov2012-04-031-2/+2
| | | | | | Patch by Bernard Cafarelli! llvm-svn: 153965
* Fix thinko check for number of operands to be the one that actuallyEric Christopher2012-04-032-1/+48
| | | | | | | | | might have more than 19 operands. Add a testcase to make sure I never screw that up again. Part of rdar://11026482 llvm-svn: 153961
* Matrix simplification in PBQP may push infinite costs onto register options.Lang Hames2012-04-031-0/+6
| | | | | | | | The colorability heuristic should count these as denied registers. No test case - this exposed a bug on an out-of-tree target. llvm-svn: 153958
* ARMDisassembler: drop bogus dependency on ARMCodeGenDylan Noblesmith2012-04-032-3/+2
| | | | | | | And indirectly, a dependency on most of the core LLVM optimization libraries. llvm-svn: 153957
* Object: drop bogus VMCore dependencyDylan Noblesmith2012-04-031-1/+1
| | | | llvm-svn: 153956
* The speedup doesn't appear to have been from this, but was an anomaly of my ↵Bill Wendling2012-04-031-1/+0
| | | | | | testing machine. llvm-svn: 153951
* Reserve space for the eventual filling of the vector. This gives a small ↵Bill Wendling2012-04-031-4/+3
| | | | | | speedup. llvm-svn: 153949
* Add an additional testcase which checks ops with multiple users.Nadav Rotem2012-04-031-0/+12
| | | | llvm-svn: 153939
* Make PPCCompilationCallbackC function to be static, so there will be no need ↵Anton Korobeynikov2012-04-031-3/+5
| | | | | | | | to issue call via PLT when LLVM is built as shared library. This mimics the X86 backend towards the approach. llvm-svn: 153938
* Tidy up spacing in some tablegen outputs.Craig Topper2012-04-032-11/+9
| | | | llvm-svn: 153937
* Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.Craig Topper2012-04-039-41/+832
| | | | llvm-svn: 153935
* Reformatting. No functionality change.Bill Wendling2012-04-031-18/+19
| | | | llvm-svn: 153928
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