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* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-2919-699/+561
| | | | llvm-svn: 143262
* test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark ↵NAKAMURA Takumi2011-10-281-0/+4
| | | | | | "REQUIRES: asserts" for now. llvm-svn: 143247
* ARM mode 'mov' to 'mvn' assembler alias.Jim Grosbach2011-10-282-2/+30
| | | | llvm-svn: 143237
* Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".Jim Grosbach2011-10-283-1/+36
| | | | | | | | | | | When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example, mov r2, #-3 becomes mvn r2, #2 rdar://10349224 llvm-svn: 143235
* Allow InstAlias's to use immediate matcher patterns that xform the value.Jim Grosbach2011-10-282-5/+29
| | | | | | | | | For example, On ARM, "mov r3, #-3" is an alias for "mvn r3, #2", so we want to use a matcher pattern that handles the bitwise negation when mapping to t2MVNi. llvm-svn: 143233
* Fix illegal disassembly testcase.Owen Anderson2011-10-281-2/+2
| | | | llvm-svn: 143231
* Clarify example snippets a bit.Jim Grosbach2011-10-281-2/+2
| | | | llvm-svn: 143224
* Specify that the high bit of the alignment field is fixed to 0 on these ↵Owen Anderson2011-10-281-2/+2
| | | | | | instructions. llvm-svn: 143220
* Make changes necessary in LowerFormalArguments to support Mips64.Akira Hatanaka2011-10-281-17/+17
| | | | llvm-svn: 143218
* Make changes necessary in LowerCall to support Mips64.Akira Hatanaka2011-10-281-25/+38
| | | | llvm-svn: 143217
* The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false.Duncan Sands2011-10-282-29/+54
| | | | | | | | | Spotted by my super-optimizer in 186.crafty and 450.soplex. We really need a proper infrastructure for handling generalizations of this kind of thing (which occur a lot), however this case is so simple that I decided to go ahead and implement it directly. llvm-svn: 143214
* Add variable IsO32 to MipsTargetLowering.Akira Hatanaka2011-10-282-10/+11
| | | | llvm-svn: 143213
* A shift of a power of two is a power of two or zero.Duncan Sands2011-10-282-1/+16
| | | | | | For completeness - not spotted in the wild. llvm-svn: 143211
* Fold icmp ugt (udiv X, Y), X to false. Spotted by my super-optimizerDuncan Sands2011-10-282-0/+36
| | | | | | in 186.crafty. llvm-svn: 143209
* Reapply r143202, with a manual decoding hook for SWP. This change ↵Owen Anderson2011-10-284-2/+28
| | | | | | inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. llvm-svn: 143208
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-2819-561/+699
| | | | | | | | | fixes: Use a separate register, instead of SP, as the calling-convention resource, to avoid spurious conflicts with actual uses of SP. Also, fix unscheduling of calling sequences, which can be triggered by pseudo-two-address dependencies. llvm-svn: 143206
* Revert r143202.Owen Anderson2011-10-281-1/+1
| | | | llvm-svn: 143203
* Specify fixed bits on CPS instructions to enable roundtripping.Owen Anderson2011-10-281-1/+1
| | | | llvm-svn: 143202
* Thumb2 ADD/SUB instructions encoding selection outside IT block.Jim Grosbach2011-10-283-2/+27
| | | | | | | | | | | Outside an IT block, "add r3, #2" should select a 32-bit wide encoding rather than generating an error indicating the 16-bit encoding is only legal in an IT block (outside, the 'S' suffic is required for the 16-bit encoding). rdar://10348481 llvm-svn: 143201
* Allow register classes to match a containing class in InstAliases.Jim Grosbach2011-10-281-0/+9
| | | | | | | | If the register class in the source alias is a subclass of the register class of the actual instruction, the alias can still match OK since the constraints are strictly a subset of what the instruction can actually handle. llvm-svn: 143200
* test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It ↵NAKAMURA Takumi2011-10-281-3/+3
| | | | | | | | uses X86 instruction. FIXME: Would it be reproduced without target-specific operands? FIXME: Why run llvm-mc as the same input by 3 times? llvm-svn: 143195
* Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be ↵NAKAMURA Takumi2011-10-282-8/+10
| | | | | | | | | | | host-endian-neutral. Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host. FIXME: Add a testcase for big endian target. FIXME: Ditto on CompileUnit::addConstantFPValue() ? llvm-svn: 143194
* uint64 formatted output: replaced %llx with PRIx64 macro.Stepan Dyatkovskiy2011-10-282-7/+7
| | | | llvm-svn: 143191
* Use BranchProbability compare operators.Benjamin Kramer2011-10-281-8/+3
| | | | llvm-svn: 143190
* test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit ↵NAKAMURA Takumi2011-10-281-1/+1
| | | | | | -mtriple=i686-linux. It must be for elf! llvm-svn: 143189
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-2818-651/+559
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it fixes the dragonegg self-host (it looks like gcc is miscompiled). Original commit messages: Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. Delete #if 0 code accidentally left in. llvm-svn: 143188
* Always use the string pool, even when it makes the .o larger. This may helpNick Lewycky2011-10-2811-102/+39
| | | | | | | tools that read the debug info in the .o files by making the DIE sizes more consistent. llvm-svn: 143186
* LFTR should avoid a type mismatch with null pointer IVs.Andrew Trick2011-10-282-16/+77
| | | | | | Fixes rdar://10359193 Indvar LinearFunctionTestReplace assertion llvm-svn: 143183
* Delete #if 0 code accidentally left in.Dan Gohman2011-10-281-17/+0
| | | | llvm-svn: 143179
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-2820-712/+667
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. llvm-svn: 143177
* Have llvm-config --cppflags print correct flags when in CMake build directoryPeter Collingbourne2011-10-283-1/+10
| | | | | | | | | | | | Previously, if invoked from a CMake build directory, 'llvm-config --cppflags' and friends would only print a -I flag for the build directory's header search path, because it would assume that it was already installed, not recognising its parent directory as being the build directory. Teach llvm-config about CMake build directories so that it prints a -I for both the source and build directory's search paths. llvm-svn: 143171
* ARM Allow 'q' registers in VLD/VST vector lists.Jim Grosbach2011-10-282-4/+56
| | | | | | | | Just treat it as if the constituent D registers where specified. rdar://10348896 llvm-svn: 143167
* Remove the Alpha backend.Dan Gohman2011-10-2798-6266/+12
| | | | llvm-svn: 143164
* Add testcase for r143162.Owen Anderson2011-10-271-0/+4
| | | | llvm-svn: 143163
* Add some NEON stores to the VLD decoding hook that were accidentally omitted ↵Owen Anderson2011-10-271-0/+4
| | | | | | previously. llvm-svn: 143162
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-274-6/+16
| | | | | | | Previously, we were only setting the alignment bits on over-aligned loads and stores. llvm-svn: 143160
* The default alias analysis is -noaa; update the docs to reflect that. Patch ↵Eli Friedman2011-10-271-8/+6
| | | | | | by Michael Ilseman. llvm-svn: 143159
* ARM isel for vld1, opcode selection for register stride post-index pseudos.Jim Grosbach2011-10-271-0/+4
| | | | llvm-svn: 143158
* Delete dead code. Nothing ever instantiates this.Jim Grosbach2011-10-271-4/+0
| | | | llvm-svn: 143153
* Revert r143149, stubbing out symbolic disassembly support. The symbolic ↵Owen Anderson2011-10-271-45/+6
| | | | | | disassembly support is too MC-engrained to be useful in llvm-objdump. llvm-svn: 143152
* If we're searching for a symbol reference to pretty-print a scattered ↵Owen Anderson2011-10-271-0/+18
| | | | | | relocation address, and we don't find a symbol table entry, try section begin addresses as well. llvm-svn: 143151
* Stub out support for symbol disassembly in llvm-objdump.Owen Anderson2011-10-271-6/+45
| | | | llvm-svn: 143149
* projects/sample: Switch over to imported Makefile setup.Daniel Dunbar2011-10-271-2/+6
| | | | | | - This will require you to manually reconfigure the projects/sample project (by running projects/config/sample/config.status --recheck) if you haven't updated/built since the 1st part of this commit went in. llvm-svn: 143148
* Avoid partial CPSR dependency from loop backedges. rdar://10357570Evan Cheng2011-10-272-26/+79
| | | | llvm-svn: 143145
* tests: Rip out a bunch of now unused test code relating to use of llvm-gcc ↵Daniel Dunbar2011-10-277-99/+5
| | | | | | in LLVM tests. llvm-svn: 143143
* tests: Remove llvm2cpp, I'm pretty sure no one uses this.Daniel Dunbar2011-10-271-100/+0
| | | | llvm-svn: 143142
* lit: Drop some unneeded code from example tests.Daniel Dunbar2011-10-274-66/+2
| | | | | | - Also, cleanup site.exp files in example tests. llvm-svn: 143141
* Fix pretty printing of i386 local sect diff relocations, TLV relocations, ↵Owen Anderson2011-10-271-7/+50
| | | | | | and x86_64 TLV relocations in MachO. llvm-svn: 143140
* Add a pinned metadata name for fpaccuracy, and document itPeter Collingbourne2011-10-273-1/+37
| | | | llvm-svn: 143135
* Document tbaa metadata in LangRef (documentation largely based onPeter Collingbourne2011-10-272-5/+56
| | | | | | comments at top of TypeBasedAliasAnalysis.cpp). llvm-svn: 143134
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