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* Make GDBJITRegistrar thread safe. Patch by Jim Kearyn, with cleanup byLang Hames2014-03-131-16/+10
| | | | | | | | Ivan Puzyrevskiy. Fixes PR15750. Thanks Jim and Ivan. llvm-svn: 203853
* Fix a subtle issue introduced my my recent changes to MachineRegisterInfo ↵Owen Anderson2014-03-131-1/+1
| | | | | | | | | | | | | | | iterators. When initializing an iterator, we may have to step forward to find the first operand that passes the current filter set. When doing that stepping, we should always step one operand at a time, even if this is by-instr or by-bundle iterator, as we're stepping between invalid values, so the stride doesn't make sense there. Fixes a miscompilation of YASM on Win32 reported by Hans Wennborg. I have not yet figured out how to reduce it to something testcase-able, because it's sensitive to the details of how the registers get spilled. llvm-svn: 203852
* Add -mtriple=x86_64-linux to this test case to fix the build bots.5Kevin Enderby2014-03-131-1/+1
| | | | | | The original commit was r203829. llvm-svn: 203844
* MCDwarf: Sink file/directory creation down into MCDwarfFileTable form MCContextDavid Blaikie2014-03-133-50/+52
| | | | llvm-svn: 203836
* Test commit - remove trailing whitespaceStephan Tolksdorf2014-03-131-1/+1
| | | | llvm-svn: 203834
* MCDwarf: Oh, and move the directory string over to std::string as wellDavid Blaikie2014-03-134-12/+9
| | | | | | (see r203831 for similar stuff) llvm-svn: 203833
* MCDwarf: Simplify MCDwarfFile to just use std::string instead of cunning use ↵David Blaikie2014-03-135-29/+23
| | | | | | | | | | | | | of MCContext's allocator. There aren't /that/ many files, and we are already using various maps and other standard containers that don't use MCContext's allocator to store these values, so this doesn't seem to be critical and simplifies the design (I'll be moving construction out of MCContext shortly so it'd be annoying to have to pass the allocator around to allocate these things... and we'll have non-MCContext users (debug_line.dwo) shortly) llvm-svn: 203831
* Fix for http://llvm.org/bugs/show_bug.cgi?id=18590Ekaterina Romanova2014-03-135-14/+114
| | | | | | | This patch fixes the bug in peephole optimization that folds a load which defines one vreg into the one and only use of that vreg. With debug info, a DBG_VALUE that referenced the vreg considered to be a use, preventing the optimization. The fix is to ignore DBG_VALUE's during the optimization, and undef a DBG_VALUE that references a vreg that gets removed. Patch by Trevor Smigiel! llvm-svn: 203829
* MCDwarf: Simply MCDwarfFile since it really is just a StringRef and unsigned.David Blaikie2014-03-135-43/+9
| | | | llvm-svn: 203827
* Use printable names to implement directional labels.Rafael Espindola2014-03-135-26/+44
| | | | | | | | | | | | | | This changes the implementation of local directional labels to use a dedicated map. With that it can then just use CreateTempSymbol, which is what the rest of MC uses. CreateTempSymbol doesn't do a great job at making sure the names are unique (or being efficient when the names are not needed), but that should probably be fixed in a followup patch. This fixes pr18928. llvm-svn: 203826
* Update my e-mail address in CODE_OWNERS.TXTTim Northover2014-03-131-1/+1
| | | | llvm-svn: 203824
* Remove stale commentDavid Blaikie2014-03-131-4/+0
| | | | llvm-svn: 203823
* MCDwarf: Refactor line table handling into a single data structureDavid Blaikie2014-03-135-60/+88
| | | | | | | | | | | | | | | | | This replaces several "compile unit ID -> thing" mappings in favor of one mapping from CUID to the whole line table structure (files, directories, and lines). This is another step along the way to refactoring out reusable components of line table handling for use when generating debug_line.dwo for fission type units. Also, might be a good basis to fold some of this handling down into MCStreamers to avoid the special case of "One line table when doing asm printing, line table per CU otherwise" by building it into the different MCStreamer implementations. llvm-svn: 203821
* R600: LDS instructions shouldn't implicitly define OQAPTom Stellard2014-03-132-2/+28
| | | | | | | | | LDS instructions are pseudo instructions which model the OQAP defs and uses within a single instruction. This fixes a hang in the opencv MedianFilter tests. llvm-svn: 203818
* Cleanup: Remove use of old "-enable-correct-eh-support" option from a testMark Seaborn2014-03-131-1/+1
| | | | | | | | | | | | | This option enables LowerInvoke's obsolete SJLJ EH support, but the target used in this test (ARM Darwin) no longer uses the LowerInvoke pass, so the option has no effect here. This target currently uses the newer SjLjEHPrepare pass instead. This cleanup will help with removing "-enable-correct-eh-support". Differential Revision: http://llvm-reviews.chandlerc.com/D3064 llvm-svn: 203810
* [ARM] Use symbolic register names in .cfi directives only with IAS (PR19110)Hans Wennborg2014-03-136-149/+180
| | | | | | | | | | This is a follow-up to r203635. Saleem pointed out that since symbolic register names are much easier to read, it would be good if we could turn them off only when we really need to because we're using an external assembler. Differential Revision: http://llvm-reviews.chandlerc.com/D3056 llvm-svn: 203806
* [C++11] Use ObjectFile::sections() in commandline llvm toolsAlexey Samsonov2014-03-135-114/+111
| | | | llvm-svn: 203802
* [C++11] Introduce ObjectFile::sections().Alexey Samsonov2014-03-135-55/+63
| | | | | | | | | | | | | | | | | | Summary: This adds ObjectFile::section_iterator_range, that allows to write range-based for-loops running over all sections of a given file. Several files from lib/ are converted to the new interface. Similar fixes should be applied to a variety of llvm-* tools. Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D3069 llvm-svn: 203799
* CodeGenPrep: sink extends of illegal types into use block.Manuel Jacob2014-03-134-84/+145
| | | | | | | | | | | | | | | | | | | Summary: This helps the instruction selector to lower an i64 * i64 -> i128 multiplication into a single instruction on targets which support it. This is an update of D2973 which was reverted because of a bug reported as PR19084. Reviewers: t.p.northover, chapuni Reviewed By: t.p.northover CC: llvm-commits, alex, chapuni Differential Revision: http://llvm-reviews.chandlerc.com/D3021 llvm-svn: 203797
* [msan] Fix handling of byval arguments in VarArg calls.Evgeniy Stepanov2014-03-132-21/+76
| | | | llvm-svn: 203794
* [CMake] Put -Werror to CMAKE_CXX_FLAGS instead of using add_llvm_definitions()Alexey Samsonov2014-03-131-3/+1
| | | | | | | | add_definitions shouldn't really be used for compiler flags, and the variable LLVM_DEFINITIONS is not appropriately used at the moment, e.g. it's not exported to LLVMConfig.cmake llvm-svn: 203792
* Remove utils/llvm-native-gcc.Rafael Espindola2014-03-131-249/+0
| | | | | | llvm-gcc had the ability to produce native .o files long before it died. llvm-svn: 203791
* AVX-512: masked load/store + intrinsics for them.Elena Demikhovsky2014-03-134-123/+158
| | | | llvm-svn: 203790
* First patch of patch series that improves MergeFunctions performance time ↵Stepan Dyatkovskiy2014-03-131-39/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from O(N*N) to O(N*log(N)). The idea is to introduce total ordering among functions set. That allows to build binary tree and perform function look-up procedure in O(log(N)) time. This patch description: Introduced total ordering among Type instances. Actually it is improvement for existing isEquivalentType. 0. Coerce pointer of 0 address space to integer. 1. If left and right types are equal (the same Type* value), return 0 (means equal). 2. If types are of different kind (different type IDs). Return result of type IDs comparison, treating them as numbers. 3. If types are vectors or integers, return result of its pointers comparison (casted to numbers). 4. Check whether type ID belongs to the next group: * Void * Float * Double * X86_FP80 * FP128 * PPC_FP128 * Label * Metadata If so, return 0. 5. If left and right are pointers, return result of address space comparison (numbers comparison). 6. If types are complex. Then both LEFT and RIGHT will be expanded and their element types will be checked with the same way. If we get Res != 0 on some stage, return it. Otherwise return 0. 7. For all other cases put llvm_unreachable. llvm-svn: 203788
* [PM] As was pointed out in review, I need to define a custom swap inChandler Carruth2014-03-132-15/+88
| | | | | | | | | | | | | order to use the single assignment. That's probably worth doing for a lot of these types anyways as they may have non-trivial moves and so getting copy elision in more places seems worthwhile. I've tried to add some tests that actually catch this mistake, and one of the types is now well tested but the others' tests still fail to catch this. I'll keep working on tests, but this gets the core pattern right. llvm-svn: 203780
* [PM] Stop playing fast and loose with rebinding of references. HoweverChandler Carruth2014-03-132-19/+19
| | | | | | | | convenient it is to imagine a world where this works, that is not C++ as was pointed out in review. The standard even goes to some lengths to preclude any attempt at this, for better or worse. Maybe better. =] llvm-svn: 203775
* AArch64: error when both positional & named operands are used.Tim Northover2014-03-133-4/+7
| | | | | | | | | | Only one instruction pair needed changing: SMULH & UMULH. The previous code worked, but MC was doing extra work treating Ra as a valid operand (which then got completely overwritten in MCCodeEmitter). No behaviour change, so no tests. llvm-svn: 203772
* [C++11] DWARF parser: use SmallVector<std::unique_ptr> for parsed units in ↵Alexey Samsonov2014-03-132-31/+20
| | | | | | DWARFContext, and delete custom destructors llvm-svn: 203770
* [PowerPC] Initial support for the VSX instruction setHal Finkel2014-03-1322-23/+2071
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VSX is an ISA extension supported on the POWER7 and later cores that enhances floating-point vector and scalar capabilities. Among other things, this adds <2 x double> support and generally helps to reduce register pressure. The interesting part of this ISA feature is the register configuration: there are 64 new 128-bit vector registers, the 32 of which are super-registers of the existing 32 scalar floating-point registers, and the second 32 of which overlap with the 32 Altivec vector registers. This makes things like vector insertion and extraction tricky: this can be free but only if we force a restriction to the right register subclass when needed. A new "minipass" PPCVSXCopy takes care of this (although it could do a more-optimal job of it; see the comment about unnecessary copies below). Please note that, currently, VSX is not enabled by default when targeting anything because it is not yet ready for that. The assembler and disassembler are fully implemented and tested. However: - CodeGen support causes miscompiles; test-suite runtime failures: MultiSource/Benchmarks/FreeBench/distray/distray MultiSource/Benchmarks/McCat/08-main/main MultiSource/Benchmarks/Olden/voronoi/voronoi MultiSource/Benchmarks/mafft/pairlocalalign MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4 SingleSource/Benchmarks/CoyoteBench/almabench SingleSource/Benchmarks/Misc/matmul_f64_4x4 - The lowering currently falls back to using Altivec instructions far more than it should. Worse, there are some things that are scalarized through the stack that shouldn't be. - A lot of unnecessary copies make it past the optimizers, and this needs to be fixed. - Many more regression tests are needed. Normally, I'd fix these things prior to committing, but there are some students and other contributors who would like to work this, and so it makes sense to move this development process upstream where it can be subject to the regular code-review procedures. llvm-svn: 203768
* [TableGen] Optionally forbid overlap between named and positional operandsHal Finkel2014-03-134-3/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are currently two schemes for mapping instruction operands to instruction-format variables for generating the instruction encoders and decoders for the assembler and disassembler respectively: a) to map by name and b) to map by position. In the long run, we'd like to remove the position-based scheme and use only name-based mapping. Unfortunately, the name-based scheme currently cannot deal with complex operands (those with suboperands), and so we currently must use the position-based scheme for those. On the other hand, the position-based scheme cannot deal with (register) variables that are split into multiple ranges. An upcoming commit to the PowerPC backend (adding VSX support) will require this capability. While we could teach the position-based scheme to handle that, since we'd like to move away from the position-based mapping generally, it seems silly to teach it new tricks now. What makes more sense is to allow for partial transitioning: use the name-based mapping when possible, and only use the position-based scheme when necessary. Now the problem is that mixing the two sensibly was not possible: the position-based mapping would map based on position, but would not skip those variables that were mapped by name. Instead, the two sets of assignments would overlap. However, I cannot currently change the current behavior, because there are some backends that rely on it [I think mistakenly, but I'll send a message to llvmdev about that]. So I've added a new TableGen bit variable: noNamedPositionallyEncodedOperands, that can be used to cause the position-based mapping to skip variables mapped by name. llvm-svn: 203767
* [C++11] Convert DWARF parser to range-based for loopsAlexey Samsonov2014-03-1316-165/+163
| | | | llvm-svn: 203766
* ARM: ignore unused variable to fix -Wunused-variable buildsSaleem Abdulrasool2014-03-131-0/+1
| | | | llvm-svn: 203765
* MC: fix silly typoSaleem Abdulrasool2014-03-131-1/+1
| | | | llvm-svn: 203763
* ARM: support emission of complex SO expressionsSaleem Abdulrasool2014-03-132-2/+22
| | | | | | | | | | | | | | Support to the IAS was added to actually parse and handle the complex SO expressions. However, the object file lowering was not updated to compensate for the fact that the shift operand may be an absolute expression. When trying to assemble to an object file, the lowering would fail while succeeding when emitting purely assembly. Add an appropriate test. The test case is inspired by the test case provided by Jiangning Liu who also brought the issue to light. llvm-svn: 203762
* Support: add support to identify WinCOFF/ARM objectsSaleem Abdulrasool2014-03-134-0/+22
| | | | | | | Add the Windows COFF ARM object file magic. This enables the LLVM tools to interact with COFF object files for Windows on ARM. llvm-svn: 203761
* [CMake] Enable a bunch of Xcode build settings that correspond to warnings ↵Ted Kremenek2014-03-131-0/+23
| | | | | | | | | | | | | | | | that are for the most part enabled by default either by Clang or -Wall. I personally build with these settings enabled all the time, and it is clearer to see the actual warning flags (e.g., -Wuninitialized) get passed by Xcode rather than seeing -Wno-uninitialized followed by -Wall (the latter canceling out the former) and figuring out what is going on. Xcode will ignore build settings it doesn't understand, so this will work on possibly older versions of Xcode that don't support all of these settings. llvm-svn: 203760
* Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitableOwen Anderson2014-03-138-76/+207
| | | | | | | | | | | | | | | | | | | for use with C++11 range-based for-loops. The gist of phase 1 is to remove the skipInstruction() and skipBundle() methods from these iterators, instead splitting each iterator into a version that walks operands, a version that walks instructions, and a version that walks bundles. This has the result of making some "clever" loops in lib/CodeGen more verbose, but also makes their iterator invalidation characteristics much more obvious to the casual reader. (Making them concise again in the future is a good motivating case for a pre-incrementing range adapter!) Phase 2 of this undertaking with consist of removing the getOperand() method, and changing operator*() of the operand-walker to return a MachineOperand&. At that point, it should be possible to add range views for them that work as one might expect. llvm-svn: 203757
* Fix PR18800. llvm intrinsic memcpy takes 5 arguments void ↵Karthik Bhat2014-03-132-9/+7
| | | | | | @llvm.memcpy.p0i8.p0i8.i32(i8* <dest>, i8* <src>, i32 <len>, i32 <align>, i1 <isvolatile>).The test case incorrectly uses the old format resulting in isVolatile function in MemIntrinsic to crash during SROA transformation.Modified the test case to use correct signature of memcpy and memset. llvm-svn: 203750
* Fix a false error reported by the tblgen backend for machine modelAndrew Trick2014-03-131-0/+12
| | | | | | | | | "ProcResource def is not included in the ProcResources". Some of the machine model definitions were not added to the processor's list used for diagnostics and error checking. llvm-svn: 203749
* MC: fix possible NULL pointer dereferenceSaleem Abdulrasool2014-03-131-1/+1
| | | | | | Avoid NULL pointer scenario found via clang's static analyzer. llvm-svn: 203745
* llvm/test/BugPoint/compile-custom.ll.py: Make it py3-compatible. [PR19112]NAKAMURA Takumi2014-03-131-1/+1
| | | | | | | FIXME: Get rid of invoking this. I guess it wouldn't run on win32 due to lacking of shell support. llvm-svn: 203740
* Fix typo in comment: "inwoke" -> "invoke"Mark Seaborn2014-03-131-1/+1
| | | | llvm-svn: 203739
* Fix whitespace in vectorizer exampleArnold Schwaighofer2014-03-121-1/+1
| | | | llvm-svn: 203738
* Fix vectorizer docs.Arnold Schwaighofer2014-03-121-3/+6
| | | | | | | This example is not vectorized because LLVM does not prove no-wrapping of "a[i*7] += ...". llvm-svn: 203734
* decl-derived-member.ll: Try to unbreak. Don't add -mtriple to %llc_dwarf.NAKAMURA Takumi2014-03-121-1/+1
| | | | llvm-svn: 203732
* Remove projects/sample.Rafael Espindola2014-03-1250-27470/+7
| | | | | | | | | | | | | | | As an example that was not actually being used, it suffered from a slow bitrot. The two main issues with it were that it had no cmake support and included a copy of the autoconf directory. The reality is that autoconf is not easily composable. The lack of composabilty is why we have clang options in llvm's configure. Suggesting that users include a copy of autoconf/ in their projects seems a bad idea. We are also in the process of switching to cmake, so pushing autoconf to new project is probably not what we want. llvm-svn: 203728
* MCDwarf: Remove unused parameterDavid Blaikie2014-03-121-5/+4
| | | | llvm-svn: 203727
* MCDwarf: Invert the Section+CU->LineEntries mapping so the CU is the primary ↵David Blaikie2014-03-124-81/+26
| | | | | | | | | | | | | | | | | | | | | | | | dimension This makes the mapping consistent with other CU->X mappings in the MCContext, helping pave the way to refactor all these values into a single data structure per CU and thus a single map. I haven't renamed the data structure as that would make the patch churn even higher (the MCLineSection name no longer makes sense, as this structure now contains lines for multiple sections covered by a single CU, rather than lines for a single section in multiple CUs) and further refactorings will follow that may remove this type entirely. For convenience, I also gave the MCLineSection value semantics so we didn't have to do the lazy construction, manual delete, etc. (& for those playing at home, refactoring the line printing into a single data structure will eventually alow that data structure to be reused to own the debug_line.dwo line table used for type unit file name resolution) llvm-svn: 203726
* This test need the X86 backend, move it to the X86 sub directory.Rafael Espindola2014-03-121-0/+0
| | | | llvm-svn: 203725
* Back out Profile library and dependent commitsJustin Bogner2014-03-1242-946/+199
| | | | | | | | | Chandler voiced some concern with checking this in without some discussion first. Reverting for now. This reverts r203703, r203704, r203708, and 203709. llvm-svn: 203723
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