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* Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-awareMichael Kuperstein2016-08-112-14/+48
| | | | | | | | This fixes PR28824. Differential Revision: https://reviews.llvm.org/D23220 llvm-svn: 278370
* AMDGPU: Fix crashes on memory functionsMatt Arsenault2016-08-113-1/+63
| | | | llvm-svn: 278369
* AArch64: Assert on analyzeBranch failingMatt Arsenault2016-08-111-2/+4
| | | | llvm-svn: 278366
* [AliasSetTracker] Delete dead codeMichael Kuperstein2016-08-112-146/+0
| | | | | | | | Deletes unused remove() and containsPointer() interfaces. NFC. Differential Revision: https://reviews.llvm.org/D23360 llvm-svn: 278365
* Fix some Clang-tidy modernize and Include What You Use warnings.Eugene Zelenko2016-08-115-50/+147
| | | | | | Differential revision: https://reviews.llvm.org/D23291 llvm-svn: 278364
* Add move ops to satisfy MSVC.Teresa Johnson2016-08-111-0/+46
| | | | | | | Try to appease MSVC bot: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/27164/steps/run%20tests/logs/stdio llvm-svn: 278363
* AMDGPU: Remove custom getSubRegMatt Arsenault2016-08-112-78/+10
| | | | | | | This was kind of confusing, the subregister class shouldn't really be necessary. llvm-svn: 278362
* AMDGPU: Remove unused tracking of flat instructionsMatt Arsenault2016-08-113-25/+0
| | | | llvm-svn: 278361
* AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.Wei Ding2016-08-117-21/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D23133 llvm-svn: 278360
* Hexagon: Avoid dereferencing end() in HexagonCopyToCombine::findPairableDuncan P. N. Exon Smith2016-08-111-2/+3
| | | | | | | | | | | | | Check for end() before skipping through debug values. This avoids dereferencing end() when the instruction is the final one in the basic block. (It still assumes that a debug value will not be the final instruction in the basic block. No tests seemed to violate that.) Many Hexagon tests trigger this, but they happen to magically pass right now. I found this because WIP patches for PR26753 convert them into crashes. llvm-svn: 278355
* AMDGPU : Add LLVM intrinsics for SAD related instructions.Wei Ding2016-08-1110-13/+212
| | | | | | Differential Revision: http://reviews.llvm.org/D23133 llvm-svn: 278354
* Add (hopefully last) remaining missing dependences to llvm-lto2Teresa Johnson2016-08-112-1/+3
| | | | | | | | | | There are still a few missing symbols reported by: http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15535/steps/build_llvmclang/logs/stdio http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15535/steps/build_llvmclang/logs/stdio This should hopefully take care of them. llvm-svn: 278353
* GlobalISel: clear vreg mapping after translating each functionTim Northover2016-08-113-3/+14
| | | | | | | Otherwise we only materialize (shared) constants in the first function they appear in. This doesn't go well. llvm-svn: 278351
* Remove FIXME about asserting on the end iteratorReid Kleckner2016-08-111-5/+1
| | | | | | | | | After machine block placement, MBBs may not have terminators, and it is appropriate to check for the end iterator here. We can fold the check into the next if, as well. This look is really just looking for BBs that end in CATCHRET. llvm-svn: 278350
* More missing llvm-lto2 dependenciesTeresa Johnson2016-08-111-0/+2
| | | | | | Follow-on to r278341: Update CMakeLists.txt to match LLVMBuild.txt llvm-svn: 278349
* [MCJIT] Improve documentation and error handling for MCJIT::runFunction.Lang Hames2016-08-112-1/+11
| | | | | | | | | | ExecutionEngine::runFunction is supposed to allow execution of arbitrary function types, but MCJIT can only reasonably support a limited subset of main-linke function types. This patch documents this limitation, and fixes MCJIT::runFunction to abort with a meaningful error at runtime if called with an unsupported function type. llvm-svn: 278348
* X86: Use operator lookup for operator==, NFCDuncan P. N. Exon Smith2016-08-111-2/+2
| | | | | | | Avoid relying on the MachineInstrBundleIterator operator== being implemented as a member function. llvm-svn: 278347
* IR: Don't cast the end iterator to Instruction*Duncan P. N. Exon Smith2016-08-111-2/+2
| | | | | | | | | | | End iterators are usually sentinels, not actually Instruction* at all. Stop casting to it just to get an iterator back. There is likely no observable functionality change here right now (although this is relying on UB, I doubt it was triggering anything), but I'll be removing the cast soon. llvm-svn: 278346
* CodeGen: Check for a terminator in llvm::getFuncletMembershipDuncan P. N. Exon Smith2016-08-111-0/+5
| | | | | | | | | | | | Check for an end iterator from MachineBasicBlock::getFirstTerminator in llvm::getFuncletMembership. If this is turned into an assertion, it fires in 48 X86 testcases (for example, CodeGen/X86/regalloc-spill-at-ehpad.ll). Since this is likely a latent bug (shouldn't all basic blocks end with a terminator?) I've filed PR28938. llvm-svn: 278344
* [SLP] Make RecursionMaxDepth a command line option (NFC)Matthew Simpson2016-08-111-2/+3
| | | | llvm-svn: 278343
* fix comment; NFCSanjay Patel2016-08-111-2/+3
| | | | llvm-svn: 278342
* Fix bot failure from r278338 due to missing dependencesTeresa Johnson2016-08-111-1/+1
| | | | | | | | Add some missing dependences to the llvm-lto2 tool to attempt to appease missing symbols in link from bot: http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15527 llvm-svn: 278341
* use auto* with dyn_cast ; NFCSanjay Patel2016-08-111-2/+1
| | | | llvm-svn: 278340
* getParent()->getParent() == getFunction() ; NFCSanjay Patel2016-08-111-2/+1
| | | | llvm-svn: 278339
* Restore "Resolution-based LTO API."Teresa Johnson2016-08-1137-1049/+2062
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This restores commit r278330, with fixes for a few bot failures: - Fix a late change I had made to the save temps output file that I missed due to existing files sitting on my disk - Fix a bunch of Windows bot failures with "ambiguous call to overloaded function" due to confusion between llvm::make_unique vs std::make_unique (preface the new make_unique calls with "llvm::") - Attempt to fix a modules bot failure by adding a missing include to LTO/Config.h. Original change: Resolution-based LTO API. Summary: This introduces a resolution-based LTO API. The main advantage of this API over existing APIs is that it allows the linker to supply a resolution for each symbol in each object, rather than the combined object as a whole. This will become increasingly important for use cases such as ThinLTO which require us to process symbol resolutions in a more complicated way than just adjusting linkage. Patch by Peter Collingbourne. Reviewers: rafael, tejohnson, mehdi_amini Subscribers: lhames, tejohnson, mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D20268 llvm-svn: 278338
* revert 278334Ehsan Amiri2016-08-114-190/+2
| | | | llvm-svn: 278337
* Revert "[AMDGPU] fix failure on printing of non-existing instruction operands."Valery Pykhtin2016-08-112-10/+0
| | | | | | This reverts revision 278333, newly added test failed. llvm-svn: 278336
* Extend trip count instead of truncating IV in LFTR, when legalEhsan Amiri2016-08-114-4/+193
| | | | | | | | | | | | | | | When legal, extending trip count in the loop control logic generates better code compared to truncating IV. This is because (1) extending trip count is a loop invariant operation (see genLoopLimit where we prove trip count is loop invariant). (2) Scalar Evolution seems to have problems understanding trunc when computing loop trip count. So removing them allows better analysis performed in Scalar Evolution. (In particular this fixes PR 28363 which is the motivation for this change). I am not going to perform any performance test. Any degradation caused by this should be an indication of a bug elsewhere. To prove legality, we rely on SCEV to prove zext(trunc(IV)) == IV (or similarly for sext). If this holds, we can prove equivalence of trunc(IV)==ExitCnt (1) and IV == zext(ExitCnt). Simply take zext of boths sides of (1) and apply the proven equivalence. https://reviews.llvm.org/D23075 llvm-svn: 278334
* [AMDGPU] fix failure on printing of non-existing instruction operands.Valery Pykhtin2016-08-112-0/+10
| | | | | | Differential revision: https://reviews.llvm.org/D23323 llvm-svn: 278333
* Revert "Resolution-based LTO API."Teresa Johnson2016-08-1137-2052/+1049
| | | | | | | | | | This reverts commit r278330. I made a change to the save temps output that is causing issues with the bots. Didn't realize this because I had older output files sitting on disk in my test output directory. llvm-svn: 278331
* Resolution-based LTO API.Teresa Johnson2016-08-1137-1049/+2052
| | | | | | | | | | | | | | | | | | | | | | Summary: This introduces a resolution-based LTO API. The main advantage of this API over existing APIs is that it allows the linker to supply a resolution for each symbol in each object, rather than the combined object as a whole. This will become increasingly important for use cases such as ThinLTO which require us to process symbol resolutions in a more complicated way than just adjusting linkage. Patch by Peter Collingbourne. Reviewers: rafael, tejohnson, mehdi_amini Subscribers: lhames, tejohnson, mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D20268 Address review comments llvm-svn: 278330
* Fixed VS2015 (Update 3) warning - differing const/volatile qualifiers for ↵Simon Pilgrim2016-08-111-1/+1
| | | | | | | | overridden function Dropped the const qualifier to match llvm::CallLowering::lowerCall llvm-svn: 278329
* [AVX512] Fix extractelement i1 lowering.Igor Breger2016-08-119-198/+273
| | | | | | | | | The previous implementation (not custom) doesn't enforce zeroing off upper bits. The assumption is that i1 PRODUCER (truncate and extractelement) must zero all upper bits, so i1 CONSUMER instructions ( test, zext, save, etc) can be done without additional zeroing. Make extractelement i1 lowering custom for all vector i1. Differential Revision: http://reviews.llvm.org/D23246 llvm-svn: 278328
* Avoid false dependencies of undef machine operandsMarina Yatsina2016-08-118-243/+320
| | | | | | | | | | | | | | | | | | | | This patch helps avoid false dependencies on undef registers by updating the machine instructions' undef operand to use a register that the instruction is truly dependent on, or use a register with clearance higher than Pref. Pseudo example: loop: xmm0 = ... xmm1 = vcvtsi2sdl eax, xmm0<undef> ... = inst xmm0 jmp loop In this example, selecting xmm0 as the undef register creates false dependency between loop iterations. This false dependency cannot be solved by inserting an xor before vcvtsi2sdl because xmm0 is alive at the point of the vcvtsi2sdl instruction. Selecting a different register instead of xmm0, especially a register that is not used in the loop, will eliminate this problem. Differential Revision: https://reviews.llvm.org/D22466 llvm-svn: 278321
* [Debug Info] Added a LIT test that covers the fix committed in rL277290.Amjad Aboud2016-08-111-0/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D23056 llvm-svn: 278320
* [AVX-512] Promote 512-bit integer loads to v8i64 similar to what is done for ↵Craig Topper2016-08-113-11/+12
| | | | | | 128/256-bit vectors for overall consistency. llvm-svn: 278318
* [AVX-512] Add patterns to allow EVEX encoded stores of ↵Craig Topper2016-08-113-3/+25
| | | | | | v16i16/v8i16/v16i8/v32i8 even when BWI is not supported. llvm-svn: 278317
* [AVX-512] Fix the 128-bit and 256-bit nontemporal load patterns with ↵Craig Topper2016-08-112-20/+10
| | | | | | elements type other than i64. These loads have all been promoted to v2i64/v4i64 loads so we need bitcasts or we end up selecting VMOVDQA32/VMOVDQU32 instead. llvm-svn: 278316
* [Profile] improve warning control option Xinliang David Li2016-08-112-5/+10
| | | | | | | | | Change --no-pgo-warn-missing to -pgo-warn-missing-function and negate the default. /NFC Add more test to make sure the warning is off by default llvm-svn: 278314
* [WebAssembly] Cleanup trailing whitespaceDominic Chen2016-08-111-2/+2
| | | | | | | | | | Summary: Test for commit access. Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D23392 llvm-svn: 278313
* Make more fields of InlineParams Optional.Easwaran Raman2016-08-112-6/+10
| | | | | | Differential revision: https://reviews.llvm.org/D23386 llvm-svn: 278312
* [Statepoints] Minor cosmetic change; NFCSanjoy Das2016-08-111-1/+1
| | | | | | The verification failure message was missing a space. llvm-svn: 278309
* [MachOYAML] Don't output empty ExportTrieChris Bieneman2016-08-111-1/+2
| | | | | | The YAML representation was always outputting the root node of an export trie even if the trie was empty. While this doesn't really have any functional impact, it does add visual clutter to the yaml file. llvm-svn: 278307
* GlobalISel: support same ConstantExprs as Instructions.Tim Northover2016-08-103-88/+143
| | | | | | | | It's more than just inttoptr, but the others can't be tested until we have support for non-trivial constants (they currently get unavoidably folded to a ConstantInt). llvm-svn: 278303
* [ADT] Move LLVM_ATTRIBUTE_UNUSED_RESULT to the function, otherwise gcc 4.8 ↵Tim Shen2016-08-101-2/+2
| | | | | | | | complains about it. It's a fix for the original patch r278251. llvm-svn: 278298
* GlobalISel: add tests forgotten in r278293.Tim Northover2016-08-101-0/+53
| | | | llvm-svn: 278296
* [LangRef] Fix formatting (no semantic change)Sanjoy Das2016-08-101-5/+4
| | | | llvm-svn: 278294
* GlobalISel: implement simple function calls on AArch64.Tim Northover2016-08-108-48/+183
| | | | | | | We're still limited in the arguments we support, but this at least handles the basic cases. llvm-svn: 278293
* AMDGPU/SI: Implement amdgcn image intrinsics with samplerChangpeng Fang2016-08-106-3/+1045
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch define and implement amdgcn image intrinsics with sampler. 1. define vdata type to be llvm_anyfloat_ty, address type to be llvm_anyfloat_ty, and rsrc type to be llvm_anyint_ty. As a result, we expect the intrinsics name to have three suffixes to overload each of these three types; 2. D128 as well as two other flags are implied in the three types, for example, if you use v8i32 as resource type, then r128 is 0! 3. don't expose TFE flag, and other flags are exposed in the instruction order: unrm, glc, slc, lwe and da. Differential Revision: http://reviews.llvm.org/D22838 Reviewed by: arsenm and tstellarAMD llvm-svn: 278291
* Changed sign of LastCallToStaticBounsPiotr Padlewski2016-08-103-3/+3
| | | | | | | | | | | | | | | | | Summary: I think it is much better this way. When I firstly saw line: Cost += InlineConstants::LastCallToStaticBonus; I though that this is a bug, because everywhere where the cost is being reduced it is usuing -=. Reviewers: eraman, tejohnson, mehdi_amini Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D23222 llvm-svn: 278290
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