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* Remove unnecessary instance variable and rework logic accordingly.Eric Christopher2013-05-062-8/+5
| | | | llvm-svn: 181227
* Grammar.Eric Christopher2013-05-061-1/+2
| | | | llvm-svn: 181226
* R600: Stop emitting the instruction type byte before each instructionTom Stellard2013-05-063-37/+6
| | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181225
* Don't emit .dwo sections unless they exist.Eric Christopher2013-05-061-24/+30
| | | | llvm-svn: 181224
* R600: Emit ISA for CALL_FS_* instructionsTom Stellard2013-05-062-1/+15
| | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181223
* [SystemZ] Update non-pic DWARF encodingsUlrich Weigand2013-05-062-9/+18
| | | | | | | | | | | | As pointed out by Rafael Espindola, we should match the DWARF encodings produced by GCC in both pic and non-pic modes. This was not the case for the non-pic case. This patch changes all DWARF encodings to DW_EH_PE_absptr for the non-pic case, just like GCC does. The test case is updated to check for both variants. llvm-svn: 181222
* PowerPC: Fix unimplemented relocation on ppc64Adhemerval Zanella2013-05-062-1/+6
| | | | | | | This patch handles the R_PPC64_REL64 relocation type for powerpc64 for mcjit. llvm-svn: 181220
* Fix add4.ll test cmdline so that it passesJean-Luc Duprat2013-05-061-1/+1
| | | | llvm-svn: 181219
* Provide InstCombines for the following 3 cases:Jean-Luc Duprat2013-05-064-0/+93
| | | | | | | | | | | | | A * (1 - (uitofp i1 C)) -> select C, 0, A B * (uitofp i1 C) -> select C, B, 0 select C, 0, A + select C, B, 0 -> select C, B, A These come up in code that has been hand-optimized from a select to a linear blend, on platforms where that may have mattered. We want to undo such changes with the following transform: A*(1 - uitofp i1 C) + B*(uitofp i1 C) -> select C, A, B llvm-svn: 181216
* AArch64: use MCJIT by default and enable related tests.Tim Northover2013-05-062-5/+1
| | | | | | | This just enables some testing I'd missed after implementing MCJIT support. llvm-svn: 181215
* [SystemZ] Add to --enable-targets=allUlrich Weigand2013-05-065-4/+5
| | | | | | | | | This patch finally enables the SystemZ target in the default build (with --enable-targets=all). Patch by Richard Sandiford. llvm-svn: 181209
* [SystemZ] Add configure bitsUlrich Weigand2013-05-067-8/+30
| | | | | | | | | | This patch wires up the SystemZ target in configure, so that it can now be built using --enable-targets=systemz. It is not yet included in the default build (--enable-targets=all); this will be done by a follow-up patch. Patch by Richard Sandiford. llvm-svn: 181208
* [SystemZ] Set up JIT/MCJIT test casesUlrich Weigand2013-05-066-10/+14
| | | | | | | | | | | This patch adds the necessary configuration bits and #ifdef's to set up the JIT/MCJIT test cases for SystemZ. Like other recent targets, we do fully support MCJIT, but do not support the old JIT at all. Set up the lit config files accordingly, and disable old-JIT unit tests. Patch by Richard Sandiford. llvm-svn: 181207
* [SystemZ] Add MC test casesUlrich Weigand2013-05-06582-0/+9426
| | | | | | | | This adds all MC tests for the SystemZ target. Patch by Richard Sandiford. llvm-svn: 181206
* [SystemZ] Add DebugInfo test casesUlrich Weigand2013-05-066-0/+595
| | | | | | | | | | | This adds all DebugInfo tests for the SystemZ target. This version of the patch incorporates feedback from reviews by Eric Christopher and Rafael Espindola. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181205
* [SystemZ] Add CodeGen test casesUlrich Weigand2013-05-06296-0/+31125
| | | | | | | | | | | This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
* [SystemZ] Add back endUlrich Weigand2013-05-0662-1/+10763
| | | | | | | | | | | | | | This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181203
* [SystemZ] Define DWARF encodingUlrich Weigand2013-05-061-0/+9
| | | | | | | | | | This is another patch in preparation for adding the SystemZ target. It defines the appropriate values for DWARF encodings; the intent is to be compatible with what GCC currently does on the target. Patch by Richard Sandiford. llvm-svn: 181201
* Simplify JIT unit test #ifdefsUlrich Weigand2013-05-062-28/+10
| | | | | | | | | | | | | | | | | | | Several platforms need to disable all old-JIT unit tests, since they only support the new MCJIT. This currently done via #ifdef'ing out those tests in the ExecutionEngine/JIT/*.cpp files. As those #ifdef's have grown historically, we now have a number of repeated directives which -in total- cover nearly the whole file, but leave a couple of helper functions out. When building the tests with clang itself, those helper functions now cause spurious "unused function" warnings. To fix those warnings, and also to remove the duplicate #ifdef conditions and make it easier to disable the tests for a new target, this patch consolidates the #ifdefs into a single one per file, which covers all the tests including all helper routines. Tested on PowerPC and SystemZ. llvm-svn: 181200
* Free the exception object. Should fix the vg bots.Rafael Espindola2013-05-061-0/+5
| | | | llvm-svn: 181195
* [PowerPC] Fix memory corruption in AsmParserUlrich Weigand2013-05-061-7/+7
| | | | | | | | As pointed out by Evgeniy Stepanov, assigning a std::string temporary to a StringRef is not a good idea. Rework MatchRegisterName to avoid using the .lower routine. llvm-svn: 181192
* Fix formatting. Patch by o11c.Duncan Sands2013-05-061-18/+18
| | | | llvm-svn: 181189
* Fix slightly too aggressive conact_vector optimization.Michael Kuperstein2013-05-062-0/+20
| | | | | | (Would sometimes optimize away conacts used to extend a vector with undef values) llvm-svn: 181186
* Add a testcase that checks that we generate functions with frameBill Wendling2013-05-061-0/+32
| | | | | | pointers or not depending upon the function attributes. llvm-svn: 181180
* XFAIL for cygwin.Rafael Espindola2013-05-061-1/+1
| | | | | | | Looks like symbol resolution is not working on cygwin, the test fails because __gxx_personality_v0 is not found. llvm-svn: 181179
* Update the comment to mention that we use TTI.Nadav Rotem2013-05-061-3/+3
| | | | llvm-svn: 181178
* Revert r164763 because it introduces new shuffles.Nadav Rotem2013-05-063-90/+2
| | | | | | Thanks Nick Lewycky for pointing this out. llvm-svn: 181177
* Fix unchecked uses of DominatorTree in MemoryDependenceAnalysis.Matt Arsenault2013-05-064-5/+54
| | | | | | Use unknown results for places where it would be needed llvm-svn: 181176
* Fix const merging when an alias of a const is llvm.used.Rafael Espindola2013-05-064-8/+29
| | | | | | | We used to disable constant merging not only if a constant is llvm.used, but also if an alias of a constant is llvm.used. This change fixes that. llvm-svn: 181175
* This should also fail on ARM.Rafael Espindola2013-05-051-1/+1
| | | | | | We currently have no way to register new eh frames on ARM. llvm-svn: 181172
* Fix XFAIL line.Rafael Espindola2013-05-051-1/+1
| | | | llvm-svn: 181171
* XFAIL this on ppc64.Rafael Espindola2013-05-051-0/+1
| | | | | | It looks like eh uses an unimplemented relocation on pp64 llvm-svn: 181169
* Port ExceptionDemo to MCJIT.Rafael Espindola2013-05-052-3/+10
| | | | llvm-svn: 181168
* Add EH support to the MCJIT.Rafael Espindola2013-05-0511-14/+188
| | | | | | | | | This gets exception handling working on ELF and Macho (x86-64 at least). Other than the EH frame registration, this patch also implements support for GOT relocations which are used to locate the personality function on MachO. llvm-svn: 181167
* Test case for r181160 and r181161. rdar://13782395Evan Cheng2013-05-051-0/+71
| | | | llvm-svn: 181162
* ARM AnalyzeBranch should conservatively return true when it sees a predicatedEvan Cheng2013-05-051-3/+9
| | | | | | | | | | indirect branch at the end of the BB. Otherwise if-converter, branch folding pass may incorrectly update its successor info if it consider BB as fallthrough to the next BB. rdar://13782395 llvm-svn: 181161
* Teach if-converter to avoid removing BBs whose addresses are takne. ↵Evan Cheng2013-05-051-2/+19
| | | | | | rdar://13782395 llvm-svn: 181160
* LoopVectorize: Print values instead of pointers in debug output.Benjamin Kramer2013-05-051-4/+4
| | | | llvm-svn: 181157
* [docs] Update Target Feature Matrix for the XCore backend.Richard Osborne2013-05-051-5/+5
| | | | | | | Disassembler support has recently been added. Fill in some other unknowns at the same time. llvm-svn: 181156
* [XCore] Add LDAPB instructions.Richard Osborne2013-05-052-3/+19
| | | | | | | With the change the disassembler now supports the XCore ISA in its entirety. llvm-svn: 181155
* [XCore] Update LDAP to use pcrel_imm.Richard Osborne2013-05-051-3/+3
| | | | llvm-svn: 181154
* [XCore] Rename calltarget -> pcrel_imm.Richard Osborne2013-05-051-6/+6
| | | | | | No functionality change. llvm-svn: 181153
* [XCore] Add BLRB instructions.Richard Osborne2013-05-052-0/+13
| | | | llvm-svn: 181152
* [XCore] Remove '-' from back branch asm syntax.Richard Osborne2013-05-052-6/+18
| | | | | | | | Instead operands are treated as negative immediates where the sign bit is implicit in the instruction encoding. llvm-svn: 181151
* InlineSpiller: Remove quadratic behavior.Benjamin Kramer2013-05-051-8/+11
| | | | | | No functionality change. llvm-svn: 181149
* For ARM backend, fixed "byval" attribute support.Stepan Dyatkovskiy2013-05-057-42/+360
| | | | | | | | | | | | | | | | | | | | | | | Now even the small structures could be passed within byval (small enough to be stored in GPRs). In regression tests next function prototypes are checked: PR15293: %artz = type { i32 } define void @foo(%artz* byval %s) define void @foo2(%artz* byval %s, i32 %p, %artz* byval %s2) foo: "s" stored in R0 foo2: "s" stored in R0, "s2" stored in R2. Next AAPCS rules are checked: 5.5 Parameters Passing, C.4 and C.5, "ParamSize" is parameter size in 32bit words: -- NSAA != 0, NCRN < R4 and NCRN+ParamSize > R4. Parameter should be sent to the stack; NCRN := R4. -- NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4. Parameter stored in GPRs; NCRN += ParamSize. llvm-svn: 181148
* Add missing PatternMatch.cpp to CMakeLists.txtArnold Schwaighofer2013-05-051-0/+1
| | | | llvm-svn: 181147
* PatternMatch: Fix documentation - 'function' not 'attribute'Arnold Schwaighofer2013-05-051-4/+4
| | | | llvm-svn: 181146
* Remove a recently redundant transform from X86ISelLowering.David Majnemer2013-05-052-15/+1
| | | | | | | | | | | | X86ISelLowering has support to treat: (icmp ne (and (xor %flags, -1), (shl 1, flag)), 0) as if it were actually: (icmp eq (and %flags, (shl 1, flag)), 0) However, r179386 has code at the InstCombine level to handle this. llvm-svn: 181145
* LoopVectorize: Add support for floating point min/max reductionsArnold Schwaighofer2013-05-052-22/+549
| | | | | | | | | | Add support for min/max reductions when "no-nans-float-math" is enabled. This allows us to assume we have ordered floating point math and treat ordered and unordered predicates equally. radar://13723044 llvm-svn: 181144
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