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* Spill and restore PPC CR registers using the FP when we have oneHal Finkel2013-04-132-7/+28
| | | | | | | | | | For functions that need to spill CRs, and have dynamic stack allocations, the value of the SP during the restore is not what it was during the save, and so we need to use the FP in these cases (as for all of the other spills and restores, but the CR restore has a special code path because its reserved slot, like the link register, is specified directly relative to the adjusted SP). llvm-svn: 179457
* Further generalize this scheduler test.Andrew Trick2013-04-131-2/+2
| | | | | | The order of copies depends on queue order, which is not very stable. llvm-svn: 179456
* Fix a dislexic regex.Andrew Trick2013-04-131-1/+1
| | | | llvm-svn: 179455
* Add a missing REQUIRES: assertsAndrew Trick2013-04-131-0/+1
| | | | llvm-svn: 179453
* MI-Sched: DEBUG formatting.Andrew Trick2013-04-131-14/+22
| | | | llvm-svn: 179452
* MI-Sched cleanup. If an instruction has no valid sched class, do not attempt ↵Andrew Trick2013-04-131-0/+2
| | | | | | to check for a variant. llvm-svn: 179451
* X86 machine model: reduce SandyBridge and Haswell ILPWindow.Andrew Trick2013-04-132-2/+2
| | | | | | | | | | | | | | | The initial values were arbitrary. I want them to be more conservative. This represents the number of latency cycles hidden by OOO execution. In practice, I think it should be within a small factor of the complex floating point operation latency so the scheduler can make some attempt to hide latency even for smallish blocks. These are by no means the best values, just a starting point for tuning heuristics. Some benchmarks such as TSVC run faster with this lower value for SandyBridge. I haven't run anything on Haswell, but it's shouldn't be 2x SB. llvm-svn: 179450
* MI-Sched: schedule physreg copies.Andrew Trick2013-04-135-14/+141
| | | | | | | | | | | The register allocator expects minimal physreg live ranges. Schedule physreg copies accordingly. This is slightly tricky when they occur in the middle of the scheduling region. For now, this is handled by rescheduling the copy when its associated instruction is scheduled. Eventually we may instead bundle them, but only if we can preserve the bundles as parallel copies during regalloc. llvm-svn: 179449
* Catch another case where SD fails to propagate node order.Andrew Trick2013-04-131-1/+4
| | | | | | | | | | I need to handle this for the test case in my following scheduler commit. Work is already under way to redesign the mechanism for node order propagation because this case by case approach is unmaintainable. llvm-svn: 179448
* Add typenames to see if bot goes green.Rafael Espindola2013-04-131-3/+3
| | | | | | I hope this brings http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32 back. llvm-svn: 179446
* [mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN andAkira Hatanaka2013-04-134-172/+174
| | | | | | | | lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering. No functionality changes. llvm-svn: 179444
* Some versions of gcc don't like typenames in these places.Rafael Espindola2013-04-131-9/+15
| | | | | | Should fix the bots. llvm-svn: 179441
* Finish templating MachObjectFile over endianness.Rafael Espindola2013-04-1310-593/+1353
| | | | | | | We are now able to handle big endian macho files in llvm-readobject. Thanks to David Fang for providing the object files. llvm-svn: 179440
* [mips] Reapply r179420 and r179421.Akira Hatanaka2013-04-135-18/+147
| | | | llvm-svn: 179434
* [mips] Override TargetLoweringBase::isShuffleMaskLegal.Akira Hatanaka2013-04-131-0/+5
| | | | llvm-svn: 179433
* [ms-inline asm] Simplify the logic by using parsePrimaryExpr. No functionalChad Rosier2013-04-121-1/+1
| | | | | | | change intended. Test case previously added in r178568. Part of rdar://13611297 llvm-svn: 179425
* Revert r179420 and r179421.Akira Hatanaka2013-04-125-147/+18
| | | | llvm-svn: 179422
* [mips] Instruction selection patterns for carry-setting and using addAkira Hatanaka2013-04-124-6/+26
| | | | | | instructions. llvm-svn: 179421
* [mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.Akira Hatanaka2013-04-123-12/+121
| | | | llvm-svn: 179420
* Revert r179409 because it caused some warnings and some of the build bots fail.Nadav Rotem2013-04-126-450/+44
| | | | llvm-svn: 179418
* InstCombine: Check the operand types before merging fcmp ord & fcmp ord.Benjamin Kramer2013-04-122-0/+24
| | | | | | Fixes PR15737. llvm-svn: 179417
* SLPVectorizer: add support for vectorization of diamond shaped trees. We now ↵Nadav Rotem2013-04-123-46/+337
| | | | | | perform a preliminary traversal of the graph to collect values with multiple users and check where the users came from. llvm-svn: 179414
* CostModel: increase the default cost of supported floating point operations ↵Nadav Rotem2013-04-124-10/+38
| | | | | | from 1 to two. Fixed a few tests that changes because now the cost of one insert + a vector operation on two doubles is lower than two scalar operations on doubles. llvm-svn: 179413
* Add debug prints.Nadav Rotem2013-04-121-1/+5
| | | | llvm-svn: 179412
* Add support for additional vector instructions in the interpreter.Nadav Rotem2013-04-126-44/+450
| | | | | | patch by Veselov, Yuri <Yuri.Veselov@intel.com>. llvm-svn: 179409
* [ms-inline asm] Move this logic into a static function as it's only applicableChad Rosier2013-04-121-63/+67
| | | | | | when parsing MS-style inline assembly. No functional change intended. llvm-svn: 179407
* [ms-inline asm] Address the FIXME for ImmDisp before brackets. ThisChad Rosier2013-04-121-18/+29
| | | | | | | | is a follow on to r179393 and r179399. Test case to be added on the clang side. Part of rdar://13453209 llvm-svn: 179403
* lit: Fix infinite recursion when an out-of-tree test root is located inside ↵Daniel Dunbar2013-04-125-9/+47
| | | | | | the source test root. llvm-svn: 179402
* lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).Daniel Dunbar2013-04-123-9/+60
| | | | llvm-svn: 179401
* [ms-inline asm] Have the [ Symbol ] case fall into the more general logic. ThisChad Rosier2013-04-121-46/+24
| | | | | | | is a follow on to r179393. Test case to be added on the clang side. Part of rdar://13453209 llvm-svn: 179399
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-126-27/+100
| | | | | | | | | | | | | According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes. The MC disassembler was not obeying this when the offset is 0. It was producing instructions like: str r0, [r1]!. Correct syntax is: str r0, [r1, #0]!. This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used. Patch by Mihail Popa <Mihail.Popa@arm.com> llvm-svn: 179398
* [ms-inline asm] Add support for operands that include both a symbol and anChad Rosier2013-04-121-41/+103
| | | | | | | | | immediate displacement. Specifically, add support for generating the proper IR. We've been able to parse this for some time now. Test case to be added on the clang side. Part of rdar://13453209 llvm-svn: 179393
* PPC: Remove (broken) nested implicit definition listsHal Finkel2013-04-122-94/+153
| | | | | | | | | | TableGen will not combine nested list 'let' bindings into a single list, and instead uses only the inner scope. As a result, several instruction definitions were missing implicit register defs that were in outer scopes. This de-nests these scopes and makes all instructions have only one let binding which sets implicit register definitions. llvm-svn: 179392
* Add a comment about the PPC Interpretation64Bit bitHal Finkel2013-04-121-0/+5
| | | | llvm-svn: 179391
* Hexagon: Set isPredicatedNew flag on predicate new instructions.Jyotsna Verma2013-04-122-22/+21
| | | | llvm-svn: 179388
* Hexagon: Set isPredicatedFlase flag for all the instructions with negated ↵Jyotsna Verma2013-04-122-21/+21
| | | | | | predication. llvm-svn: 179387
* Simplify (A & ~B) in icmp if A is a power of 2David Majnemer2013-04-122-0/+35
| | | | | | | | The transform will execute like so: (A & ~B) == 0 --> (A & B) != 0 (A & ~B) != 0 --> (A & B) == 0 llvm-svn: 179386
* [ms-inline asm] Add the implementation for the AOK_Delete kind, which was addedChad Rosier2013-04-121-3/+5
| | | | | | | in r179325. Test case coming shortly on the clang side. Part of rdar://13453209 llvm-svn: 179383
* LoopVectorizer: integer division is not a reduction operationArnold Schwaighofer2013-04-122-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't classify idiv/udiv as a reduction operation. Integer division is lossy. For example : (1 / 2) * 4 != 4/2. Example: int a[] = { 2, 5, 2, 2} int x = 80; for() x /= a[i]; Scalar: x /= 2 // = 40 x /= 5 // = 8 x /= 2 // = 4 x /= 2 // = 2 Vectorized: <80, 1> / <2,5> //= <40,0> <40, 0> / <2,2> //= <20,0> 20*0 = 0 radar://13640654 llvm-svn: 179381
* AArch64: use full triple for ELF testsTim Northover2013-04-1211-12/+12
| | | | | | | | These tests rely specifically on the names of ELF relocations, let alone any other detail. There's no way they'd work if LLVM was emitting something else by default. llvm-svn: 179376
* AArch64: remove over-zealous use of CHECK-NEXTTim Northover2013-04-121-38/+38
| | | | | | | | It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly differently with extra newlines; there was no real reason for the test lines to be consecutive, so this relaxes the FileCheck. llvm-svn: 179375
* Revert broken pieces of r179373.Benjamin Kramer2013-04-123-35/+37
| | | | | | You can't copy an OwningPtr, and move semantics aren't available in C++98. llvm-svn: 179374
* Replace uses of the deprecated std::auto_ptr with OwningPtr.Andy Gibbs2013-04-1212-50/+48
| | | | llvm-svn: 179373
* Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong ↵Benjamin Kramer2013-04-123-1/+48
| | | | | | | | answers for blocks larger than 3 instrs. Also add a unit test. PR15727. llvm-svn: 179370
* Don't explicitly provide -pie in MSan bootstrap of LLVM, as it's now implied ↵Alexey Samsonov2013-04-121-2/+0
| | | | | | by the driver llvm-svn: 179367
* Teach llvm-readobj to print ELF program headersNico Rieck2013-04-125-5/+136
| | | | llvm-svn: 179363
* Remove obsolete object file dumpersNico Rieck2013-04-1211-1261/+2
| | | | llvm-svn: 179362
* Replace coff-/elf-dump with llvm-readobjNico Rieck2013-04-12150-5043/+4581
| | | | llvm-svn: 179361
* Add extensive relocation tests for llvm-readobjNico Rieck2013-04-1214-0/+1749
| | | | | | | This test ensures that relocation type names returned by libObject match the raw relocation type value. llvm-svn: 179360
* Add -expand-relocs to llvm-readobjNico Rieck2013-04-126-23/+64
| | | | | | | | | | | | | | This option expands shown relocations from single line to a dictionary format: Relocation { Offset: 0x4 Type: R_386_32 (1) Symbol: sym Info: 0x0 } llvm-svn: 179359
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