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* CXX_FAST_TLS calling convention: performance improvement for ARM.Manman Ren2016-01-129-11/+111
| | | | | | | This is the same change on ARM as r255821 on AArch64. rdar://9001553 llvm-svn: 257424
* [libFuzzer] extend the weak memcmp/strcmp/strncmp interceptors to receive ↵Kostya Serebryany2016-01-121-3/+6
| | | | | | the result of the computations. With that, don't do any mutations if memcmp/etc returned 0 llvm-svn: 257423
* [IRMover] Don't copy personality, etc unless creating defTeresa Johnson2016-01-123-0/+27
| | | | | | | | | | | | | | Function::copyAttributesFrom will copy the personality function, prefix data and prolog data from the source function to the new function, and is invoked when the IRMover copies the function prototype. This puts a reference to a constant in the source module on a function in the dest module, which causes an error when deleting the source module after importing, since the personality function in the source module still has uses (this would presumably also be an issue for the prologue and prefix data). Remove the copies added to the dest copy when creating the new prototype, as they are mapped properly when/if we link the function body. llvm-svn: 257420
* [Orc] XFAIL a few remote-jit test cases that I missed in r257391.Lang Hames2016-01-113-2/+3
| | | | llvm-svn: 257419
* CXX_FAST_TLS calling convention: Add support for ARM on Darwin.Manman Ren2016-01-115-0/+60
| | | | | | rdar://9001553 llvm-svn: 257417
* [WebAssembly] Define WebAssembly-specific relocation codes.Dan Gohman2016-01-1121-52/+112
| | | | | | | | Currently WebAssembly has two kinds of relocations; data addresses and function addresses. This adds ELF relocations for them, as well as an MC symbol kind to indicate which type of relocation is needed. llvm-svn: 257416
* Avoid the deprecated GetVersionEx APIReid Kleckner2016-01-112-10/+19
| | | | | | | | | Apparently the preferred version is the incredibly complicated VerifyVersionInfoW function. Rename the function to avoid potential future name clashes. llvm-svn: 257415
* [LibCallSimplifier] use instruction-level fast-math-flags to transform log callsSanjay Patel2016-01-112-24/+46
| | | | | | | | | | | | | | Also, add tests to verify that we're checking 'fast' on both calls of each transform pair, tighten the CHECK lines, and give the tests more meaningful names. This is a continuation of: http://reviews.llvm.org/rL255555 http://reviews.llvm.org/rL256871 http://reviews.llvm.org/rL256964 http://reviews.llvm.org/rL257400 http://reviews.llvm.org/rL257404 llvm-svn: 257414
* Remove a bugs assert.Rafael Espindola2016-01-112-2/+52
| | | | | | | There is no reason the value being printed has to be positive. Fixes pr25802. llvm-svn: 257412
* lli-child-target: Introduce a new dependency on RuntimeDyld.NAKAMURA Takumi2016-01-111-0/+1
| | | | llvm-svn: 257410
* [LibCallSimplifier] don't allow sqrt transform unless all ops are unsafeSanjay Patel2016-01-112-2/+17
| | | | | | | Fix the FIXME added with: http://reviews.llvm.org/rL257400 llvm-svn: 257404
* LoopUnroll: Use the optsize threshold for minsize as wellJustin Bogner2016-01-112-5/+3
| | | | | | | | | | | | Currently we're unrolling loops more in minsize than in optsize, which means -Oz will have a larger code size than -Os. That doesn't make any sense. This resolves the FIXME about this in LoopUnrollPass and extends the optsize test to make sure we use the smaller threshold for minsize as well. llvm-svn: 257402
* more space; NFCSanjay Patel2016-01-111-0/+1
| | | | llvm-svn: 257401
* [LibCallSimplifier] use instruction-level fast-math-flags to transform sqrt ↵Sanjay Patel2016-01-114-44/+35
| | | | | | | | | | | | | | | | | | | | | | | calls This is a continuation of adding FMF to call instructions: http://reviews.llvm.org/rL255555 The intent of the patch is to preserve the current behavior of the transform except that we use the sqrt instruction's 'fast' attribute as a trigger rather than the function-level attribute. But this raises a bug noted by the new FIXME comment. In order to do this transform: sqrt((x * x) * y) ---> fabs(x) * sqrt(y) ...we need all of the sqrt, the first fmul, and the second fmul to be 'fast'. If any of those ops is strict, we should bail out. Differential Revision: http://reviews.llvm.org/D15937 llvm-svn: 257400
* getParent()->getParent() == getFunction() and clang-format ; NFCSanjay Patel2016-01-111-15/+11
| | | | llvm-svn: 257399
* don't repeat function names in comments; NFCSanjay Patel2016-01-111-88/+85
| | | | llvm-svn: 257396
* Add a missing error handling to llvm-lto.Rafael Espindola2016-01-112-0/+3
| | | | llvm-svn: 257395
* [WebAssembly] Reorganize address offset folding.Dan Gohman2016-01-111-85/+161
| | | | | | | | | | | | | Always expect tglobaladdr and texternalsym to be wrapped in WebAssemblywrapper nodes. Also, split out a regPlusGA from regPlusImm so that it can special-case global addresses, as they can be folded in more cases. Unfortunately this doesn't enable any new optimizations yet due to SelectionDAG limitations. I'll be submitting changes to the SelectionDAG infrastructure, along with tests, in a separate patch. llvm-svn: 257394
* AMDGPU: Implement {{s|u}}int_to_fp i64 -> f32Matt Arsenault2016-01-115-26/+227
| | | | | | | The old lowering for uint_to_fp failed opencl conformance. It might be OK for fast math mode, but I'm not sure. llvm-svn: 257393
* XFAIL the LLI remote JIT tests on Win32.Lang Hames2016-01-1120-5/+20
| | | | llvm-svn: 257391
* Split resolveCycles(bool AllowTemps) into two interfaces and documentTeresa Johnson2016-01-113-6/+30
| | | | | | | | | | | | | | Address review feedback from r255909. Move body of resolveCycles(bool AllowTemps) to resolveRecursivelyImpl(bool AllowTemps). Revert resolveCycles back to asserting on temps, and add new resolveNonTemporaries interface to invoke the new implementation with AllowTemps=true. Document the differences between these interfaces, specifically the effect on RAUW support and uniquing. Call appropriate interface from ValueMapper. llvm-svn: 257389
* BumpPtrAllocator::Reset should also poison the first slab which doesn't get ↵Pete Cooper2016-01-111-1/+2
| | | | | | | | | | | | | deallocated. When asan is enabled, we poison slabs as we allocate them, and only unpoison the pieces we need from the slab. However, in Reset, we were failing to reset the state of the slab back to being poisoned. Patch by b17 c0de. llvm-svn: 257388
* AMDGPU: Cleanup udiv testMatt Arsenault2016-01-111-22/+67
| | | | llvm-svn: 257387
* AMDGPU: Fix crash with dispatch.ptr intrinsic with non-HSA targetMatt Arsenault2016-01-112-0/+10
| | | | | | It might be better to let this be a select failure instead. llvm-svn: 257386
* [X86] Add AVX512 testcase for r248965/PR24512.Ahmed Bougacha2016-01-111-0/+24
| | | | llvm-svn: 257385
* Revert "[Windows] Simplify assertion code. NFC."Reid Kleckner2016-01-111-1/+4
| | | | | | | | | | | | | This reverts commit r254363. load64BitDebugHelp() has the side effect of loading dbghelp and setting globals. It should be called in no-asserts builds as well as debug builds. llvm_unreachable is also not appropriate here, since we actually want to return if dbghelp couldn't be loaded in a non-asserts build. llvm-svn: 257384
* [ORC] Add explicit move construction/assignment toLang Hames2016-01-111-3/+19
| | | | | | | | OrcRemoteTargetClient::ObjectAllocs. More MSVC bot appeasement. llvm-svn: 257382
* Update the VS getting started docs to reflect the current state of supportReid Kleckner2016-01-111-20/+14
| | | | llvm-svn: 257381
* Use ::GetVersionEx directly rather than the Win8.1 SDK helpersReid Kleckner2016-01-111-6/+4
| | | | | | | | This removes ifdefs and fixes the build for users of the Win8.0 SDK, which I happen to be. Upgrading is not hard, but executing the same code everywhere seems better. llvm-svn: 257379
* [ORC] More MSVC error wrangling.Lang Hames2016-01-111-0/+3
| | | | llvm-svn: 257377
* Ensure -mcpu=xscale works for arm targets, after rL252903 and rL252904Dimitry Andric2016-01-111-1/+1
| | | | | | | | | | | After these revisions, for arm targets, the -mcpu=xscale option caused an error: "the clang compiler does not support '-mcpu=xscale'". Adding "v5e" as a SUB_ARCH in ARMTargetParser.def helps. Submitted by: Andrew Turner Differential Revision: http://reviews.llvm.org/D16043 llvm-svn: 257376
* [sanitizer] [msan] Fix origin store of array typesAdhemerval Zanella2016-01-112-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the memory sanitizer origin store instrumentation for array types. This can be triggered by cases where frontend lowers function return to array type instead of aggregation. For instance, the C code: -- struct mypair { int64_t x; int y; }; mypair my_make_pair(int64_t x, int y) { mypair p; p.x = x; p.y = y; return p; } int foo (int p) { mypair z = my_make_pair(p, 0); return z.y + z.x; } -- It will be lowered with target set to aarch64-linux and -O0 to: -- [...] define i32 @_Z3fooi(i32 %p) #0 { [...] %call = call [2 x i64] @_Z12my_make_pairxi(i64 %conv, i32 0) %1 = bitcast %struct.mypair* %z to [2 x i64]* store [2 x i64] %call, [2 x i64]* %1, align 8 [...] -- The origin store will emit a 'icmp' to test each store value again the TLS origin array. However since 'icmp' does not support ArrayType the memory instrumentation phase will bail out with an error. This patch change it by using the same strategy used for struct type on array. It fixes the 'test/msan/insertvalue_origin.cc' for aarch64 (the -O0 case). llvm-svn: 257375
* [Orc] Fix missing return.Lang Hames2016-01-111-0/+1
| | | | llvm-svn: 257373
* [Orc] Add explicit move construction/assignment to RCMemoryManager.Lang Hames2016-01-111-3/+13
| | | | | | Yet another attempt to pacify MSVC. llvm-svn: 257372
* Fix some GCC 4.7 issues with the new Orc remote JIT supportDavid Blaikie2016-01-112-16/+21
| | | | | | | | I'm still seeing GCC ICE locally, but figured I'd throw this at the wall & see if it sticks for the bots at least. Will continue investigating the ICE in any case. llvm-svn: 257367
* Code refactoring for commit r257278.Chen Li2016-01-111-2/+2
| | | | llvm-svn: 257366
* [NFC] Fix whitespace.Chad Rosier2016-01-111-1/+1
| | | | llvm-svn: 257365
* [ORC] Explicitly delete copy constructors for RCMemoryManager::Alloc.Lang Hames2016-01-111-0/+3
| | | | | | More MSVC bot appeasement. llvm-svn: 257364
* [Orc] Include <system_error> in OrcTargetClient.Lang Hames2016-01-111-0/+1
| | | | | | Another shot at appeasing the clang-x86_64-ubuntu-gdb-75 builder. llvm-svn: 257362
* lli/ChildTarget now depends on OrcJIT. Add that component to the Makefile. Lang Hames2016-01-111-1/+1
| | | | llvm-svn: 257360
* Remove the remote-JIT small code model tests for now. They're causingLang Hames2016-01-114-48/+0
| | | | | | | | | intermittent XPASSes on some builders. These can be reinstated when we have proper support for small-code model in the JIT. llvm-svn: 257359
* [Orc] More explicit move construction/assignment to appease MSVC.Lang Hames2016-01-111-0/+13
| | | | llvm-svn: 257358
* XFAIL the remote small code model tests on x86. Small code model is not properlyLang Hames2016-01-114-4/+4
| | | | | | | supported, and only worked previously because we weren't really running them out-of-process. llvm-svn: 257355
* AMDGPU: int_to_fp test cleanupsMatt Arsenault2016-01-112-50/+162
| | | | llvm-svn: 257354
* AMDGPU: Fix ctlz combine for sub 32-bit typesMatt Arsenault2016-01-113-18/+107
| | | | llvm-svn: 257353
* AMDGPU: Pattern match ffbh pattern to instruction.Matt Arsenault2016-01-118-24/+273
| | | | | | | | The hardware instruction's output on 0 is -1 rather than 32. Eliminate a test and select to -1. This removes an extra instruction from the compatability function with HSAIL's firstbit instruction. llvm-svn: 257352
* [LLI] Remove dependence on RemoteTarget.cpp from ChildTarget's Makefile.Lang Hames2016-01-111-1/+1
| | | | | | RemoteTarget.cpp was removed in r257343. llvm-svn: 257351
* [ORC] Pacify MSVC by adding explicit move construction/assignment toLang Hames2016-01-111-2/+5
| | | | | | OrcRemoteTargetServer::Allocator. llvm-svn: 257350
* [ORC] Change 'auto' to 'std::error_code' to try to coax GCC builder intoLang Hames2016-01-111-2/+3
| | | | | | providing a more helpful error diagnostic. llvm-svn: 257349
* AMDGPU: Custom lower i64 ctlzMatt Arsenault2016-01-114-1/+143
| | | | llvm-svn: 257348
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