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* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-1813-50/+71
| | | | | | | | | store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. llvm-svn: 164132
* SROA.cpp: Appease msvc.NAKAMURA Takumi2012-09-181-1/+1
| | | | | | ...I don't know why this could appease msvc...baad. llvm-svn: 164130
* llvm/test/DebugInfo: Move two tests, 2010-04-13-PubType.ll and ↵NAKAMURA Takumi2012-09-182-0/+0
| | | | | | linkage-name.ll to X86. llvm-svn: 164129
* XFAIL SROA test until Chandler can get to it.Benjamin Kramer2012-09-181-0/+1
| | | | llvm-svn: 164128
* Coding standards: fix typo: '= deleted' -> '= delete'.Dmitri Gribenko2012-09-181-2/+2
| | | | llvm-svn: 164126
* Make MachinePostDominatorTree::DT privateTom Stellard2012-09-181-2/+4
| | | | llvm-svn: 164125
* LNT builders have picked up new SROA, disable it to get the remaining ↵Benjamin Kramer2012-09-181-1/+1
| | | | | | builders green again. llvm-svn: 164124
* Fix a warning in release builds and a test case I forgot to update withChandler Carruth2012-09-182-1/+2
| | | | | | a fix to getCommonType in the previous patch. llvm-svn: 164120
* Add a major missing piece to the new SROA pass: aggressive splitting ofChandler Carruth2012-09-183-8/+270
| | | | | | | | | | | | | | | | | | | | | | | FCAs. This is essential in order to promote allocas that are used in struct returns by frontends like Clang. The FCA load would block the rest of the pass from firing, resulting is significant regressions with the bullet benchmark in the nightly test suite. Thanks to Duncan for repeated discussions about how best to do this, and to both him and Benjamin for review. This appears to have blocked many places where the pass tries to fire, and so I'm expect somewhat different results with this fix added. As with the last big patch, I'm including a change to enable the SROA by default *temporarily*. Ben is going to remove this as soon as the LNT bots pick up the patch. I'm just trying to get a round of LNT numbers from the stable machines in the lab. NOTE: Four clang tests are expected to fail in the brief window where this is enabled. Sorry for the noise! llvm-svn: 164119
* Fix instcombine to obey requested alignment when merging allocas.Richard Osborne2012-09-182-3/+31
| | | | llvm-svn: 164117
* More domain conversion; convert VFP VMOVS to NEON instructions in more cases ↵James Molloy2012-09-182-15/+74
| | | | | | - when we may clobber the other S-lane by converting an S to a D instruction, make an effort to work out if the S lane is clobberable or not. llvm-svn: 164114
* Make custom operand parsing mnemonic indices use the same mnemonic table as ↵Craig Topper2012-09-181-34/+39
| | | | | | the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. llvm-svn: 164109
* Use variable type for index into mnemonic table. Shrinks size of index field ↵Craig Topper2012-09-181-5/+14
| | | | | | on in tree targets. Saving static data space. llvm-svn: 164108
* Replaced ReInitMCSubtargetInfo with InitMCProcessor.Andrew Trick2012-09-183-18/+20
| | | | | | | | Now where we used to call ReInitMCSubtargetInfo, we actually recompute the same information as InitMCSubtargetInfo instead of only setting the feature bits. llvm-svn: 164105
* Add LLVM_DELETED_FUNCTION to coding standards.Craig Topper2012-09-181-0/+28
| | | | llvm-svn: 164101
* Fix a typo. No functional change.Craig Topper2012-09-181-1/+1
| | | | llvm-svn: 164100
* Let NULL slip through again.Andrew Trick2012-09-181-1/+1
| | | | llvm-svn: 164099
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-187-22/+178
| | | | llvm-svn: 164098
* comment typoAndrew Trick2012-09-181-1/+1
| | | | llvm-svn: 164097
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-182-11/+1
| | | | llvm-svn: 164096
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for ↵Andrew Trick2012-09-181-0/+84
| | | | | | resolving instruction variants. llvm-svn: 164095
* TableGen subtarget emitter. Remove unnecessary header dependence.Andrew Trick2012-09-182-8/+10
| | | | llvm-svn: 164094
* Mark unimplemented operator new as LLVM_DELETED_FUNCTION.Craig Topper2012-09-181-10/+10
| | | | llvm-svn: 164093
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine ↵Andrew Trick2012-09-186-13/+65
| | | | | | model. llvm-svn: 164092
* Mark constructors, destructors, and operator new commented as 'do not ↵Craig Topper2012-09-185-43/+43
| | | | | | implement' with LLVM_DELETED_FUNCTION instead. llvm-svn: 164091
* Mark unimplemented copy constructors and copy assignment operators as ↵Craig Topper2012-09-188-21/+20
| | | | | | LLVM_DELETED_FUNCTION. llvm-svn: 164090
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-1811-53/+593
| | | | | | | | | aligned address. Based on patch by David Peixotto. Also use vld1.64 / vst1.64 with 128-bit alignment to take advantage of alignment hints. rdar://12090772, rdar://12238782 llvm-svn: 164089
* Mark asm matcher conversion table as const.Craig Topper2012-09-181-5/+5
| | | | llvm-svn: 164088
* Fix some funky indentation.Evan Cheng2012-09-181-18/+17
| | | | llvm-svn: 164087
* Fix typo in comment. No functional change.Craig Topper2012-09-181-1/+1
| | | | llvm-svn: 164086
* PGO: preserve branch-weight metadata when simplifying Switch to a sub, an icmpManman Ren2012-09-182-2/+85
| | | | | | and a conditional branch; also when removing dead cases from a switch. llvm-svn: 164084
* Backout the wrong subtarget emitter fixAndrew Trick2012-09-171-1/+1
| | | | llvm-svn: 164078
* PGO: preserve branch-weight metadata when simplifying SwitchManman Ren2012-09-172-1/+51
| | | | | | | Hanlde the case when we split the default edge if the default target has "icmp" and unconditinal branch. llvm-svn: 164076
* Fix release build after revertingAndrew Trick2012-09-171-2/+1
| | | | llvm-svn: 164075
* Merge into undefined lanes under -new-coalescer.Jakob Stoklund Olesen2012-09-174-3/+189
| | | | | | | | | | | | | | | | | Add LIS::pruneValue() and extendToIndices(). These two functions are used by the register coalescer when merging two live ranges requires more than a trivial value mapping as supported by LiveInterval::join(). The pruneValue() function can remove the part of a value number that is going to conflict in join(). Afterwards, extendToIndices can restore the live range, using any new dominating value numbers and updating the SSA form. Use this complex value mapping to support merging a register into a vector lane that has a conflicting value, but the clobbered lane is undef. llvm-svn: 164074
* Stop adding <imp-def> operands when expanding REG_SEQUENCE.Jakob Stoklund Olesen2012-09-171-4/+0
| | | | | | | | | | These extra operands are not needed by register allocators using VirtRegRewriter, and RAFast don't need them any longer. By omitting the <imp-def> operands, it becomes possible for the new register coalescer to track which lanes are valid and which are undef. llvm-svn: 164073
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-1713-356/+64
| | | | | | | I have to work out the Target/CodeGen header dependencies before putting this back. llvm-svn: 164072
* Remove redundant semicolons to fix -pedantic-errors build break with older ↵Richard Smith2012-09-171-4/+4
| | | | | | Clangs. llvm-svn: 164071
* llvm/Target/TargetSubtargetInfo.h: Fix case in #include, ↵NAKAMURA Takumi2012-09-171-1/+1
| | | | | | s#llvm/Codegen/#llvm/CodeGen#. llvm-svn: 164070
* PGO: preserve branch-weight metadata when simplifying SwitchOnSelect.Manman Ren2012-09-172-6/+54
| | | | llvm-svn: 164068
* Don't use NULL as a fake keywordAndrew Trick2012-09-171-1/+1
| | | | llvm-svn: 164067
* InitMCProcessorAndrew Trick2012-09-173-18/+20
| | | | llvm-svn: 164066
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-177-22/+178
| | | | llvm-svn: 164065
* comment typoAndrew Trick2012-09-171-1/+1
| | | | llvm-svn: 164064
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-172-11/+1
| | | | llvm-svn: 164063
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for ↵Andrew Trick2012-09-172-0/+93
| | | | | | resolving instruction variants. llvm-svn: 164062
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine ↵Andrew Trick2012-09-176-14/+65
| | | | | | model. llvm-svn: 164061
* TableGen subtarget emitter. Format and emit data tables for the new machine ↵Andrew Trick2012-09-171-6/+117
| | | | | | model. llvm-svn: 164060
* TableGen subtarget emitter. Generate data tables for the new machine model.Andrew Trick2012-09-171-2/+291
| | | | | | | | | | | | Map the CodeGenSchedule object model onto data tables. The structure of the data tables is defined in MC, so for convenience we include MCSchedule.h. The alternative is maintaining a redundant copy of the table structure definitions. Mapping the object model onto data tables is sufficiently complicated that it should not be interleaved with emitting source code. This avoids major problem with the backend for itinerary generation. llvm-svn: 164059
* TableGen subtarget emitter. Emit processor resources for the new machine model.Andrew Trick2012-09-171-10/+63
| | | | llvm-svn: 164058
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