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* [libFuzzer] one more puzzle, value_profile cracks it in a secondKostya Serebryany2016-09-093-0/+25
| | | | llvm-svn: 281066
* [pdb] Write PDB TPI Stream from Yaml.Zachary Turner2016-09-0930-148/+635
| | | | | | | | | | This writes the full sequence of type records described in Yaml to the TPI stream of the PDB file. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D24316 llvm-svn: 281063
* [llvm-cov] Handle native paths correctly in the text indexVedant Kumar2016-09-091-1/+5
| | | | | | | | | | Treat filenames the same way in the text index as we do in the html index. This is a follow-up to r281008 (an attempt to unbreak the native_separators.c test on Windows). Patch by Maggie Yi! llvm-svn: 281062
* Move the ocaml_all target into the Misc folder for cleanliness; NFC.Aaron Ballman2016-09-091-0/+1
| | | | llvm-svn: 281061
* [codeview] Don't assert if the array element type is incompleteReid Kleckner2016-09-092-15/+166
| | | | | | | | | This can happen when the frontend knows the debug info will be emitted somewhere else. Usually this happens for dynamic classes with out of line constructors or key functions, but it can also happen when modules are enabled. llvm-svn: 281060
* [Bitcode] Add compatibility test for the 3.9 releaseVedant Kumar2016-09-092-0/+1664
| | | | | | | Fork off compatibility.ll for the 3.9 release. The *.bc file in this commit was produced using a Release build of the release_39 branch. llvm-svn: 281059
* [InstCombine] add tests to show pattern matching failures due to commutationSanjay Patel2016-09-093-0/+148
| | | | | | | I was looking to fix a bug in getComplexity(), and these cases showed up as obvious failures. I'm not sure how to find these in general though. llvm-svn: 281055
* Attempt to fix static_asserts in SelectionDAGNodes.h that MSVC chokes on.Justin Lebar2016-09-091-14/+9
| | | | | | | | These were added in r281051, which, I am embarrassed to admit, has an incomplete commit message that I forgot to update before pushing. You can ignore element (2) in that list. llvm-svn: 281054
* [SelectionDAG] Fix two issues with SDNode::getRawSubclassData().Justin Lebar2016-09-091-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | 1) On some platforms, sizeof(SDNodeBits) == 1, so we were only copying one byte out of the bitfield when we wanted to copy two, and we were leaving half of the return value of getRawSubclassData() undefined. 2) Something something bitfields, not sure exactly what the issue or fix is, yet. (TODO) Summary: Previously we were assuming that SDNodeBits covered all of SDNode's anonymous subclass data bitfield union. But that's not right; it might have size 1, in which it clearly doesn't. This patch adds a field that does cover the whole union and adds static_asserts to ensure it stays correct. Reviewers: ahatanak, chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24223 llvm-svn: 281051
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-0923-519/+1764
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Prevously assembler parsed all literals as either 32-bit integers or 32-bit floating-point values. Because of this we couldn't support f64 literals. E.g. in instruction "v_fract_f64 v[0:1], 0.5", literal 0.5 was encoded as 32-bit literal 0x3f000000, which is incorrect and will be interpreted as 3.0517578125E-5 instead of 0.5. Correct encoding is inline constant 240 (optimal) or 32-bit literal 0x3FE00000 at least. With this change the way immediate literals are parsed is changed. All literals are always parsed as 64-bit values either integer or floating-point. Then we convert parsed literals to correct form based on information about type of operand parsed (was literal floating or binary) and type of expected instruction operands (is this f32/64 or b32/64 instruction). Here are rules how we convert literals: - We parsed fp literal: - Instruction expects 64-bit operand: - If parsed literal is inlinable (e.g. v_fract_f64_e32 v[0:1], 0.5) - then we do nothing this literal - Else if literal is not-inlinable but instruction requires to inline it (e.g. this is e64 encoding, v_fract_f64_e64 v[0:1], 1.5) - report error - Else literal is not-inlinable but we can encode it as additional 32-bit literal constant - If instruction expect fp operand type (f64) - Check if low 32 bits of literal are zeroes (e.g. v_fract_f64 v[0:1], 1.5) - If so then do nothing - Else (e.g. v_fract_f64 v[0:1], 3.1415) - report warning that low 32 bits will be set to zeroes and precision will be lost - set low 32 bits of literal to zeroes - Instruction expects integer operand type (e.g. s_mov_b64_e32 s[0:1], 1.5) - report error as it is unclear how to encode this literal - Instruction expects 32-bit operand: - Convert parsed 64 bit fp literal to 32 bit fp. Allow lose of precision but not overflow or underflow - Is this literal inlinable and are we required to inline literal (e.g. v_trunc_f32_e64 v0, 0.5) - do nothing - Else report error - Do nothing. We can encode any other 32-bit fp literal (e.g. v_trunc_f32 v0, 10000000.0) - Parsed binary literal: - Is this literal inlinable (e.g. v_trunc_f32_e32 v0, 35) - do nothing - Else, are we required to inline this literal (e.g. v_trunc_f32_e64 v0, 35) - report error - Else, literal is not-inlinable and we are not required to inline it - Are high 32 bit of literal zeroes or same as sign bit (32 bit) - do nothing (e.g. v_trunc_f32 v0, 0xdeadbeef) - Else - report error (e.g. v_trunc_f32 v0, 0x123456789abcdef0) For this change it is required that we know operand types of instruction (are they f32/64 or b32/64). I added several new register operands (they extend previous register operands) and set operand types to corresponding types: ''' enum OperandType { OPERAND_REG_IMM32_INT, OPERAND_REG_IMM32_FP, OPERAND_REG_INLINE_C_INT, OPERAND_REG_INLINE_C_FP, } ''' This is not working yet: - Several tests are failing - Problems with predicate methods for inline immediates - LLVM generated assembler parts try to select e64 encoding before e32. More changes are required for several AsmOperands. Reviewers: vpykhtin, tstellarAMD Subscribers: arsenm, kzhuravl, artem.tamazov Differential Revision: https://reviews.llvm.org/D22922 llvm-svn: 281050
* [Sparc][LEON] Removed the parts of the errata fixes implemented using inline ↵Chris Dewhurst2016-09-094-144/+9
| | | | | | assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. llvm-svn: 281047
* [ARM] ADD with a negative offset can become SUB for freeJames Molloy2016-09-092-0/+21
| | | | | | So model that directly in TTI::getIntImmCost(). llvm-svn: 281044
* [ARM] icmp %x, -C can be lowered to a simple ADDS or CMNJames Molloy2016-09-092-0/+45
| | | | | | Tell TargetTransformInfo about this so ConstantHoisting is informed. llvm-svn: 281043
* [SelectionDAG] Ensure DAG::getZeroExtendInReg is called with a scalar typeSimon Pilgrim2016-09-093-3/+110
| | | | | | Fixes issue with rL280927 identified by Mikael Holmén llvm-svn: 281042
* [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0)James Molloy2016-09-096-6/+81
| | | | | | The CMPZ #0 disappears during peepholing, leaving just a tADDi3, tADDi8 or t2ADDri. This avoids having to materialize the expensive negative constant in Thumb-1, and allows a shrinking from a 32-bit CMN to a 16-bit ADDS in Thumb-2. llvm-svn: 281040
* GlobalISel: remove G_TYPE and G_PHITim Northover2016-09-0918-60/+21
| | | | | | | | These instructions were only necessary when type information was stored in the MachineInstr (because only generic MachineInstrs possessed a type). Now that it's in MachineRegisterInfo, COPY and PHI work fine. llvm-svn: 281037
* GlobalISel: fix comments and add assertions for valid instructions.Tim Northover2016-09-092-56/+175
| | | | llvm-svn: 281036
* GlobalISel: move type information to MachineRegisterInfo.Tim Northover2016-09-0950-1310/+1220
| | | | | | | | | | | | | | | | | We want each register to have a canonical type, which means the best place to store this is in MachineRegisterInfo rather than on every MachineInstr that happens to use or define that register. Most changes following from this are pretty simple (you need an MRI anyway if you're going to be doing any transformations, so just check the type there). But legalization doesn't really want to check redundant operands (when, for example, a G_ADD only ever has one type) so I've made use of MCInstrDesc's operand type field to encode these constraints and limit legalization's work. As an added bonus, more validation is possible, both in MachineVerifier and MachineIRBuilder (coming soon). llvm-svn: 281035
* Revert "[mips] Fix c.<cc>.<fmt> instruction definition."Simon Dardis2016-09-0937-948/+614
| | | | | | | This reverts commit r281022. Mips buildbot broke, due to unhandled register class FCC. llvm-svn: 281033
* [AMDGPU] Assembler: rename amd_kernel_code_t asm names according to specSam Kolton2016-09-099-430/+273
| | | | | | | | | | | | | | Summary: Also removed duplicate code from AMDGPUTargetAsmStreamer. This change only change how amd_kernel_code_t is parsed and printed. No variable names are changed. Reviewers: vpykhtin, tstellarAMD Subscribers: arsenm, wdng, nhaehnle Differential Revision: https://reviews.llvm.org/D24296 llvm-svn: 281028
* [Thumb1] Teach optimizeCompareInstr about thumb1 comparesJames Molloy2016-09-093-9/+78
| | | | | | | | This avoids us doing a completely unneeded "cmp r0, #0" after a flag-setting instruction if we only care about the Z or C flags. Add LSL/LSR to the whitelist while we're here and add testing. This code could really do with a spring clean. llvm-svn: 281027
* [AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton2016-09-097-32/+126
| | | | | | | | | | | | | | | | | | | Summary: Split assembler match table in 4 tables with assembler variants: Default - all instructions except VOP3, SDWA and DPP - VOP3 - SDWA - DPP First match Default table then VOP3, SDWA and DPP. Reviewers: tstellarAMD, artem.tamazov, vpykhtin Subscribers: arsenm, wdng, nhaehnle, AMDGPU Differential Revision: https://reviews.llvm.org/D24252 llvm-svn: 281023
* [mips] Fix c.<cc>.<fmt> instruction definition.Simon Dardis2016-09-0937-614/+948
| | | | | | | | | | | | | | | As part of this effort, remove MipsFCmp nodes and use tablegen patterns rather than custom lowering through C++. Unexpectedly, this improves codesize for microMIPS as previous floating point setcc expansions would materialize 0 and 1 into GPRs before using the relevant mov[tf].[sd] instruction. Now $zero is used directly. Reviewers: dsanders, vkalintiris, zoran.jovanovic Differential Review: https://reviews.llvm.org/D23118 llvm-svn: 281022
* [Sparc][LEON] Unit test for CASA instruction supported by some LEON ↵Chris Dewhurst2016-09-091-0/+14
| | | | | | processors added. llvm-svn: 281021
* [Coroutines] Part13: Handle single edge PHINodes across suspendsGor Nishanov2016-09-094-4/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If one of the uses of the value is a single edge PHINode, handle it. Original: %val = something <suspend> %p = PHINode [%val] After Spill + Part13: %val = something %slot = gep val.spill.slot store %val, %slot <suspend> %p = load %slot Plus tiny fixes/changes: * use correct index for coro.free in CoroCleanup * fixup id parameter in coro.free to allow authoring coroutine in plain C with __builtins Reviewers: majnemer Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D24242 llvm-svn: 281020
* Rationalise the attribute getter/setter methods on Function and CallSite.Amaury Sechet2016-09-097-97/+51
| | | | | | | | | | | | | | | | | | | Summary: While woring on mapping attributes in the C API, it clearly appeared that the recent changes in the API on the C++ side left Function and Call/Invoke with an attribute API that grew in an ad hoc manner. This makes it difficult to work with it, because one doesn't know which overloads exists and which do not. Make sure that getter/setter function exists for both enum and string version. Remove inconsistent getter/setter, unless they have many callsites. This should make it easier to work with attributes in the future. This doesn't change how attribute works. Reviewers: bkramer, whitequark, mehdi_amini, void Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21514 llvm-svn: 281019
* [libFuzzer] improve -print_pcs to not print new PCs coming from libFuzzer itselfKostya Serebryany2016-09-092-8/+19
| | | | llvm-svn: 281016
* [libFuzzer] remove unneeded callKostya Serebryany2016-09-092-9/+0
| | | | llvm-svn: 281014
* [AVX-512] Add VPCMP instructions to the load folding tables and make them ↵Craig Topper2016-09-093-13/+63
| | | | | | commutable. llvm-svn: 281013
* [AVX-512] Add more integer vector comparison tests with loads. Some of these ↵Craig Topper2016-09-091-0/+198
| | | | | | | | show opportunities where we can commute to fold loads. Commutes will be added in a followup commit. llvm-svn: 281012
* [llvm-cov] Emit a summary in the report directory's indexVedant Kumar2016-09-098-35/+154
| | | | | | | | llvm-cov writes out an index file in '-output-dir' mode, albeit not a very informative one. Try to fix that by using the CoverageReport API to include some basic summary information in the index file. llvm-svn: 281011
* [llvm-cov] Constify some methods (NFC)Vedant Kumar2016-09-092-4/+5
| | | | llvm-svn: 281010
* [llvm-cov] Add an API to prepare file reports (NFC)Vedant Kumar2016-09-092-20/+47
| | | | | | | | It would be nice to prepare file reports (using the CoverageReport API) without actually rendering them to the console. I plan on using this to flesh out the 'index' files in the coverage views. llvm-svn: 281009
* [llvm-cov] Speculate fix for a Windows-only test (NFC)Vedant Kumar2016-09-091-4/+2
| | | | | | | | | | | | This test should have broken after r280896. Fix up the test case speculatively, since I don't have a way to test it. I wonder why I didn't get any angry bot emails about this. Maybe none of the win32 bots test llvm-cov? That could explain it, since the test says it 'REQUIRES: system-windows', which is restricted to win32 hosts. Also: why is 'system-windows' not defined for non-win32 Windows bots? llvm-svn: 281008
* [libFuzzer] remove use_traces=1 since use_value_profile seems to be strictly ↵Kostya Serebryany2016-09-097-84/+10
| | | | | | better llvm-svn: 281007
* [X86] Tighten up a comment which confused x64 ABI terminology.David Majnemer2016-09-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | The x64 ABI has two major function types: - frame functions - leaf functions A frame function is one which requires a stack frame. A leaf function is one which does not. A frame function may or may not have a frame pointer. A leaf function does not require a stack frame and may never modify SP except via a return (RET, tail call via JMP). A frame function which has a frame pointer is permitted to use the LEA instruction in the epilogue, a frame function without which doesn't establish a frame pointer must use ADD to adjust the stack pointer epilogue. Fun fact: Leaf functions don't require a function table entry (associated PDATA/XDATA). llvm-svn: 281006
* [X86] Add more baseline tests for "irregular" shuffles. NFC.Michael Kuperstein2016-09-091-13/+1136
| | | | | | | This adds more tests for shuffles where the output width does not match the input width and/or the output is generated from more than two inputs. llvm-svn: 281005
* Win64: Don't use REX prefix for direct tail callsHans Wennborg2016-09-089-12/+8
| | | | | | | | | | The REX prefix should be used on indirect jmps, but not direct ones. For direct jumps, the unwinder looks at the offset to determine if it's inside the current function. Differential Revision: https://reviews.llvm.org/D24359 llvm-svn: 281003
* .clang-tidy: parameters and members should be CamelCased.Mike Aizatsky2016-09-081-0/+4
| | | | | | | | Summary: Not sure why is it missing. Differential Revision: https://reviews.llvm.org/D24364 llvm-svn: 281002
* llvm-objdump: add missing ) in help output, NFCSaleem Abdulrasool2016-09-081-1/+1
| | | | | | Add a missing ')' in the help output. NFC. llvm-svn: 281000
* [libFuzzer] add missing docsKostya Serebryany2016-09-081-0/+3
| | | | llvm-svn: 280996
* Remove debug info when hoisting instruction from then/else branch.Dehao Chen2016-09-082-0/+91
| | | | | | | | | | | | Summary: The hoisted instruction is executed speculatively. It could affect the debugging experience as user would see gdb go into code that may not be expected to execute. It will also affect sample profile accuracy by assigning incorrect frequency to source within then/else branch. Reviewers: davidxl, dblaikie, chandlerc, kcc, echristo Subscribers: mehdi_amini, probinson, eric_niebler, andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D24164 llvm-svn: 280995
* [InstCombine] regenerate checksSanjay Patel2016-09-081-228/+284
| | | | llvm-svn: 280993
* [LV] Ensure proper handling of multi-use case when collecting uniformsMatthew Simpson2016-09-082-6/+9
| | | | | | | | | | | The test case included in r280979 wasn't checking what it was supposed to be checking for the predicated store case. Fixing the test revealed that the multi-use case (when a pointer is used by both vectorized and scalarized memory accesses) wasn't being handled properly. We can't skip over non-consecutive-like pointers since they may have looked consecutive-like with a different memory access. llvm-svn: 280992
* [InstCombine] regenerate checksSanjay Patel2016-09-081-60/+77
| | | | llvm-svn: 280991
* [RDF] Further improve handling of multiple phis reached from shadowsKrzysztof Parzyszek2016-09-082-31/+56
| | | | llvm-svn: 280987
* [llvm-cov] Fix issues with segment highlighting in the html viewVedant Kumar2016-09-083-30/+24
| | | | | | | | | | | | | The text and html coverage views take different approaches to emitting highlighted regions. That's because this problem is easier in the text view: there's no need to worry about escaping text or adding tooltip content to a highlighted snippet. Unfortunately, the html view didn't get region highlighting quite right. This patch fixes the situation, bringing parity between the two views. llvm-svn: 280981
* [LV] Don't mark pointers used by scalarized memory accesses uniformMatthew Simpson2016-09-082-42/+411
| | | | | | | | | | | | | | | | | | Previously, all consecutive pointers were marked uniform after vectorization. However, if a consecutive pointer is used by a memory access that is eventually scalarized, the pointer won't remain uniform after all. An example is predicated stores. Even though a predicated store may be consecutive, it will still be scalarized, making it's pointer operand non-uniform. This patch updates the logic in collectLoopUniforms to consider the cases where a memory access may be scalarized. If a memory access may be scalarized, its pointer operand is not marked uniform. The determination of whether a given memory instruction will be scalarized or not has been moved into a common function that is used by the vectorizer, cost model, and legality analysis. Differential Revision: https://reviews.llvm.org/D24271 llvm-svn: 280979
* [pdb] Make YamlTypeDumperCallbacks reuse *this.Zachary Turner2016-09-082-9/+18
| | | | | | | | | | | | | | | Previously we were making new instances of YamlTypeDumperCallbacks in order to recurse down and serialize / deserialize nested records such as field lists. This meant you could not pass context from a higher operation to a lower operation because it would be using a new instance of the visitor callback delegate. YAMLIO library was updated to support context-sensitive mappings, so now we can reuse the same instance of the visitor callback delegate even for nested operations. llvm-svn: 280978
* [YAMLIO] Add the ability to map with context.Zachary Turner2016-09-083-102/+263
| | | | | | | | | | | | | | | | | | | | | mapping a yaml field to an object in code has always been a stateless operation. You could still pass state by using the `setContext` function of the YAMLIO object, but this represented global state for the entire yaml input. In order to have context-sensitive state, it is necessary to pass this state in at the granularity of an individual mapping. This patch adds support for this type of context-sensitive state. You simply pass an additional argument of type T to the `mapRequired` or `mapOptional` functions, and provided you have specialized a `MappingContextTraits<U, T>` class with the appropriate mapping function, you can pass this context into the mapping function. Reviewed By: chandlerc Differential Revision: https://reviews.llvm.org/D24162 llvm-svn: 280977
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