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* [JumpThreading] Preservation of DT and LVI across the passBrian M. Rzycki2018-01-1215-99/+1308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: See D37528 for a previous (non-deferred) version of this patch and its description. Preserves dominance in a deferred manner using a new class DeferredDominance. This reduces the performance impact of updating the DominatorTree at every edge insertion and deletion. A user may call DDT->flush() within JumpThreading for an up-to-date DT. This patch currently has one flush() at the end of runImpl() to ensure DT is preserved across the pass. LVI is also preserved to help subsequent passes such as CorrelatedValuePropagation. LVI is simpler to maintain and is done immediately (not deferred). The code to perform the preversation was minimally altered and simply marked as preserved for the PassManager to be informed. This extends the analysis available to JumpThreading for future enhancements such as threading across loop headers. Reviewers: dberlin, kuhar, sebpop Reviewed By: kuhar, sebpop Subscribers: mgorny, dmgreen, kuba, rnk, rsmith, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40146 llvm-svn: 322401
* Try to fix more bots after r322391Paul Robinson2018-01-121-1/+0
| | | | llvm-svn: 322400
* Silence GCC 7 warning by using an enum class.Florian Hahn2018-01-121-36/+42
| | | | | | | | | | | | | | | | | This silences the following GCC7 warning: lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp:142:30: warning: enumeral and non-enumeral type in conditional expression [-Wextra] return F != Colors.end() ? F->second : None; ~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~ Reviewers: amharc, RKSimon, davide Reviewed By: RKSimon, davide Differential Revision: https://reviews.llvm.org/D41003 llvm-svn: 322398
* [llvm-cov] Skip unnecessary coverage computations for "export -summary-only".Max Moroz2018-01-122-30/+39
| | | | | | | | | | | | | | | | | | | Summary: This speeds up export "summary-only" execution by an order of magnitude or two, depending on number of threads used for prepareFileReports execution. Also includes minor refactoring for splitting render of summary and detailed data in two independent methods. Reviewers: vsk, morehouse Reviewed By: vsk Subscribers: llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D42000 llvm-svn: 322397
* Remove ELFDataTypeTypedefHelper class.Rui Ueyama2018-01-122-41/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D41973 llvm-svn: 322395
* Add toothpicks to test from r322391Paul Robinson2018-01-121-2/+2
| | | | llvm-svn: 322394
* [AArch64] Fix scheduling resources for post indexed loads and storesEvandro Menezes2018-01-121-2/+2
| | | | | | | | | Fix typos in the default scheduling resources when using the post indexed addressing modes. Differential revision: https://reviews.llvm.org/D40511 llvm-svn: 322392
* [DWARFv5] CodeGen support for MD5 file checksumsPaul Robinson2018-01-127-45/+101
| | | | | | | | | | Pass MD5 checksums through from IR to assembly/object files. After this, getting Clang to compute the MD5 should be the last step to supporting MD5 in the DWARF v5 line table header. Differential Revision: https://reviews.llvm.org/D41926 llvm-svn: 322391
* MC: Remove redundant `SetUsed` arguments in MCSymbol methodsSam Clegg2018-01-123-16/+15
| | | | | | | | | | | We can probably take this a step further since the only user of the isUsed flag is AsmParser it should probably be doing this explicitly. For now this is a step in the right direction though. Differential Revision: https://reviews.llvm.org/D41971 llvm-svn: 322386
* [X86][SSE] Force blend domains on stack folding testsSimon Pilgrim2018-01-122-7/+18
| | | | llvm-svn: 322385
* [X86][AVX] Regenerate element insertion testsSimon Pilgrim2018-01-121-2/+7
| | | | llvm-svn: 322384
* [X86] Remove unused isel pattern for zero extend from v16i1/v8i1 to ↵Craig Topper2018-01-121-5/+0
| | | | | | | | v16i32/v8i64. We have custom lowering on vzext that produces a vselect and a build vector. So zext never gets to isel. llvm-svn: 322381
* Allow dso_local on ifunc.Rafael Espindola2018-01-125-18/+16
| | | | | | | | | | | | | | | | | | | It was never fully disallowed. We were rejecting it in the asm parser, but not in the verifier. Currently TargetMachine::shouldAssumeDSOLocal returns true for hidden ifuncs. I considered changing it and moving the check from the asm parser to the verifier. The reason for deciding to allow it instead is that all linkers handle a direct reference just fine. They use the plt address as the address of the function. In fact doing that means that clang doesn't have the same bug as gcc: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83782. This patch then removes the check from the asm parser and updates the bitcode reader and writer. llvm-svn: 322378
* [docs] Tweak update to Phabricator docs about setting repository for diffs ↵Ben Hamilton2018-01-121-4/+6
| | | | | | | | | | | | | | | | | | uploaded via web Summary: In D41919, I missed that there was a *second* step when uploading diffs via web where the repository should be specified. Reviewers: asb, probinson Reviewed By: asb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41956 llvm-svn: 322375
* [llvm] Set up .arcconfig to point to Diffusion L repositoryBen Hamilton2018-01-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | Summary: Thanks to probinson for noticing this in his review of D41956. Now that we have repository callsigns set in all the other LLVM/Clang projects' .arcconfig files, we can set the top-level LLVM .arcconfig repository callsign to "L". This will correctly Cc: llvm-commits@ on all review requests sent out from the LLVM repo directory, using Herald rule H270. Reviewers: klimek, sammccall Reviewed By: sammccall Subscribers: llvm-commits, probinson, asb Differential Revision: https://reviews.llvm.org/D41964 llvm-svn: 322374
* [PowerPC] Don't miscompile rotate+mask into an ANDIo if it can't recreate ↵Benjamin Kramer2018-01-122-0/+139
| | | | | | | | | the immediate I'm not even sure if this transform is ever worth it, but this at least stops the bleeding. llvm-svn: 322373
* [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAPNemanja Ivanovic2018-01-125-0/+199
| | | | | | | | | | | | Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812. This patch ensures that the compare operand for the atomic compare and swap is properly zero-extended to 32 bits if applicable. A follow-up commit will fix the extension for the SETCC node generated when expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix. Differential Revision: https://reviews.llvm.org/D41856 llvm-svn: 322372
* Revert "[PowerPC] Manually schedule the prologue and epilogue"Stefan Pintilie2018-01-126-114/+56
| | | | | | | This reverts commit r322124 since some tests were broken by that patch. Will recommmit once the patch is fixed. llvm-svn: 322369
* [ARM GlobalISel] Add inst selector tests for G_FMADiana Picus2018-01-122-0/+253
| | | | | | | We don't yet match all the patterns involving G_FMA. Add tests for some of the ones that we do match. llvm-svn: 322368
* [ARM GlobalISel] Map G_FMA to FPRDiana Picus2018-01-122-2/+72
| | | | llvm-svn: 322367
* [ARM GlobalISel] Legalize G_FMADiana Picus2018-01-123-2/+137
| | | | | | | | | | | For hard float with VFP4, it is legal. Otherwise, we use libcalls. This needs a bit of support in the LegalizerHelper for soft float because we didn't handle G_FMA libcalls yet. The support is trivial, as the only difference between G_FMA and other libcalls that we already handle is that it has 3 input operands rather than just 2. llvm-svn: 322366
* [IRCE][NFC] Make range check's End a non-null SCEVMax Kazantsev2018-01-122-17/+19
| | | | | | | | | | | | | Currently, IRC contains `Begin` and `Step` as SCEVs and `End` as value. Aside from that, `End` can also be `nullptr` which can be later conditionally converted into a non-null SCEV. To make this logic more transparent, this patch makes `End` a SCEV and calculates it early, so that it is never a null. Differential Revision: https://reviews.llvm.org/D39590 llvm-svn: 322364
* [ARM] Add codegen for SMMULR, SMMLAR and SMMLSRAndre Vieira2018-01-125-61/+292
| | | | | | | | | This patch teaches the Arm back-end to generate the SMMULR, SMMLAR and SMMLSR instructions from equivalent IR patterns. Differential Revision: https://reviews.llvm.org/D41775 llvm-svn: 322361
* [ARM] Fix erroneous availability of SMMLS for Armv7-MAndre Vieira2018-01-123-2/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D41855 llvm-svn: 322360
* [CGP] Re-enable Select in complex addressing modeSerguei Katkov2018-01-122-2/+2
| | | | | | | | Re-enable Select after a couple of fixes. Differential Revision: https://reviews.llvm.org/D40634 llvm-svn: 322358
* [LoopDeletion] Handle users in unreachable blockSerguei Katkov2018-01-122-0/+50
| | | | | | | | | | | | | | This is a fix for PR35884. When we want to delete dead loop we must clean uses in unreachable blocks otherwise we'll get an assert during deletion of instructions from the loop. Reviewers: anna, davide Reviewed By: anna Subscribers: llvm-commits, lebedev.ri Differential Revision: https://reviews.llvm.org/D41943 llvm-svn: 322357
* [X86] Don't allow lods/stos/scas/cmps/movs to be parsed without a suffix and ↵Craig Topper2018-01-121-20/+20
| | | | | | | | only memory operand in at&t syntax. Without a register with a size being mentioned the instruction is ambiguous in at&t syntax. With Intel syntax the memory operation caries a size that can be used to disambiguate. llvm-svn: 322356
* [X86] Don't require suffix on 'clr' mnemonic in intel syntaxCraig Topper2018-01-121-4/+4
| | | | llvm-svn: 322355
* [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.Craig Topper2018-01-129-202/+202
| | | | | | While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler. llvm-svn: 322354
* [X86] Disable sldtq parsing in 64-bit mode.Craig Topper2018-01-121-2/+2
| | | | llvm-svn: 322353
* [X86] Disable movsq/stosq/scasqcmpsq/lodsq parsing in 64-bit mode.Craig Topper2018-01-121-5/+10
| | | | llvm-svn: 322352
* [CMake] Add LLVM_ENABLE_IDE option to better process sources for IDE'sEric Fiselier2018-01-122-1/+8
| | | | | | | | | | | | | | | | | | | | | Summary: Currently LLVM has no way to support configuring for IDE's like CLion. Like XCode and MSVC's IDE, CLion needs to see all of the headers and tablegen files in order to properly parse the sources. This patch adds an `LLVM_ENABLE_IDE` option which can be used to configure for IDE's in general. It is used by `LLVMProcessSources.cmake` to determine if the extra source files should be added to the target. Unfortunately because of the low level of `LLVMProcessSources.cmake`, I'm not sure where the `LLVM_ENABLE_IDE` option should live. I choose `HandleLLVMOptions.cmake` so that out-of-tree Clang builds would correctly configure the option by default. Reviewers: beanz, mgorny, lebedev.ri Reviewed By: beanz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40219 llvm-svn: 322349
* Instead of ELFFile<ELFT>::Type, use ELFT::Type. NFC.Rui Ueyama2018-01-126-60/+57
| | | | llvm-svn: 322346
* [RISCV] Pass MCSubtargetInfo to print methods.Ana Pazos2018-01-124-9/+140
| | | | | | | | | | | | | | | | Summary: This change allows checking for ISA extensions in print methods. Reviewers: asb, niosHD Reviewed By: asb, niosHD Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal Differential Revision: https://reviews.llvm.org/D41503 llvm-svn: 322345
* Fix typo.Rui Ueyama2018-01-121-2/+2
| | | | llvm-svn: 322344
* [WebAssembly] Don't allow functions to be named twiceSam Clegg2018-01-122-1/+34
| | | | | | | | The spec doesn't allow this. Differential Revision: https://reviews.llvm.org/D41974 llvm-svn: 322343
* Use ELF{32,64}{LE,BE} instead of ELFType<{little,big}, {true,false}>. NFC.Rui Ueyama2018-01-124-21/+15
| | | | llvm-svn: 322342
* [ORC] Add a stub ExecutionSession and VModuleKey type.Lang Hames2018-01-122-1/+25
| | | | | | | | | | ExecutionSession will represent a running JIT program. VModuleKey is a unique key assigned to each module added as part of an ExecutionSession. The Layer concept will be updated in future to require a VModuleKey when a module is added. llvm-svn: 322336
* Revert r322279 due to Skylake miscompile.David L. Jones2018-01-128-415/+449
| | | | | | | | | | | | Summary: This revision causes Skylake (and apparently, only Skylake) codegen to fail in certain cases. Details: https://bugs.llvm.org/show_bug.cgi?id=35918 Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D41972 llvm-svn: 322335
* [WebAssembly] MC: Remove SetUsed argument when calling MCSymbol::isDefined et alSam Clegg2018-01-111-7/+7
| | | | | | | | | | | | | Summary: This argument (the isUsed flag) seems to only be relevant when parsing. Other calls sites such as these don't seem to ever use it. Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish Differential Revision: https://reviews.llvm.org/D41970 llvm-svn: 322332
* [InstSimplify] fold implied cmp with zero (PR35790)Sanjay Patel2018-01-112-24/+50
| | | | | | | | | This doesn't handle the more complicated case in the bug report yet: https://bugs.llvm.org/show_bug.cgi?id=35790 For that, we have to match / look through a cast. llvm-svn: 322327
* PeepholeOpt cleanup/refactor; NFCMatthias Braun2018-01-111-440/+370
| | | | | | | | | | | | | | | | | | - Less unnecessary use of `auto` - Add early `using RegSubRegPair(AndIdx) =` to avoid countless `TargetInstrInfo::` qualifications. - Use references instead of pointers where possible. - Remove unused parameters. - Rewrite the CopyRewriter class hierarchy: - Pull out uncoalescable copy rewriting functionality into PeepholeOptimizer class. - Use an abstract base class to make it clear that rewriters are independent. - Remove unnecessary \brief in doxygen comments. - Remove unused constructor and method from ValueTracker. - Replace UseAdvancedTracking of ValueTracker with DisableAdvCopyOpt use. llvm-svn: 322325
* [hwasan] Stack instrumentation.Evgeniy Stepanov2018-01-113-3/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Very basic stack instrumentation using tagged pointers. Tag for N'th alloca in a function is built as XOR of: * base tag for the function, which is just some bits of SP (poor man's random) * small constant which is a function of N. Allocas are aligned to 16 bytes. On every ReturnInst allocas are re-tagged to catch use-after-return. This implementation has a bunch of issues that will be taken care of later: 1. lifetime intrinsics referring to tagged pointers are not recognized in SDAG. This effectively disables stack coloring. 2. Generated code is quite inefficient. There is one extra instruction at each memory access that adds the base tag to the untagged alloca address. It would be better to keep tagged SP in a callee-saved register and address allocas as an offset of that XOR retag, but that needs better coordination between hwasan instrumentation pass and prologue/epilogue insertion. 3. Lifetime instrinsics are ignored and use-after-scope is not implemented. This would be harder to do than in ASan, because we need to use a differently tagged pointer depending on which lifetime.start / lifetime.end the current instruction is dominated / post-dominated. Reviewers: kcc, alekseyshl Subscribers: srhines, kubamracek, javed.absar, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D41602 llvm-svn: 322324
* [InstSimplify] add tests for implied cmp with zero (PR35790); NFCSanjay Patel2018-01-111-0/+142
| | | | llvm-svn: 322323
* PeepholeOptimizer: Fix for vregs without defsMatthias Braun2018-01-115-10/+74
| | | | | | | | | | The PeepholeOptimizer would fail for vregs without a definition. If this was caused by an undef operand abort to keep the code simple (so we don't need to add logic everywhere to replicate the undef flag). Differential Revision: https://reviews.llvm.org/D40763 llvm-svn: 322319
* Make internal/private GVs implicitly dso_local.Rafael Espindola2018-01-1139-102/+122
| | | | | | | | | | | | | | | | While updating clang tests for having clang set dso_local I noticed that: - There are *a lot* of tests to update. - Many of the updates are redundant. They are redundant because a GV is "obviously dso_local". This patch starts formalizing that a bit by requiring that internal and private GVs be dso_local too. Since they all are, we don't have to print dso_local to the textual representation, making it a bit more compact and easier to read. llvm-svn: 322317
* Tighten up DIFile verifier for checksumsPaul Robinson2018-01-113-5/+51
| | | | | | Differential Revision: https://reviews.llvm.org/D41965 llvm-svn: 322314
* PeepholeOptimizer: Do not form PHI with subreg argumentsMatthias Braun2018-01-112-22/+86
| | | | | | | | | | | | | | | | | | | | | When replacing a PHI the PeepholeOptimizer currently takes the register class of the register at the first operand. This however is not correct if this argument has a subregister index. As there is currently no API to query the register class resulting from applying a subregister index to all registers in a class, we can only abort in these cases and not perform the transformation. This changes findNextSource() to require the end of all copy chains to not use a subregister if there is any PHI in the chain. I had to rewrite the overly complicated inner loop there to have a good place to insert the new check. This fixes https://llvm.org/PR33071 (aka rdar://32262041) Differential Revision: https://reviews.llvm.org/D40758 llvm-svn: 322313
* [arm] Implement Target Operand Flag MIR serialization.Evgeniy Stepanov2018-01-113-2/+37
| | | | | | | | | | Reviewers: efriedma, pcc Subscribers: aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D39975 llvm-svn: 322312
* [Sink] Really really fix predicate in legality checkFiona Glaser2018-01-112-3/+11
| | | | | | | | | | | LoadInst isn't enough; we need to include intrinsics that perform loads too. All side-effecting intrinsics and such are already covered by the isSafe check, so we just need to care about things that read from memory. D41960, originally from D33179. llvm-svn: 322311
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