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* Remove old fenv.h workaround for a historic clang driver bugAlp Toker2014-06-091-9/+2
| | | | | | | | | | | Tested and works fine with clang using libstdc++. All indications are that this was fixed some time ago and isn't a problem with any clang version we support. I've added a note in PR6907 which is still open for some reason. llvm-svn: 210485
* Fold FEnv.h into the implementationAlp Toker2014-06-092-63/+41
| | | | | | | | | | | | | | | | | | Support headers shouldn't use config.h definitions, and they should never be undefined like this. ConstantFolding.cpp was the only user of this facility and already includes config.h for other math features, so it makes sense to move the checks there at point of use. (The implicit config.h was also quite dangerous -- removing the FEnv.h include would have silently disabled math constant folding without causing any tests to fail. Need to investigate -Wundef once the cleanup is done.) This eliminates the last config.h include from LLVM headers, paving the way for more consistent configuration checks. llvm-svn: 210483
* [OCaml] Add more Llvm_target testsPeter Zotov2014-06-091-2/+3
| | | | | | Patch by Jacques-Pascal Deplaix llvm-svn: 210482
* [OCaml] Unbreak Llvm_target.TargetMachine.set_verbose_asmPeter Zotov2014-06-091-2/+2
| | | | | | Patch by Jacques-Pascal Deplaix llvm-svn: 210480
* Move all of the x86 subtarget initialized variables down into the x86 subtargetEric Christopher2014-06-097-67/+95
| | | | | | from the x86 target machine. Should be no functional change. llvm-svn: 210479
* R600/SI: Rename VOP3 helper class to be more generalMatt Arsenault2014-06-092-4/+4
| | | | | | It has other uses besides shift instructions. llvm-svn: 210478
* [X86] Add target combine rules for horizontal add/sub.Andrea Di Biagio2014-06-093-0/+482
| | | | | | | | | | | | | | | | | | | | This patch adds new target specific combine rules to identify horizontal add/sub idioms from BUILD_VECTOR dag nodes. This patch also teaches the DAGCombiner how to canonicalize sequences of insert_vector_elt dag nodes according to the following rule: (insert_vector_elt (insert_vector_elt A, I0), I1) -> (insert_vecto_elt (insert_vector_elt A, I1), I0) This new canonicalization rule only triggers if the inner insert_vector dag node has exactly one use; also, both indices must be known constants, and I1 < I0. This last rule made it possible to write a simpler algorithm to identify horizontal add/sub patterns because now we don't have to worry about the ordering of insert_vector_elt dag nodes. llvm-svn: 210477
* R600/SI: Keep 64-bit not on SALUMatt Arsenault2014-06-095-11/+110
| | | | llvm-svn: 210476
* R600: Fix selection failure for vector bswapMatt Arsenault2014-06-092-0/+51
| | | | llvm-svn: 210475
* [PPC64LE] Generate correct little-endian code for v16i8 multiplyBill Schmidt2014-06-092-4/+33
| | | | | | | | | | | | | | | | The existing code in PPCTargetLowering::LowerMUL() for multiplying two v16i8 values assumes that vector elements are numbered in big-endian order. For little-endian targets, the vector element numbering is reversed, but the vmuleub, vmuloub, and vperm instructions still assume big-endian numbering. To account for this, we must adjust the permute control vector and reverse the order of the input registers on the vperm instruction. The existing test/CodeGen/PowerPC/vec_mul.ll is updated to be executed on powerpc64 and powerpc64le targets as well as the original powerpc (32-bit) target. llvm-svn: 210474
* Fix test in r210472.Evgeniy Stepanov2014-06-091-1/+1
| | | | llvm-svn: 210473
* [msan] Workaround for invalid origins in shufflevector.Evgeniy Stepanov2014-06-092-4/+27
| | | | | | | | | Makes origin propagation ignore literal undef operands, and, in general, any operand we don't have origin for. https://code.google.com/p/memory-sanitizer/issues/detail?id=56 llvm-svn: 210472
* llvm/test/CodeGen/X86/2014-05-29-factorial.ll: Relax an expression to match ↵NAKAMURA Takumi2014-06-091-2/+2
| | | | | | Win32 x64. llvm-svn: 210471
* [mips] Fix a bug for NaCl target - Don't report the error when non-dangerousSasa Stankovic2014-06-092-7/+40
| | | | | | | | load/store is in branch delay slot. Differential Revision: http://llvm-reviews.chandlerc.com/D4048 llvm-svn: 210470
* [X86] Avoid emitting unnecessary test instructions.Andrea Di Biagio2014-06-092-2/+43
| | | | | | | | | | | | | This patch teaches the backend how to check for the 'NoSignedWrap' flag on binary operations to improve the emission of 'test' instructions. If the result of a binary operation is known not to overflow we know that resetting the Overflow flag is unnecessary and so we can avoid emitting the test instruction. Patch by Marcello Maggioni. llvm-svn: 210468
* [DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact flags to SelectionDAG.Andrea Di Biagio2014-06-097-26/+192
| | | | | | | | | | | | | This patch modifies SelectionDAGBuilder to construct SDNodes with associated NoSignedWrap, NoUnsignedWrap and Exact flags coming from IR BinaryOperator instructions. Added a new SDNode type called 'BinaryWithFlagsSDNode' to allow accessing nsw/nuw/exact flags during codegen. Patch by Marcello Maggioni. llvm-svn: 210467
* [X86] Use ADD/SUB instead of INC/DEC for SilvermontAlexey Volkov2014-06-096-15/+37
| | | | | | | | | | | | According to Intel Software Optimization Manual on Silvermont INC or DEC instructions require an additional uop to merge the flags. As a result, a branch instruction depending on an INC or a DEC instruction incurs a 1 cycle penalty. Differential Revision: http://reviews.llvm.org/D3990 llvm-svn: 210466
* [AArch64] Missing aliases for CMP/CMN [W]SP with no shiftArtyom Skrobov2014-06-093-4/+12
| | | | llvm-svn: 210464
* [docs] Fix typo, align comments, fix syntax highlightingJeroen Ketema2014-06-091-17/+17
| | | | llvm-svn: 210462
* [mips][mips64r6] Add LDPC instructionZoran Jovanovic2014-06-0910-6/+64
| | | | | | Differential Revision: http://reviews.llvm.org/D3822 llvm-svn: 210460
* Fix line numbers for code inlined from __nodebug__ functions.Evgeniy Stepanov2014-06-092-1/+76
| | | | | | | | | | | | | | Instructions from __nodebug__ functions don't have file:line information even when inlined into no-nodebug functions. As a result, intrinsics (SSE and other) from <*intrin.h> clang headers _never_ have file:line information. With this change, an instruction without !dbg metadata gets one from the call instruction when inlined. Fixes PR19001. llvm-svn: 210459
* [msan] Fix vector pack intrinsic handling.Evgeniy Stepanov2014-06-092-9/+95
| | | | | | | | | This fixes a crash on MMX intrinsics, as well as a corner case in handling of all unsigned pack intrinsics. PR19953. llvm-svn: 210454
* R600: Add more and testcasesMatt Arsenault2014-06-091-18/+88
| | | | llvm-svn: 210453
* Fix gcc warning (enumeral and non-enumeral type in conditional expression)Patrik Hagglund2014-06-091-1/+2
| | | | llvm-svn: 210450
* [AArch64] Fix the ordering of the accumulate operand in SchedRW list.Chad Rosier2014-06-092-6/+7
| | | | | | | Patch by Dave Estes <cestes@codeaurora.org> http://reviews.llvm.org/D4037 llvm-svn: 210446
* [AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shiftChad Rosier2014-06-092-9/+17
| | | | | | | plus add. The shift can be folded into the add. This only effects codegen when the constant is 3. llvm-svn: 210445
* [SeparateConstOffsetFromGEP] inbounds zext => sext for better splittingJingyue Wu2014-06-083-4/+128
| | | | | | | | | | For each array index that is in the form of zext(a), convert it to sext(a) if we can prove zext(a) <= max signed value of typeof(a). The conversion helps to split zext(x + y) into sext(x) + sext(y). Reviewed in http://reviews.llvm.org/D4060 llvm-svn: 210444
* Escape "@function" with \verbatim. [-Wdocumentation]NAKAMURA Takumi2014-06-081-0/+2
| | | | llvm-svn: 210443
* [C++11] Use 'nullptr'.Craig Topper2014-06-0859-300/+309
| | | | llvm-svn: 210442
* [SeparateConstOffsetFromGEP] Fix an illegitimate optimization on zextJingyue Wu2014-06-081-2/+2
| | | | | | | | | | zext(a + b) != zext(a) + zext(b) even if a + b >= 0 && b >= 0. e.g., a = i4 0b1111, b = i4 0b0001 zext a + b to i8 = zext 0b0000 to i8 = 0b00000000 (zext a to i8) + (zext b to i8) = 0b00001111 + 0b00000001 = 0b00010000 llvm-svn: 210439
* Refactor canonicalizing array indices to a helper functionJingyue Wu2014-06-081-32/+51
| | | | | | No functionality changes. llvm-svn: 210438
* [SeparateConstOffsetFromGEP] make two tests more strictJingyue Wu2014-06-081-4/+4
| | | | | | | inbounds are not necessary in these two tests. zext(a +nuw b) = zext(a) + zext(b) should hold with or without inbounds. llvm-svn: 210437
* SmallVector: Improve test coverage for insert with repetitionDavid Blaikie2014-06-081-22/+18
| | | | | | | | | | | | | To test cases that involve actual repetition (> 1 elements), at least one element before the insertion point, and some elements of the original range that still fit in that range space after insertion. Actually we need coverage for the inverse case too (where no elements after the insertion point fit into the previously allocated space), but this'll do for now, and I might end up rewriting bits of SmallVector to avoid that special case anyway. llvm-svn: 210436
* ScalarEvolution: Derive element size from the type of the loaded elementTobias Grosser2014-06-082-2/+12
| | | | | | | | | | Before, we where looking at the size of the pointer type that specifies the location from which to load the element. This did not make any sense at all. This change fixes a bug in the delinearization where we failed to delinerize certain load instructions. llvm-svn: 210435
* SmallVector: More movable improvements - don't copy elements to make space ↵David Blaikie2014-06-082-14/+88
| | | | | | | | when inserting repeated elements. Also split and improve tests a bit. llvm-svn: 210433
* SmallVector: Move, don't copy, elements to make space for an insertion.David Blaikie2014-06-082-1/+40
| | | | llvm-svn: 210432
* X86: simplify data layout calculationSaleem Abdulrasool2014-06-081-3/+2
| | | | | | | | X86Subtarget::isTargetCygMing || X86Subtarget::isTargetKnownWindowsMSVC is equivalent to all Windows environments. Simplify the check to isOSWindows. NFC. llvm-svn: 210431
* SmallVectorTest: Remove some more robust checks added in r210429 since they ↵David Blaikie2014-06-081-6/+0
| | | | | | | | | | | caught some bugs I haven't fixed yet. Specifically this caused inserting an element from a SmallVector into itself when such an insertion would cause a reallocation. We have code to handle this for non-reallocating cases, but it's not robust against reallocation. llvm-svn: 210430
* Fix some more moving-from-moved-from objects issues in SmallVectorDavid Blaikie2014-06-082-2/+20
| | | | | | | | (& because it makes it easier to test, this also improves correctness/performance slightly by moving the last element in an insert operation, rather than copying it) llvm-svn: 210429
* APFloat: x - NaN needs to flip the signbit of NaN when x is a number.Stephen Canon2014-06-082-25/+27
| | | | | | Because we don't have a separate negate( ) function, 0 - NaN does double-duty as the IEEE-754 negate( ) operation, which (unlike most FP ops) *does* attach semantic meaning to the signbit of NaN. llvm-svn: 210428
* AsmMatchers: Use unique_ptr to manage ownership of MCParsedAsmOperandDavid Blaikie2014-06-0813-1119/+982
| | | | | | | | | | | | I saw at least a memory leak or two from inspection (on probably untested error paths) and r206991, which was the original inspiration for this change. I ran this idea by Jim Grosbach a few weeks ago & he was OK with it. Since it's a basically mechanical patch that seemed sufficient - usual post-commit review, revert, etc, as needed. llvm-svn: 210427
* Ensure SmallVector::insert doesn't overwrite the last element in the range ↵David Blaikie2014-06-082-1/+23
| | | | | | | | | | | | | | with the already-moved-from value This would cause the last element in a range to be in a moved-from state after an insert at a non-end position, losing that value entirely in the process. Side note: move_backward is subtle. It copies [A, B) to C-1 and down. (the fact that it decrements both the second and third iterators before the first movement is the subtle part... kind of surprising, anyway) llvm-svn: 210426
* Revert "Do materialize for floating point"Alp Toker2014-06-082-62/+2
| | | | | | | | | | | | | | | | | | | | | | | 1) The commit was made despite profound lack of understanding: "I did not understand the comment about using dyn_cast instead of isa. I will commit as is and make the update after. You can explain what you meant to me." Commit first, understand later isn't OK. 2) Review comments were simply ignored: "Can you edit the summary to describe what the patch is for? It appears to be a list of commits at the moment." 3) The patch got LGTM'd off-list without any indication of readiness. 4) The public mailing list was excluded from patch review so all of this was hidden from the community. This reverts commit r210414. llvm-svn: 210424
* Remove outdated CMake MSVC workaroundAlp Toker2014-06-081-7/+1
| | | | llvm-svn: 210421
* Remove redundant typedef from MCAsmParserSemaCallbackAlp Toker2014-06-081-2/+0
| | | | | | The last use has been removed in clang r210418. llvm-svn: 210419
* Make InlineAsmIdentifierInfo forward-declarableAlp Toker2014-06-081-16/+16
| | | | | | This helps localize header inclusion in the frontend. llvm-svn: 210417
* MC: fix text section characteristics for WoASaleem Abdulrasool2014-06-082-0/+33
| | | | | | | | | | link.exe requires that the text section has the IMAGE_SCN_MEM_16BIT flag set. Otherwise, it will treat the function as ARM. If this occurs, then jumps to the function will fail, switching from thumb to ARM mode execution. With this change, it is possible to link using the MSVC linker as well. llvm-svn: 210415
* Do materialize for floating pointReed Kotler2014-06-082-2/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: start to do simple constants finish simplestore add test case format Merge branch 'master' into 1756_8 Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel Merge branch 'master' into 1756_8 Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel in progress finish integer materialize test cases test cases in progress Finish up fast-isel materialize for ints. Finish materialize for ints test cases simplestorei.ll Merge branch 'master' into 1756_8 fix fp constants for fast-isel Merge branch '1758_1' of dmz-portal.mips.com:llvm into 1758_1 in progress lastest for fp materialization clean up Merge branch 'master' into 1758_1 formatting add test case finish test case Merge branch 'master' into 1758_2 Test Plan: simplestore.ll simplestore.ll Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3659 llvm-svn: 210414
* start to clean up buildMI calls in mips fast-iselReed Kotler2014-06-081-26/+24
| | | | | | | | | | | | | | | | | Summary: Merge branch 'master' into 1758_6 Test Plan: No functionality change. Run "make check" and run test-suite. Because our servers are not yet running again I have not yet run test-suite. I will further review myself before submission. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3819 llvm-svn: 210413
* Re-enable ARM ELF testsAlp Toker2014-06-081-3/+3
| | | | | | r210408 inadvertently disabled them when X86 is not selected. llvm-svn: 210412
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