| Commit message (Collapse) | Author | Age | Files | Lines |
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It's simple: Don't treat <undef> operands as uses, and don't assume a
virtual register has a defining instruction unless a real use has been
seen.
llvm-svn: 159061
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llvm-svn: 159058
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There are patterns to handle immediates when they fit in the immediate field.
e.g. %sub = add i32 %x, -123
=> sub r0, r0, #123
Add patterns to catch immediates that do not fit but should be materialized
with a single movw instruction rather than movw + movt pair.
e.g. %sub = add i32 %x, -65535
=> movw r1, #65535
sub r0, r0, r1
rdar://11726136
llvm-svn: 159057
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llvm-svn: 159055
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As an example of how the custom DiagnosticType can be used to provide
better operand-mismatch diagnostics, add a custom diagnostic for
the imm0_15 operand class used for several system instructions.
Update the tests to expect the improved diagnostic.
rdar://8987109
llvm-svn: 159051
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"Invalid operand" may be a completely correct diagnostic, but it's often
insufficiently specific to really help identify and fix the problem in
assembly source. Allow a target to specify a more-specific diagnostic kind
for each AsmOperandClass derived definition and use that to provide
more detailed diagnostics when an operant of that class resulted in a
match failure.
rdar://8987109
llvm-svn: 159050
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The isel (integer select) instruction is supported on the 440 and A2
embedded cores and on the POWER7.
llvm-svn: 159045
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llvm-svn: 159044
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llvm-svn: 159042
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The ProcessImplicitDefs class can be local to its implementation file.
llvm-svn: 159041
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llvm-svn: 159039
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llvm-svn: 159035
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llvm-svn: 159030
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It is both smaller and faster than DenseMap.
llvm-svn: 159029
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llvm-svn: 159028
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Original commit message:
Allow up to 64 functional units per processor itinerary.
This patch changes the type used to hold the FU bitset from unsigned to uint64_t.
This will be needed for some upcoming PowerPC itineraries.
llvm-svn: 159027
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zero-filled global. rdar://11729134
llvm-svn: 159023
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Don't try to print out the live range of a physreg.
llvm-svn: 159021
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DBG_VALUE instructions could be referring to non-existing virtual
registers.
llvm-svn: 159020
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There is no need to check for physreg live ranges. They don't exist any
more.
llvm-svn: 159019
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Everyone is using on-demand regunit ranges now.
llvm-svn: 159018
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llvm-svn: 159017
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These functions only operate on virtual registers now, and they all have
live ranges.
llvm-svn: 159015
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llvm-svn: 159014
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Don't depend on LiveIntervals::hasInterval() to determine if a physreg
is reserved and constant.
llvm-svn: 159013
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llvm-svn: 159011
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This should produce the same results as using physreg liveness directly.
llvm-svn: 159009
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With regunit liveness permanently enabled, this function would always
return true.
Also remove now obsolete code for checking physreg interference.
llvm-svn: 159006
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This fixes PR5997.
These transforms were disabled because codegen couldn't deal with other
uses of trunc(x). This is now handled by the peephole pass.
This causes no regressions on x86-64.
llvm-svn: 159003
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llvm-svn: 159000
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llvm-svn: 158999
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Original message:
Performance optimizations:
- SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges.
- Optimized IntItem, added APInt value caching.
- Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only.
llvm-svn: 158997
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possibly due to r158939.
llvm-svn: 158994
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knows dwarf or not.
llvm-svn: 158993
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DwarfUsesRelocationsAcrossSections.
llvm-svn: 158992
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fail. Original commit message:
Performance optimizations:
- SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges.
- Optimized IntItem, added APInt value caching.
- Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only.
On my machine these optimizations gave about 4-6% of compile-time improvement.
llvm-svn: 158986
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- SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges.
- Optimized IntItem, added APInt value caching.
- Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only.
On my machine these optimizations gave about 4-6% of compile-time improvement.
llvm-svn: 158979
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This makes it explicit when ScoreboardHazardRecognizer will be used.
"GenericItineraries" would only make sense if it contained real
itinerary values and still required ScoreboardHazardRecognizer.
llvm-svn: 158963
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The code in X86TargetLowering::LowerEH_RETURN() assumes that a frame
pointer exists, but the frame pointer was forced by the presence of
llvm.eh.unwind.init which isn't guaranteed.
If llvm.eh.unwind.init is actually required in functions calling
eh.return (is it?), we should diagnose that instead of emitting bad
machine code.
This should fix the dragonegg-x86_64-linux-gcc-4.6-test bot.
llvm-svn: 158961
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This is a minor drive-by fix with no robust way to unit test.
As an example see neon-div.ll:
SU(16): %Q8<def> = VMOVLsv4i32 %D17, pred:14, pred:%noreg, %Q8<imp-use,kill>
val SU(1): Latency=2 Reg=%Q8
...should be latency=1
llvm-svn: 158960
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Minor drive by fix to cleanup latency computation. Calling
getOperandLatency with a deliberately incorrect operand index does not
give you the latency you want.
llvm-svn: 158959
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a recommit of r127757. Fixes PR9493. Patch by Paul Robinson!
llvm-svn: 158957
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boolean flag to an enum: { Fast, Standard, Strict } (default = Standard).
This option controls the creation by optimizations of fused FP ops that store
intermediate results in higher precision than IEEE allows (E.g. FMAs). The
behavior of this option is intended to match the behaviour specified by a
soon-to-be-introduced frontend flag: '-ffuse-fp-ops'.
Fast mode - allows formation of fused FP ops whenever they're profitable.
Standard mode - allow fusion only for 'blessed' FP ops. At present the only
blessed op is the fmuladd intrinsic. In the future more blessed ops may be
added.
Strict mode - allow fusion only if/when it can be proven that the excess
precision won't effect the result.
Note: This option only controls formation of fused ops by the optimizers. Fused
operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic)
will always be honored, regardless of the value of this option.
Internally TargetOptions::AllowExcessFPPrecision has been replaced by
TargetOptions::AllowFPOpFusion.
llvm-svn: 158956
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The existing contraction patterns are replaced with fma/fneg.
Overall functionality should be the same.
llvm-svn: 158955
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sorry for the churn :S enough for today; going to sleep.
llvm-svn: 158953
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user. Update GlobalOpt accordingly.
llvm-svn: 158952
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functionality to SimplifyCFG (since we cannot make changes to the CFG here).
Fixes the crashes with the attached test case
llvm-svn: 158951
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llvm-svn: 158947
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rdar://11721329
llvm-svn: 158946
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llvm-svn: 158943
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