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* Linker: Copy metadata when linking declarations.Peter Collingbourne2016-06-244-4/+36
| | | | | | Differential Revision: http://reviews.llvm.org/D21624 llvm-svn: 273692
* [codeview] Use one byte for S_FRAMECOOKIE CookieKind and add flags byteReid Kleckner2016-06-245-5/+7
| | | | | | | | | | We bailed out while printing codeview for an MSVC compiled SemaExprCXX.cpp that used this record. The MS reference headers look incorrect here, which is probably why we had this bug. They use a 32-bit enum as the field type, but the actual record appears to use one byte for the cookie kind followed by a flags byte. llvm-svn: 273691
* [MDT] Always verify machine dominfo if expensive checking is enabled.Chad Rosier2016-06-241-2/+2
| | | | llvm-svn: 273690
* [codeview] Emit base class information from DW_TAG_inheritance nodesReid Kleckner2016-06-244-25/+391
| | | | | | | | | | | | | | | | There are two remaining issues here: 1. No vbptr information 2. Need to mention indirect virtual bases Getting indirect virtual bases is just a matter of adding an "indirect" flag, emitting them in the frontend, and ignoring them when appropriate for DWARF. All virtual bases use the same artificial vbptr field, so I think the vbptr offset will be best represented by an implicit __vbptr$ClassName member similar to our existing __vptr$ member. llvm-svn: 273688
* [LV] Preserve order of dependences in interleaved accesses analysisMatthew Simpson2016-06-242-54/+510
| | | | | | | | | | | | | | | | | | | | | | | | | | The interleaved access analysis currently assumes that the inserted run-time pointer aliasing checks ensure the absence of dependences that would prevent its instruction reordering. However, this is not the case. Issues can arise from how code generation is performed for interleaved groups. For a load group, all loads in the group are essentially moved to the location of the first load in program order, and for a store group, all stores in the group are moved to the location of the last store. For groups having members involved in a dependence relation with any other instruction in the loop, this reordering can violate the dependence. This patch teaches the interleaved access analysis how to avoid breaking such dependences, and should fix PR27626. An assumption of the original analysis was that the accesses had been collected in "program order". The analysis was then simplified by visiting the accesses bottom-up. However, this ordering was never guaranteed for anything other than single basic block loops. Thus, this patch also enforces the desired ordering. Reference: https://llvm.org/bugs/show_bug.cgi?id=27626 Differential Revision: http://reviews.llvm.org/D19984 llvm-svn: 273687
* Remangle intrinsics names when types are renamedArtur Pilipenko2016-06-248-2/+169
| | | | | | | | | | | | | This is a resubmittion of previously reverted rL273568. This is a fix for the problem mentioned in "LTO and intrinsics mangling" llvm-dev mail thread: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098387.html Reviewers: mehdi_amini, reames Differential Revision: http://reviews.llvm.org/D19373 llvm-svn: 273686
* NFC. Move verifyIntrinsicIsVarArg from verifier to ↵Artur Pilipenko2016-06-243-30/+28
| | | | | | Intrinsic::matchIntrinsicVarArg since it will be reused for intrinsic remangling code llvm-svn: 273685
* ExecutionEngine: silence unused value warningSaleem Abdulrasool2016-06-241-0/+3
| | | | | | | The Value is only used in debug or asserts builds. Just cast to void to silence an unused variable warning. llvm-svn: 273684
* ExecutionEngine: add preliminary support for COFF ARMSaleem Abdulrasool2016-06-243-5/+401
| | | | | | | | | This adds rudimentary support for COFF ARM to the dynamic loader for the exeuction engine. This can be used by lldb to JIT code into a COFF ARM environment. This lays the foundation for the loader, though a few of the relocation types are yet unhandled. llvm-svn: 273682
* Make sure Format is always initialized.Rafael Espindola2016-06-241-0/+5
| | | | | | Should fix the msan bots. llvm-svn: 273679
* [MachineDominatorTree] Add a MDT verifier.Chad Rosier2016-06-243-1/+54
| | | | | | Differential Revision: http://reviews.llvm.org/D21657 llvm-svn: 273678
* Use existing predicate. NFC.Rafael Espindola2016-06-241-5/+1
| | | | | | This doesn't handle ELF, but neither did the previous code. llvm-svn: 273677
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-14/+11
| | | | llvm-svn: 273674
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-11/+3
| | | | llvm-svn: 273673
* clang-format a region. NFC.Rafael Espindola2016-06-241-4/+4
| | | | llvm-svn: 273672
* [LICM] Avoid repeating expensive call while promoting loads. NFCAnna Thomas2016-06-241-3/+4
| | | | | | | | | | | | | | | Summary: We can avoid repeating the check `isGuaranteedToExecute` when it's already called once while checking if the alignment can be widened for the load/store being hoisted. The function is invariant for the same instruction `UI` in `isGuaranteedToExecute(*UI, DT, CurLoop, SafetyInfo);` Reviewers: hfinkel, eli.friedman Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21672 llvm-svn: 273671
* Revert r273664Hubert Tong2016-06-241-44/+0
| | | | | | Revert change until build issues with MSVC can be resolved. llvm-svn: 273670
* [mips] Use --check-prefixes where appropriate. NFC.Daniel Sanders2016-06-24105-982/+839
| | | | llvm-svn: 273669
* Add FixedSizeStorage to TrailingObjects; NFCHubert Tong2016-06-241-0/+44
| | | | | | | | | | | | Summary: This change introduces two types, `FixedSizeStorage` and `FixedSizeStorageOwner`, which can be used to provide stack-allocated objects with trailing objects. Reviewers: rsmith, faisalv, aaron.ballman Subscribers: llvm-commits, cfe-commits, nwilson Differential Revision: http://reviews.llvm.org/D19770 llvm-svn: 273664
* Revert "Revert "[misched] Extend scheduler to handle unsupported features""Simon Dardis2016-06-243-1/+53
| | | | | | | | This reverts commit r273565. This was an over-eager revert. llvm-svn: 273658
* AMDGPU: Add stub custom CodeGenPrepare passMatt Arsenault2016-06-245-0/+96
| | | | | | | | This will do various things including ones CodeGenPrepare does, but with knowledge of uniform values. llvm-svn: 273657
* Remove hack introduced by r273641.George Burgess IV2016-06-241-2/+0
| | | | | | Hopefully the buildbots have had enough time to pick this up by now. llvm-svn: 273656
* AMDGPU: Un-xfail and add testsMatt Arsenault2016-06-248-35/+386
| | | | | | | | Un XFAIL a few tests plus a few more I had lying around in my tree, which seem to all work now but I don't see tests that quite test the same things. llvm-svn: 273655
* AMDGPU: Remove disable-irstructurizer subtarget featureMatt Arsenault2016-06-246-16/+9
| | | | | | | | The only real reason to use it is for testing, so replace it with a command line option instead of a potentially function dependent feature. llvm-svn: 273653
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-2458-706/+879
| | | | | | | | | Split AMDGPUSubtarget into amdgcn/r600 specific subclasses. This removes most of the static_casting of the basic codegen classes everywhere, and tries to restrict the features visible on the wrong target. llvm-svn: 273652
* Use the same underlying type for bitfieldsDavid Majnemer2016-06-243-3/+3
| | | | | | | MSVC allocates fresh storage for consecutive bitfields with different underlying types. llvm-svn: 273645
* Switch more loops to be range-basedDavid Majnemer2016-06-2414-68/+52
| | | | | | | This makes the code a little more concise, no functional change is intended. llvm-svn: 273644
* [X86] Combine two nearby calls to isSingleInputShuffleVector. NFCCraig Topper2016-06-241-6/+4
| | | | llvm-svn: 273643
* [llvm-cov] Fix two warningsVedant Kumar2016-06-242-5/+16
| | | | | | | | | They were using output streams inconsistently. One also had a grammar bug. I noticed these while trying to pare down D18278. llvm-svn: 273642
* Temporary hack to clean a file from buildbots.George Burgess IV2016-06-241-1/+3
| | | | | | | | | Some buildbots are complaining about a .s file under test/ that was inadvertently created by a test earlier today, and is still hanging around. I'll undo this change in ~1hr (or whenever the bots are done getting rid of said file). llvm-svn: 273641
* Teaching SimplifyCFG to recognize the Or-Mask trick that InstCombine uses toChuang-Yu Cheng2016-06-242-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | reduce the number of comparisons. Specifically, InstCombine can turn: (i == 5334 || i == 5335) into: ((i | 1) == 5335) SimplifyCFG was already able to detect the pattern: (i == 5334 || i == 5335) to: ((i & -2) == 5334) This patch supersedes D21315 and resolves PR27555 (https://llvm.org/bugs/show_bug.cgi?id=27555). Thanks to David and Chandler for the suggestions! Author: Thomas Jablin (tjablin) Reviewers: majnemer chandlerc halfdan cycheng http://reviews.llvm.org/D21397 llvm-svn: 273639
* BitcodeWriter: Remove redundant (and incorrect) check for whether to emit ↵Peter Collingbourne2016-06-242-3/+5
| | | | | | | | | | | | | | | module summary. The function name Module::empty() is slightly misleading in that it only tests for the presence of functions in the module. However we still want to emit the module summary if the module contains only global variables or aliases. The presence of such entities can be determined simply by checking the summary directly, as we are doing below. Differential Revision: http://reviews.llvm.org/D21669 llvm-svn: 273638
* Attempt to fix MSVC breakage caused by r273636.George Burgess IV2016-06-241-9/+13
| | | | | | Apparently earlier versions of MSVC don't have constexpr bitset ctors. llvm-svn: 273637
* [CFLAA] Propagate StratifiedAttrs in interproc. analysis.George Burgess IV2016-06-247-62/+235
| | | | | | | | | | | | | | | | | This patch also has a refactor that kills StratifiedAttr, and leaves us with StratifiedAttrs, because having both was mildly redundant. This patch makes us correctly handle stratified attributes when doing interprocedural analysis. It also adds another attribute, AttrCaller, which acts like AttrUnknown. We can filter out AttrCaller values when during interprocedural analysis, since the caller should have information about what arguments it's passing to its callee. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21645 llvm-svn: 273636
* [llvm-cov] Use getOptions() instead of Options in SourceCoverageView, NFCVedant Kumar2016-06-241-14/+16
| | | | | | | A lot of this code is going to move into the text-based coverage renderer, and won't be able to use Options directly. Use the getter. llvm-svn: 273635
* [llvm-cov] Add SourceNames to SourceCoverageViews, NFCVedant Kumar2016-06-243-16/+37
| | | | | | | | | | | | | A SourceName can be a file or a function. It makes sense to attach this information to a SourceCoverageView, seeing as views (1) already point to the text corresponding to the relevant source code and (2) are already used to render that text along with the SourceNames. This is a nice cleanup which is independent of the upcoming html patch. While we're at it, document the fields in SourceCoverageView. llvm-svn: 273634
* [llvm-cov] Rename SourceCoverageView::LineCoverageInfo to LineCoverageStats, NFCVedant Kumar2016-06-242-25/+25
| | | | | | | | | | | | Pull LineCoverageInfo out of SourceCoverageView and rename it so that it doesn't conflict with another class of the same name in CoverageSummaryInfo.h. This cuts down on the amount of code we have to move into a `protected` section of SourceCoverageView for the upcoming html patch. It also makes the code a bit clearer: having two LineCoverageInfo's is strange. llvm-svn: 273633
* [ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.Ahmed Bougacha2016-06-242-11/+22
| | | | | | | r215348 overrode the f16 libcalls to be soft-float, but v7k uses the default (hard-float) calling convention. llvm-svn: 273631
* [AArch64] Model the cost of vector by element FP multiplies on Exynos M1. (NFC)Evandro Menezes2016-06-231-0/+6
| | | | llvm-svn: 273630
* Support/ELF: Add R_AMDGPU_GOTPCREL relocationTom Stellard2016-06-234-0/+16
| | | | | | | | | | | | | Summary: We will start generating this in a future patch. Reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D21482 llvm-svn: 273628
* [MachOYAML] Use a temporary to avoid gcc strict-aliasing warningChris Bieneman2016-06-231-2/+4
| | | | | | GCC complains about this with -Wstrict-aliasing. Using a temporary here should prevent the warning. llvm-svn: 273627
* [codeview] Add classes and unions to the Local/Global UDTs listsHans Wennborg2016-06-233-33/+110
| | | | | | Differential Revision: http://reviews.llvm.org/D21655 llvm-svn: 273626
* [LCG] Make the name of an SCC include more of the functions in it.Chandler Carruth2016-06-231-1/+17
| | | | | | | | | | This makes it much easier to debug issues when the logging contains the name of the SCC. It requires to create a temporary string, but for logging and debugging uses that seems fine. I've added logic to try to output all the function names with an elipsis if there are too many. This was helpful fro me in debugging issues with the new pass manager. llvm-svn: 273625
* [yaml2macho] Removing asserts in favor of explicit yaml parse errorChris Bieneman2016-06-234-6/+20
| | | | | | | | | | | | 32-bit Mach headers don't have reserved fields. When generating the mapping for 32-bit headers leaving off the reserved field will result in parse errors if the field is present in the yaml. Added a CHECK-NOT line to ensure that mach_header.yaml isn't adding a reserved field, and a test to ensure that the parser error gets hit with 32-bit headers. llvm-svn: 273623
* [CMake] Add LLVM runtimes directoryChris Bieneman2016-06-234-11/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There are a few LLVM projects that produce runtime libraries. Ideally runtime libraries should be built differently than other projects, specifically they should be built using the just-built toolchain. There is support for building compiler-rt in this way from the clang build. Moving this logic into the LLVM build is interesting because it provides a simpler way to extend the just-built toolchain to include LLD and the LLVM object file tools. Once this functionality is better fleshed out and tested we’ll want to encapsulate it in a module that can be used for clang standalone builds, and we’ll want to make it the default way to build compiler-rt. With this patch applied there is no immediate change in the build. Moving compiler-rt out from llvm/projects into llvm/runtimes enables the functionality. This code has a few improvements over the method provided by LLVM_BUILD_EXTERNAL_COMPILER_RT. Specifically the sub-ninja command is always invoked, so changes to compiler-rt source files will get built properly, so this patch can be used for iterative development with just-built tools. This first patch only works with compiler-rt. Support for other runtime projects will be coming in follow-up patches. Reviewers: chandlerc, bogner Subscribers: kubabrecka, llvm-commits Differential Revision: http://reviews.llvm.org/D20992 llvm-svn: 273620
* MachineScheduler: Followup to debug message changesMatthias Braun2016-06-231-1/+0
| | | | | | | Do not dump intermediate state of the pending queue anymore now that we always dump the final state before picking. llvm-svn: 273618
* Codegen: [X86] preservere memory refs for folded umul_lohiKyle Butt2016-06-232-3/+42
| | | | | | | | | Memory references were not being propagated for this folded load. This prevented optimizations like LICM from hoisting the load. Added test to verify that this allows LICM to proceed. llvm-svn: 273617
* Codegen: LICM Remove check for exactly 1 register def.Kyle Butt2016-06-233-23/+43
| | | | | | | | | | | | | | | | | | When considering whether to split an instruction with a memory operand into an explicit load and a register-based instruction, we currently check that the resulting instruction has exactly 1 def. This prevents 2 important LICM optimizations: compares with memory operands, and double indirect calls. All the tests and the test-suite pass without the check. My guess as to original intent is to limit the additional register pressure created by the new instruction, but given that we only split out a single register, it is already limited. The licm-dominance test now checks actual memory loads for hoisting instead of undef, and it tests compares. hoist-invariant-load.ll now checks for 2 hoists, the intended hoist, and a bonus from calling a got-relative function in a loop. llvm-svn: 273616
* MachineScheduler: Improve debug messagesMatthias Braun2016-06-231-7/+7
| | | | | | | Consistenly display available and pending queues immediately before the scheduling choice is done. llvm-svn: 273615
* Uses shouldAssumeDSOLocal.Rafael Espindola2016-06-232-10/+15
| | | | | | With that SystemZ knows to avoid a GOT for PIE. llvm-svn: 273614
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