| Commit message (Collapse) | Author | Age | Files | Lines |
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limited to functions any more
llvm-svn: 162566
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modules. Patch by Reid Watson.
llvm-svn: 162565
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In collaboration with Adhemerval Zanella.
llvm-svn: 162562
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No intended behavior change. This was introduced in r162023. With the fixed
algorithm a Release build of ARMInstPrinter.cpp goes from 16s to 10s on a
2011 MBP.
llvm-svn: 162559
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llvm-svn: 162558
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llvm-svn: 162557
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llvm-svn: 162556
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MSVC doesn't support passing by-value parameters with alignment of
16-bytes or higher apparantly. What is deeply confusing is that it seems
to *sometimes* (but not always) apply this to any type whose alignment
is set using __declspec(align(...)). This caused lots of errors when we switch
SmallVector over to use the automatically aligned character array
utilities as they used __declspec(align(...)) heavily.
As a pretty horrible but effective work-around, we instead cherry pick
the smallest alignment sizes with specific types that happen to have the
correct alignment, and then fall back to the attribute solution past
them. This should resolve the MSVC build errors folks have been hitting.
Sorry for that. In good news, it will do this without introducing other
UB I hope. =]
Thanks to Timur Iskhodzhanov for helping me test this!
llvm-svn: 162549
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llvm-svn: 162534
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not in darwin gdb compat mode.
Fixes rdar://10975088
llvm-svn: 162526
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TODO: Fix code duplication and coding style.
llvm-svn: 162525
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llvm-svn: 162524
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llvm-svn: 162520
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to be used anyway.
llvm-svn: 162518
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They were inserted to silence TableGen's warning about
redundant properties. That warning is now gone.
llvm-svn: 162517
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Emit TableGen errors if guessInstructionProperties is 0 and
instruction properties can't be inferred from patterns.
Allow explicit instruction properties even when they can be inferred.
This patch doesn't change the TableGen output. Redundant properties
are not yet verified because the tree has errors.
llvm-svn: 162516
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llvm-svn: 162515
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llvm-svn: 162514
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hexfloat with an enormous exponent. Caught by an existing unit test + -ftrapv.
llvm-svn: 162505
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llvm-svn: 162499
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llvm-svn: 162498
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output (we're emitting a specification already and the information
isn't changing) and we're not in old gdb compat mode.
Saves 1% on the debug information for a build of llvm.
Fixes rdar://11043421
llvm-svn: 162493
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turned on and off separate from the platform if you're on darwin.
llvm-svn: 162487
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we're using the darwin old gdb compat mode for emitting dwarf.
llvm-svn: 162486
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No test case, this is a generalization of r160260.
llvm-svn: 162485
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Keep track of the set/unset state of these bits along with their
true/false values, but treat '?' as '0' for now.
llvm-svn: 162461
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Currently, TableGen just guesses instruction properties when it can't
infer them form patterns.
This adds a guessInstructionProperties flag to the instruction set
definition that will be used to disable guessing. The flag is intended
as a migration aid. It will be removed again when no more targets need
their properties guessed.
llvm-svn: 162460
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These intrinsics don't have unmodeled side effects, they are just
stores.
llvm-svn: 162459
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This should fix a -Wdocumentation warning.
llvm-svn: 162458
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llvm-svn: 162454
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llvm-svn: 162446
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llvm-svn: 162438
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with older gdbs on darwin.
rdar://10975874
llvm-svn: 162436
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llvm-svn: 162435
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rdar://10393214
llvm-svn: 162434
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llvm-svn: 162433
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llvm-svn: 162432
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change in r162404.
llvm-svn: 162431
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common function call.
llvm-svn: 162428
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llvm-svn: 162426
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llvm-svn: 162422
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llvm-svn: 162421
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The logic for recomputing latency based on a ScheduleDAG edge was
shady. This bypasses the problem by requiring the client to provide
operand indices. This ensures consistent use of the machine model's
API.
llvm-svn: 162420
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the temporary register that was used to load the immediate. Currently, it always
returns register $at, but this will change if, in the future, we decide to use
another register.
No changes in functionality.
llvm-svn: 162417
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Mips16RegisterInfo/MipsSERegisterInfo.
No changes in functionality.
llvm-svn: 162413
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llvm-svn: 162411
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When reporting an error for a defm, we would previously only report the
location of the outer defm, which is not always where the error is.
Now we also print the location of the expanded multiclass defs:
lib/Target/X86/X86InstrSSE.td:2902:12: error: foo
defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>,
^
lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass
defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
^
lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass
def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
^
llvm-svn: 162409
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The MCInst is immediately passed to the copy-constructor for local
storage, so there's no need for the parameter itself to be by-value.
llvm-svn: 162404
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llvm-svn: 162402
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llvm-svn: 162383
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