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* [PPC] Added a note to release notesEhsan Amiri2016-04-071-1/+1
| | | | | | | A draft line added to release notes for PPC, to keep a record of changes. This is just a draft and will be rewritten towards the end of release. llvm-svn: 265694
* [SystemZ] Fix build break from r265689Ulrich Weigand2016-04-071-2/+1
| | | | | | | Fix build error seen on some build bots due to: error: default label in switch which covers all enumeration values llvm-svn: 265693
* [X86]: Fix for PR27251.Kevin B. Smith2016-04-072-5/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D18850 llvm-svn: 265690
* [SystemZ] Implement conditional returnsUlrich Weigand2016-04-0779-813/+1023
| | | | | | | | | | | | | | | | | | Return is now considered a predicable instruction, and is converted to a newly-added CondReturn (which maps to BCR to %r14) instruction by the if conversion pass. Also, fused compare-and-branch transform knows about conditional returns, emitting the proper fused instructions for them. This transform triggers on a *lot* of tests, hence the huge diffstat. The changes are mostly jX to br %r14 -> bXr %r14. Author: koriakin Differential Revision: http://reviews.llvm.org/D17339 llvm-svn: 265689
* [IR/Verifier] Merge two ifs into one. NFC.Davide Italiano2016-04-071-3/+1
| | | | llvm-svn: 265688
* [GVN] Address review comments for D18662Ulrich Weigand2016-04-071-9/+10
| | | | | | | | | | | As suggested by Chandler in his review comments for D18662, this follow-on patch renames some variables in GetLoadValueForLoad and CoerceAvailableValueToLoadType to hopefully make it more obvious which variables hold value sizes and which hold load/store sizes. No functional change intended. llvm-svn: 265687
* NFC: disallow comparison of AtomicOrderingJF Bastien2016-04-071-0/+5
| | | | | | Follow-up to D18775 and related clang change. AtomicOrdering is a lattice, 'stronger' is the right thing to do, direct comparison is fraught with peril. llvm-svn: 265685
* [GVN] Fix handling of sub-byte types in big-endian modeUlrich Weigand2016-04-072-3/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | When GVN wants to re-interpret an already available value in a smaller type, it needs to right-shift the value on big-endian systems to ensure the correct bytes are accessed. The shift value is the difference of the sizes of the two types. This is correct as long as both types occupy multiples of full bytes. However, when one of them is a sub-byte type like i1, this no longer holds true: we still need to shift, but only to access the correct *byte*. Accessing bits within the byte requires no shift in either endianness; e.g. an i1 resides in the least-significant bit of its containing byte on both big- and little-endian systems. Therefore, the appropriate shift value to be used is the difference of the *storage* sizes of the two types. This is already handled correctly in one place where such a shift takes place (GetStoreValueForLoad), but is incorrect in two other places: GetLoadValueForLoad and CoerceAvailableValueToLoadType. This patch changes both places to use the storage size as well. Differential Revision: http://reviews.llvm.org/D18662 llvm-svn: 265684
* [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2Ehsan Amiri2016-04-0730-346/+172
| | | | | | | | | | | | | | http://reviews.llvm.org/D18562 A large number of testcases has been modified so they pass after this test. One testcase is deleted, because I realized even after undoing the original change that was committed with this testcase, the testcase still passes. So I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll) is an arbitrary change to keep it passing. Given the original intention of the testcase, and the fact that fixing it will require some time to change the testcase, we concluded that this quick change will be enough. llvm-svn: 265683
* AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStatesTom Stellard2016-04-074-6/+8
| | | | | | | | | | | | Summary: This makes it possible to insert nops at the end of blocks. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18549 llvm-svn: 265678
* [AMDGPU] fix readlane/readfirstlane src vgpr operand type.Valery Pykhtin2016-04-073-4/+7
| | | | | | | | | For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand). readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding). Differential Revision: http://reviews.llvm.org/D18696 llvm-svn: 265670
* Fix test/Assembler/ifunc-asm.ll test on hexagon-elf botsDmitry Polukhin2016-04-071-2/+0
| | | | | | | Temporary disable llc test, it seems that such test should be in some other directory. llvm-svn: 265669
* [GCC] Attribute ifunc support in llvmDmitry Polukhin2016-04-0724-22/+369
| | | | | | | | | | | This patch add support for GCC attribute((ifunc("resolver"))) for targets that use ELF as object file format. In general ifunc is a special kind of function alias with type @gnu_indirect_function. Patch for Clang http://reviews.llvm.org/D15524 Differential Revision: http://reviews.llvm.org/D15525 llvm-svn: 265667
* InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]NAKAMURA Takumi2016-04-071-1/+1
| | | | llvm-svn: 265657
* Make helper functions static. NFC.Benjamin Kramer2016-04-072-15/+11
| | | | llvm-svn: 265653
* fix r265645: target dependent printf formatting flags.Valery Pykhtin2016-04-071-2/+2
| | | | llvm-svn: 265649
* [CMake] Check for sys/types.h in config-ix.cmakeJeroen Ketema2016-04-071-0/+1
| | | | | | | | | `sys/types.h` has a related define in `config.h.cmake`, but was never checked for in CMake. Sync this. Differential Revision: http://reviews.llvm.org/D18825 llvm-svn: 265648
* [X86][SSE] Add support for VZEXT constant foldingSimon Pilgrim2016-04-074-6/+21
| | | | llvm-svn: 265646
* [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.Valery Pykhtin2016-04-073-0/+120
| | | | | | | | | | | | Reenable reverted r265550 with endianness issue fixed. Variables of endian-aware types such as ulittle32_t should be explicitly casted to their natural equivalent types before passing it as vararg to printf like functions (format in my case). Added lit config file depending on AMDGPU target as the testcase uses assembler. Differential revision: http://reviews.llvm.org/D16998 llvm-svn: 265645
* [BlockPlacement] Remove an unnecessary continueAmaury Sechet2016-04-071-1/+0
| | | | | | NFC. llvm-svn: 265643
* [MBP] Remove an unused function parameterAmaury Sechet2016-04-071-5/+3
| | | | | | NFC. llvm-svn: 265642
* Do some refactoring in the LLVM C API echo test to remove duplication. NFCAmaury Sechet2016-04-071-70/+85
| | | | llvm-svn: 265641
* Fix the sanitizer bootstrap error in r265547.Wei Mi2016-04-071-1/+8
| | | | | | | | | The iterators of SmallPtrSet SpillsInSubTreeMap[Child].first may be invalidated when SpillsInSubTreeMap grows. Rearrange the code to ensure the grow of SpillsInSubTreeMap only happens before getting the iterators of the SmallPtrSet. llvm-svn: 265639
* Revert "[BlockPlacement] Remove an unnecessary continue" and "[MBP] Remove ↵Amaury Sechet2016-04-071-3/+6
| | | | | | an unused function parameter" llvm-svn: 265638
* Revert "ValueMapper: Make LocalAsMetadata match function-local Values"Duncan P. N. Exon Smith2016-04-072-120/+16
| | | | | | | | | | | This reverts commit r265631, since it caused bot failures: http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/3256 http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/7272 Looks like something is depending on the old behaviour. I'll try to track it down and recommit. llvm-svn: 265637
* [X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.Ahmed Bougacha2016-04-072-39/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-apply r265450 which caused PR27245 and was reverted in r265559 because of a wrong generalization: the fetch_and_add->add_and_fetch combine only works in specific, but pretty common, cases: (icmp slt x, 0) -> (icmp sle (add x, 1), 0) (icmp sge x, 0) -> (icmp sgt (add x, 1), 0) (icmp sle x, 0) -> (icmp slt (sub x, 1), 0) (icmp sgt x, 0) -> (icmp sge (sub x, 1), 0) Original Message: We only generate LOCKed versions of add/sub when the result is unused. It often happens that the result is used, but only by a comparison. We can optimize those out by reusing EFLAGS, which lets us use the proper instructions, instead of having to fallback to LXADD. Instead of doing this as an MI peephole (as we do for the other non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite tricky later. This also makes it eventually possible to stop expanding and/or/xor if the only user is an icmp (also see D18141). This uses the LOCK ISD opcodes added by r262244. Differential Revision: http://reviews.llvm.org/D17633 llvm-svn: 265636
* [X86] Refresh and tweak EFLAGS reuse tests. NFC.Ahmed Bougacha2016-04-071-51/+82
| | | | | | The non-1 and EQ/NE tests were misguided. llvm-svn: 265635
* ValueMapper: Allow RF_IgnoreMissingLocals and RF_NullMapMissingGlobalValuesDuncan P. N. Exon Smith2016-04-073-8/+15
| | | | | | | | | Remove the assertion that disallowed the combination, since RF_IgnoreMissingLocals should have no effect on globals. As it happens, RF_NullMapMissingGlobalValues asserted in MapValue(Constant*,...), so I also changed a cast to a cast_or_null to get my test passing. llvm-svn: 265633
* ValueMapper: Make LocalAsMetadata match function-local ValuesDuncan P. N. Exon Smith2016-04-072-16/+121
| | | | | | | | | | | | | Start treating LocalAsMetadata similarly to function-local members of the Value hierarchy in MapValue and MapMetadata. - Don't memoize them. - Return nullptr if they are missing. This also cleans up ConstantAsMetadata to stop listening to the RF_IgnoreMissingLocals flag. llvm-svn: 265631
* [AArch64] Teach RegisterBankInfo about the CC register bank.Quentin Colombet2016-04-072-0/+12
| | | | | | We need to cover each register class with a register bank. llvm-svn: 265629
* IR: RF_IgnoreMissingValues => RF_IgnoreMissingLocals, NFCDuncan P. N. Exon Smith2016-04-0710-18/+45
| | | | | | | | | | | | | | | | | | | | | | | Clarify what this RemapFlag actually means. - Change the flag name to match its intended behaviour. - Clearly document that it's not supposed to affect globals. - Add a host of FIXMEs to indicate how to fix the behaviour to match the intent of the flag. RF_IgnoreMissingLocals should only affect the behaviour of RemapInstruction for function-local operands; namely, for operands of type Argument, Instruction, and BasicBlock. Currently, it is *only* passed into RemapInstruction calls (and the transitive MapValue calls that it makes). When I split Metadata from Value I didn't understand the flag, and I used it in a bunch of places for "global" metadata. This commit doesn't have any functionality change, but prepares to cleanup MapMetadata and MapValue. llvm-svn: 265628
* [AArch64] Teach RegisterBankInfo about the mapping of register classesQuentin Colombet2016-04-072-0/+50
| | | | | | on register banks. llvm-svn: 265626
* Follow-up for r265605: don't mutate vector we're iterating.Michael Zolotukhin2016-04-071-4/+6
| | | | llvm-svn: 265625
* [RegisterBankInfo] Implement a target independent version ofQuentin Colombet2016-04-071-1/+40
| | | | | | | | | | | getInstrMapping. This implementation requires that the target implemented getRegBankFromRegClass. Indeed, the implementation uses the register classes for the encoding constraints for the instructions to deduce the mapping of a value. llvm-svn: 265624
* Re-commit r265039 "[X86] Merge adjacent stack adjustments in ↵Hans Wennborg2016-04-079-31/+109
| | | | | | | | | | | | | | | | eliminateCallFramePseudoInstr (PR27140)" Third time's the charm? The previous attempt (r265345) caused ASan test failures on X86, as broken CFI caused stack traces to not work. This version of the patch makes sure not to merge with stack adjustments that have CFI, and to not add merged instructions' offests to the CFI about to be generated. This is already covered by the lit tests; I just got the expectations wrong previously. llvm-svn: 265623
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265620
* Fix a race condition in support library ThreadPool.Justin Lebar2016-04-061-1/+4
| | | | | | | | | | | | | | | By running TSAN on the ThreadPool unit tests it was discovered that the threads in the pool can pop tasks off the queue at the same time the "wait" routine is trying to check if the task queue is empty. This patch fixes this problem by checking for active threads in the waiter before checking whether the queue is empty. Patch by Jason Henline. Differential Revision: http://reviews.llvm.org/D18811 Reviewers: joker.eph, jlebar llvm-svn: 265618
* [sancov] enabling coverage edge pruning by default.Mike Aizatsky2016-04-064-13/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D18844 llvm-svn: 265615
* ValueMapper: clang-format ValueMapper.h, NFCDuncan P. N. Exon Smith2016-04-061-91/+92
| | | | | | Also remove duplicated identifiers from comments. llvm-svn: 265611
* Fix the compare-clang diff error introduced by r265547.Wei Mi2016-04-061-1/+2
| | | | | | | Use MapVector instead of DenseMap for MergeableSpillsMap so it will be iterated in determined order. llvm-svn: 265610
* [llvm-c] Add LLVMGetValueKind.Peter Zotov2016-04-063-53/+118
| | | | | | | | Patch by Nicole Mazzuca <npmazzuca@gmail.com>. Differential Revision: http://reviews.llvm.org/D18729 llvm-svn: 265608
* Thread Expected<...> up from createMachOObjectFile() to allow llvm-objdump ↵Kevin Enderby2016-04-0635-95/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to produce a real error message Produce the first specific error message for a malformed Mach-O file describing the problem instead of the generic message for object_error::parse_failed of "Invalid data was encountered while parsing the file”.  Many more good error messages will follow after this first one. This is built on Lang Hames’ great work of adding the ’Error' class for structured error handling and threading Error through MachOObjectFile construction. And making createMachOObjectFile return Expected<...> . So to to get the error to the llvm-obdump tool, I changed the stack of these methods to also return Expected<...> : object::ObjectFile::createObjectFile() object::SymbolicFile::createSymbolicFile() object::createBinary() Then finally in ParseInputMachO() in MachODump.cpp the error can be reported and the specific error message can be printed in llvm-objdump and can be seen in the existing test case for the existing malformed binary but with the updated error message. Converting these interfaces to Expected<> from ErrorOr<> does involve touching a number of places. To contain the changes for now use of errorToErrorCode() and errorOrToExpected() are used where the callers are yet to be converted. Also there some were bugs in the existing code that did not deal with the old ErrorOr<> return values. So now with Expected<> since they must be checked and the error handled, I added a TODO and a comment: “// TODO: Actually report errors helpfully” and a call something like consumeError(ObjOrErr.takeError()) so the buggy code will not crash since needed to deal with the Error. Note there is one fix also needed to lld/COFF/InputFiles.cpp that goes along with this that I will commit right after this. So expect lld not to built after this commit and before the next one. llvm-svn: 265606
* [LoopUnroll] Fix the way we update DT after complete unrolling.Michael Zolotukhin2016-04-062-10/+68
| | | | | | | | Updating dominators for exit-blocks of the unrolled loops is not enough, as shown in PR27157. The proper way is to update dominators for all dominance-children of original loop blocks. llvm-svn: 265605
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-062-0/+86
| | | | | | | | | | | | | | | | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. This was originally committed as r265573 but broke at least one windows bot. The problem with the windows bot was that it was using a copy constructor for the InstructionMappings class and could not synthesize it. Actually, the fact that this class is not copy constructable is expected and the compiler should use the move assignment constructor. Marking the problematic assignment explicitly as using the move constructor has its own problems. Indeed, with recent clang we get a warning that we may prevent the elision of the copy by the compiler. A proper fix for both compilers would be to change the API of getPossibleInstrMapping to take a InstructionMappings as input/output parameter. This does not feel natural and since GISel is not used on windows yet, I chose to workaround the problem by not compiling the problematic code on windows. llvm-svn: 265604
* NFC: make AtomicOrdering an enum classJF Bastien2016-04-0637-312/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In the context of http://wg21.link/lwg2445 C++ uses the concept of 'stronger' ordering but doesn't define it properly. This should be fixed in C++17 barring a small question that's still open. The code currently plays fast and loose with the AtomicOrdering enum. Using an enum class is one step towards tightening things. I later also want to tighten related enums, such as clang's AtomicOrderingKind (which should be shared with LLVM as a 'C++ ABI' enum). This change touches a few lines of code which can be improved later, I'd like to keep it as NFC for now as it's already quite complex. I have related changes for clang. As a follow-up I'll add: bool operator<(AtomicOrdering, AtomicOrdering) = delete; bool operator>(AtomicOrdering, AtomicOrdering) = delete; bool operator<=(AtomicOrdering, AtomicOrdering) = delete; bool operator>=(AtomicOrdering, AtomicOrdering) = delete; This is separate so that clang and LLVM changes don't need to be in sync. Reviewers: jyknight, reames Subscribers: jyknight, llvm-commits Differential Revision: http://reviews.llvm.org/D18775 llvm-svn: 265602
* [MBP] Remove an unused function parameterHaicheng Wu2016-04-061-5/+3
| | | | | | NFC. llvm-svn: 265596
* [PPC] Use VSX/FP Facility integer load when an integer load's only users are ↵Ehsan Amiri2016-04-062-1/+109
| | | | | | | | | | | conversion to FP http://reviews.llvm.org/D18405 When the integer value loaded is never used directly as integer we should use VSX or Floating Point Facility integer loads and avoid extra direct move llvm-svn: 265593
* regenerate checksSanjay Patel2016-04-061-556/+828
| | | | llvm-svn: 265591
* Put quotes around #error string.James Y Knight2016-04-061-1/+1
| | | | | | | GCC reports "missing terminating ' character", even when it's being skipped by preprocessing. llvm-svn: 265590
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-06105-598/+540
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
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