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* [X86][SSE] Let 64-bit targets use the fast 2i32-2f32 UINT_TO_FP conversion ↵Simon Pilgrim2016-07-302-13/+11
| | | | | | | | as well as 32-bit The 2i32-2i64 legalization means that we can use the slightly quicker double bits + fptrunc approach for the same results llvm-svn: 277271
* TrailingObjects::FixedSizeStorage constexpr fixes + testsHubert Tong2016-07-304-13/+127
| | | | | | | | | | | | | | | | | | | | | | | Summary: This change fixes issues with `LLVM_CONSTEXPR` functions and `TrailingObjects::FixedSizeStorage`. In particular, some of the functions marked `LLVM_CONSTEXPR` used by `FixedSizeStorage` were not implemented such that they evaluate successfully as part of a constant expression despite constant arguments. This change also implements a more traditional template-meta path to accommodate MSVC, and adds unit tests for `FixedSizeStorage`. Drive-by fix: the access control for members of `TrailingObjectsImpl` is tightened. Reviewers: faisalv, rsmith, aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D22668 llvm-svn: 277270
* MathExtras.h: add LLVM_CONSTEXPR where simpleHubert Tong2016-07-301-23/+27
| | | | | | | | | | | | | | | | | | | | Summary: This change adds `LLVM_CONSTEXPR` to functions selected as follows: - the body is already valid under C++11 for a `constexpr` function, - the evaluation of the function, given constant arguments, will not fail during the evaluation of a constant expression, and - the above properties are easily verifiable at a glance. Note: the evaluation of the function cannot fail if the instantiation triggers a static assertion failure. Reviewers: faisalv, rsmith, aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D22824 llvm-svn: 277269
* [Hexagon] Perform bit arithmetic on unsigned to avoid accidentally shifting ↵Benjamin Kramer2016-07-301-2/+2
| | | | | | | | negative values. Found by ubsan. llvm-svn: 277268
* Update modulemap for Msf -> MSF rename.Benjamin Kramer2016-07-301-3/+3
| | | | llvm-svn: 277267
* [X86] Fix lifetime of SMRange temporaries.Benjamin Kramer2016-07-301-4/+4
| | | | | | Found by asan -fsanitize-address-use-after-scope. llvm-svn: 277266
* [AMDGPU] Fix lifetime of SmallVector temporaries.Benjamin Kramer2016-07-301-6/+4
| | | | | | Found by asan -fsanitize-address-use-after-scope. llvm-svn: 277265
* AMDGPU: Fix shouldConvertConstantLoadToIntImm behaviorMatt Arsenault2016-07-302-3/+48
| | | | | | | This should really be true for any immediate, not just inline ones. llvm-svn: 277260
* AMDGPU: Set s_setpc_b64 as a terminatorMatt Arsenault2016-07-301-0/+3
| | | | llvm-svn: 277259
* AMDGPU: Remove unused patternMatt Arsenault2016-07-301-8/+7
| | | | llvm-svn: 277258
* [Orc] Add support for updating stub targets to CompileOnDemandLayer.Lang Hames2016-07-302-0/+36
| | | | | | | | | | | | | This makes it possible to implement re-optimization on top of the CompileOnDemandLayer. Test case to come in a future patch: This will need an execution test, and execution tests require a full working stack. The best option is to plumb this API up to the C Bindings stack and add a C bindings test for this. Patch by Sean Ogden. Thanks Sean! llvm-svn: 277257
* DAG: avoid duplicated truncating for sign extended operandWeiming Zhao2016-07-296-16/+125
| | | | | | | | | | | | | | | Summary: When performing cmp for EQ/NE and the operand is sign extended, we can avoid the truncaton if the bits to be tested are no less than origianl bits. Reviewers: eli.friedman Subscribers: eli.friedman, aemerson, nemanjai, t.p.northover, llvm-commits Differential Revision: https://reviews.llvm.org/D22933 llvm-svn: 277252
* [Support] Add storage specifier for MachO::NListType.Lang Hames2016-07-291-1/+1
| | | | | | | | This should fix UB warnings from the sanitizer bots: LLD performs bit manipulations on enums of this type, and these are UB if the underlying storage type isn't specified. llvm-svn: 277251
* GlobalISel: translate "unreachable" (into nothing)Tim Northover2016-07-292-0/+13
| | | | | | Easiest instruction ever! llvm-svn: 277225
* GlobalISel: support translation of intrinsic calls.Tim Northover2016-07-299-2/+109
| | | | | | | | These come in two variants for now: G_INTRINSIC and G_INTRINSIC_W_SIDE_EFFECTS. We may decide to split the latter up with finer-grained restrictions later, if necessary. llvm-svn: 277224
* Think this will fix issues with the error messages generated for ↵Kevin Enderby2016-07-292-15/+73
| | | | | | | | | | | | | | | malformed-archives.test in r277177 and added back this test which was deleted in r277196 while I tracked down these problems. Changed from constructing Twine's to std::string's as Twine's don't work across statements. Also removed a few unneeded Twine() constructions. Fix the write_escaped() calls to not pass the unintended second argument fixing the warning on the ld-x86_64-win7 bot. llvm-svn: 277223
* [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek2016-07-2915-808/+787
| | | | llvm-svn: 277220
* [X86] Match PSADBW in straight-line codeMichael Kuperstein2016-07-292-3/+443
| | | | | | | | | | | | | Up until now, we only had code to match PSADBW patterns that look like what comes out of the loop vectorizer - a partial reduction inside the loop body that gets fed into a horizontal operation in a different basic block. This adds support for straight-line patterns, like those generated by the SLP vectorizer. Differential Revision: https://reviews.llvm.org/D22889 llvm-svn: 277219
* [Hexagon] Fix test that uses -debug-only to require asserts.Michael Kuperstein2016-07-291-0/+1
| | | | llvm-svn: 277218
* pdbdump: Dump Free Page Map contents.Rui Ueyama2016-07-297-1/+40
| | | | | | Differential Revision: https://reviews.llvm.org/D22974 llvm-svn: 277216
* [X86][AVX] Fix VBROADCASTF128 selection bug (PR28770)Simon Pilgrim2016-07-293-7/+307
| | | | | | Support for lowering to VBROADCASTF128 etc. in D22460 was not correctly ensuring that the only users of the 128-bit vector load were the insertions of the vector into the lower/upper subvectors. llvm-svn: 277214
* [msf] Resubmit "Rename Msf -> MSF".Zachary Turner2016-07-2972-319/+319
| | | | | | | | | | | | | Previously this change was submitted from a Windows machine, so changes made to the case of filenames and directory names did not survive the commit, and as a result the CMake source file names and the on-disk file names did not match on case-sensitive file systems. I'm resubmitting this patch from a Linux system, which hopefully allows the case changes to make it through unfettered. llvm-svn: 277213
* CodeGen: add new "intrinsic" MachineOperand kind.Tim Northover2016-07-2913-13/+148
| | | | | | | This will be used during GlobalISel, where we need a more robust and readable way to write tests than a simple immediate ID. llvm-svn: 277209
* Add a REQUIRES: assert on a Lanai test that uses a -debug-only flagEli Bendersky2016-07-291-1/+2
| | | | llvm-svn: 277204
* [LoopUnroll] Include hotness of region in opt remarkAdam Nemet2016-07-296-36/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LoopUnroll is a loop pass, so the analysis of OptimizationRemarkEmitter is added to the common function analysis passes that loop passes depend on. The BFI and indirectly BPI used in this pass is computed lazily so no overhead should be observed unless -pass-remarks-with-hotness is used. This is how the patch affects the O3 pipeline: Dominator Tree Construction Natural Loop Information Canonicalize natural loops Loop-Closed SSA Form Pass Basic Alias Analysis (stateless AA impl) Function Alias Analysis Results Scalar Evolution Analysis + Lazy Branch Probability Analysis + Lazy Block Frequency Analysis + Optimization Remark Emitter Loop Pass Manager Rotate Loops Loop Invariant Code Motion Unswitch loops Simplify the CFG Dominator Tree Construction Basic Alias Analysis (stateless AA impl) Function Alias Analysis Results Combine redundant instructions Natural Loop Information Canonicalize natural loops Loop-Closed SSA Form Pass Scalar Evolution Analysis + Lazy Branch Probability Analysis + Lazy Block Frequency Analysis + Optimization Remark Emitter Loop Pass Manager Induction Variable Simplification Recognize loop idioms Delete dead loops Unroll loops ... llvm-svn: 277203
* [GlobalISel] Add missing link components to r277160 unittest. NFC.Ahmed Bougacha2016-07-291-0/+2
| | | | | | | It broke a shared builder: http://lab.llvm.org:8011/builders/llvm-mips-linux/builds/17320 llvm-svn: 277201
* Fixed line endingsSimon Pilgrim2016-07-291-94/+94
| | | | llvm-svn: 277199
* Fixed (incorrectly firing) MSVC unused variable warningSimon Pilgrim2016-07-291-2/+1
| | | | llvm-svn: 277198
* [ConstantFolding] Handle bitcasts of undef fp vector elementsDavid Majnemer2016-07-292-1/+8
| | | | | | | | | We used the wrong type for constructing a zero vector element which led to type mismatches. This fixes PR28771. llvm-svn: 277197
* Remove the test/tools/llvm-objdump/malformed-archives.test forKevin Enderby2016-07-291-60/+0
| | | | | | now while I investagate the bot failures with this test. llvm-svn: 277196
* Fixed MSVC out of range shift warningSimon Pilgrim2016-07-291-1/+1
| | | | llvm-svn: 277195
* Revert "[msf] Rename Msf to MSF."Zachary Turner2016-07-2972-319/+319
| | | | | | This reverts commit 4d1557ffac41e079bcb1abbcf04f512474dcd6fe. llvm-svn: 277194
* Fixing broken MSVS buildsPiotr Padlewski2016-07-291-2/+18
| | | | llvm-svn: 277191
* [msf] Rename Msf to MSF.Zachary Turner2016-07-2972-319/+319
| | | | | | | | In a previous patch, it was suggested to use all caps instead of rolling caps for initialisms, so this patch changes everything to do this. llvm-svn: 277190
* Recommitting r275284: add support to inline __builtin_mempcpyAndrew Kaylor2016-07-299-1/+88
| | | | | | | | Patch by Sunita Marathe Third try, now following fixes to MSan to handle mempcy in such a way that this commit won't break the MSan buildbots. (Thanks, Evegenii!) llvm-svn: 277189
* GlobalISel: make translate* functions take the most specialized class possible.Tim Northover2016-07-292-18/+17
| | | | | | NFC. llvm-svn: 277188
* Codegen: MachineBlockPlacement Improve probability layout.Kyle Butt2016-07-292-15/+213
| | | | | | | | | | | | | | | | | | | | | | | | | The following pattern was being layed out poorly: A / \ B C / \ / \ D E ? (Doesn't matter) Where A->B is far more likely than A->C, and prob(B->D) = prob(B->E) The current algorithm gives: A,B,C,E (D goes on worklist) It does this even if C has a frequency count of 0. This patch adjusts the layout calculation so that if freq(B->E) >> freq(C->E) then we go ahead and layout E rather than C. Fallthrough half the time is better than fallthrough never, or fallthrough very rarely. The resulting layout is: A,B,E, (C and D are in a worklist) llvm-svn: 277187
* Tests: Add branch weights to non-layout tests.Kyle Butt2016-07-294-12/+20
| | | | | | | Add branch weights to a few tests that aren't testing layout to make them less sensitive to changes in the layout algorithm. llvm-svn: 277186
* GlobalISel: add generic conditional branch.Tim Northover2016-07-296-7/+75
| | | | | | | Just the basic equivalent to DAG's condbr for now, we'll get to things like br_cc when we start doing more legalization. llvm-svn: 277184
* [Hexagon] Testcase for not merging stores into a misaligned storeKrzysztof Parzyszek2016-07-291-0/+46
| | | | | | | | | | | The DAG combiner will try to merge consecutive stores into a bigger store, unless the resulting store is not fast. Misaligned vector stores are allowed on Hexagon, but are not fast. Add a testcase to make sure this type of merging does not occur. Patch by Pranav Bhandarkar. llvm-svn: 277182
* Revert r277178, the actual change had already been appliedKrzysztof Parzyszek2016-07-292-46/+1
| | | | | | Will submit another patch with the testcase only. llvm-svn: 277180
* [Hexagon] Misaligned loads and stores are not fastKrzysztof Parzyszek2016-07-292-1/+46
| | | | | | | | | | | | The DAG combiner tries to merge stores to adjacent vector wide memory locations by creating stores which are integral multiples of the vector width. Discourage this by informing it that this is slow. This should not affect legalization passes, because all of them ignore the "Fast" argument. Patch by Pranav Bhandarkar. llvm-svn: 277178
* The next step along the way to getting good error messages for bad archives.Kevin Enderby2016-07-2915-117/+351
| | | | | | | | | | | | | | | | | | | | | | | | As mentioned in commit log for r276686 this next step is adding a new method in the ArchiveMemberHeader class to get the full name that does proper error checking, and can be use for error messages. To do this the name of ArchiveMemberHeader::getName() is changed to ArchiveMemberHeader::getRawName() to be consistent with Archive::Child::getRawName(). Then the “new” method is the addition of a new implementation of ArchiveMemberHeader::getName() which gets the full name and provides proper error checking. Which is mostly a rewrite of what was Archive::Child::getName() and cleaning up incorrect uses of llvm_unreachable() in the code which were actually just cases of errors in the input Archives. Then Archive::Child::getName() is changed to return Expected<> and use the new implementation of ArchiveMemberHeader::getName() . Also needed to change Archive::getMemoryBufferRef() with these changes to return Expected<> as well to propagate Errors up. As well as changing Archive::isThinMember() to return Expected<> . llvm-svn: 277177
* CodeGen: improve MachineInstrBuilder & MachineIRBuilder interfaceTim Northover2016-07-295-120/+96
| | | | | | | | | | | | | | For MachineInstrBuilder, having to manually use RegState::Define is ugly and makes register definitions clunkier than they need to be, so this adds two convenience functions: addDef and addUse. For MachineIRBuilder, we want to avoid BuildMI's first-reg-is-def rule because it's hidden away and causes bugs. So this patch switches buildInstr to returning a MachineInstrBuilder and adding *all* operands via addDef/addUse. NFC. llvm-svn: 277176
* [AArch64][GlobalISel] Select G_XOR.Ahmed Bougacha2016-07-292-0/+56
| | | | llvm-svn: 277173
* [GlobalISel] Add G_XOR.Ahmed Bougacha2016-07-294-0/+36
| | | | llvm-svn: 277172
* [AArch64][GlobalISel] Select G_LOAD/G_STORE.Ahmed Bougacha2016-07-293-2/+168
| | | | | | | | | | Mostly straightforward as we ignore addressing modes and just use the base + unsigned immediate offset (always 0) variants. This currently fails to select extloads because we have yet to agree on a representation. llvm-svn: 277171
* [GlobalISel] Add LLT raw_ostream operator<< overload.Ahmed Bougacha2016-07-291-0/+5
| | | | | | Helpful when debugging; will be used in the following commit. llvm-svn: 277170
* MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon2016-07-2921-7/+4583
| | | | | | | | | | | | | | | | | | | | | | | | Software pipelining is an optimization for improving ILP by overlapping loop iterations. Swing Modulo Scheduling (SMS) is an implementation of software pipelining that attempts to reduce register pressure and generate efficient pipelines with a low compile-time cost. This implementaion of SMS is a target-independent back-end pass. When enabled, the pass should run just prior to the register allocation pass, while the machine IR is in SSA form. If the pass is successful, then the original loop is replaced by the optimized loop. The optimized loop contains one or more prolog blocks, the pipelined kernel, and one or more epilog blocks. This pass is enabled for Hexagon only. To enable for other targets, a couple of target specific hooks must be implemented, and the pass needs to be called from the target's TargetMachine implementation. Differential Review: http://reviews.llvm.org/D16829 llvm-svn: 277169
* [Hexagon] Custom lower VECTOR_SHUFFLE and EXTRACT_SUBVECTOR for HVXKrzysztof Parzyszek2016-07-297-22/+631
| | | | | | | | | | | | | | | | If the mask of a vector shuffle has alternating odd or even numbers starting with 1 or 0 respectively up to the largest possible index for the given type in the given HVX mode (single of double) we can generate vpacko or vpacke instruction respectively. E.g. %42 = shufflevector <32 x i16> %37, <32 x i16> %41, <32 x i32> <i32 1, i32 3, ..., i32 63> is %42.h = vpacko(%41.w, %37.w) Patch by Pranav Bhandarkar. llvm-svn: 277168
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