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* Update documentation.Eric Christopher2011-12-161-0/+1
| | | | llvm-svn: 146781
* Extraneous whitespace and 80-col.Eric Christopher2011-12-161-3/+2
| | | | llvm-svn: 146780
* Fix off-by-one error in bucket sort.Jakob Stoklund Olesen2011-12-162-1/+27
| | | | | | | | | The bad sorting caused a misaligned basic block when building 176.vpr in ARM mode. <rdar://problem/10594653> llvm-svn: 146767
* APInt: update asserts for base-36Dylan Noblesmith2011-12-162-4/+8
| | | | | | | | Hexatridecimal was added in r139695. And fix the unittest that now triggers the assert. llvm-svn: 146754
* Don't adjust for alignment padding in OffsetIsInRange.Jakob Stoklund Olesen2011-12-161-16/+1
| | | | | | | | | | | This adjustment is already included in the block offsets computed by BasicBlockInfo, and adjusting again here can cause the pass to loop. When CreateNewWater splits a basic block, OffsetIsInRange would reject the new CPE on the next pass because of the too conservative alignment adjustment. This caused the block to be split again, and so on. llvm-svn: 146751
* Hexagon: Fix a nasty order-of-initialization bug.Benjamin Kramer2011-12-1612-22/+12
| | | | | | Reenable the tests. llvm-svn: 146750
* In DICompositeType, referenced to derived type is either metadata or null.Devang Patel2011-12-161-5/+5
| | | | llvm-svn: 146744
* Clarify and fix subprogram description.Devang Patel2011-12-161-1/+1
| | | | llvm-svn: 146743
* Note ARM constant island alignment in the release notes.Jakob Stoklund Olesen2011-12-162-2/+3
| | | | | | | | The command line option should be removed, but not until the feature has gotten a lot of testing. The ARMConstantIslandPass tends to have subtle bugs that only show up after a while. llvm-svn: 146739
* Adds a JSON parser and a benchmark (json-bench) to catch performance ↵Manuel Klimek2011-12-1612-2/+996
| | | | | | regressions. llvm-svn: 146735
* Put the '*' in the right place in the unit test. Forgot to fix up thisChandler Carruth2011-12-161-7/+7
| | | | | | bit of style, sorry. llvm-svn: 146733
* Make GCC happy by using makeAraryRef instead of the implicit conversion.Chandler Carruth2011-12-161-4/+4
| | | | | | | I have no idea why GCC can't cope with the implicit conversion and Clang can, or whose bug it is. Grr. llvm-svn: 146732
* Add a generic collection of class templates to ADT for buildingChandler Carruth2011-12-163-0/+454
| | | | | | | | | | | | variadic-like functions in C++98. See the comments in the header file for a more detailed description of how these work. We plan to use these extensively in the AST matching library. This code and idea were originally authored by Zhanyong Wan. I've condensed it using macros to reduce repeatition and adjusted it to fit better with LLVM's ADT. Thanks to both David Blaikie and Doug Gregor for the review! llvm-svn: 146729
* By popular demand, link up types by name if they are isomorphic and one is anChris Lattner2011-12-162-0/+34
| | | | | | | autorenamed version of the other. This makes the IR easier to read, because we don't end up with random renamed versions of the types after LTO'ing a large app. llvm-svn: 146728
* Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is ↵Craig Topper2011-12-164-48/+123
| | | | | | supported. Fix 'unpackh v, v' for 256-bit types to understand 128-bit lanes. llvm-svn: 146726
* Tweak CMake build on Cygwin.NAKAMURA Takumi2011-12-162-2/+2
| | | | llvm-svn: 146725
* Target/Hexagon: Fix CMake build.NAKAMURA Takumi2011-12-161-1/+0
| | | | llvm-svn: 146724
* Avoid a confusing assert for silly options: -unroll-runtime -unroll-count=1.Andrew Trick2011-12-161-0/+5
| | | | | | No need for an explicit test case for an unsupported combination of options. llvm-svn: 146721
* [asan] add a test for instrumenting globalsKostya Serebryany2011-12-161-0/+20
| | | | llvm-svn: 146718
* ARM NEON aliases for vmovq.f*Jim Grosbach2011-12-161-0/+4
| | | | llvm-svn: 146714
* Extract a method. No functional change.Jakob Stoklund Olesen2011-12-162-36/+47
| | | | llvm-svn: 146713
* llvm-config: Fix --targets-built, I changed this to use the registry but wasn'tDaniel Dunbar2011-12-164-9/+5
| | | | | | | | properly initializing the target infos. I decided it wasn't worth linking them in for this, so just switched back to using the Makefile variable for now. We can reconsider later if we ever get pluggable targets. llvm-svn: 146711
* Thumb2 ADR assembly parsing w/o the .w suffix.Jim Grosbach2011-12-151-0/+4
| | | | llvm-svn: 146710
* Make sure we correctly note the existence of an i8 immediate for vblendvps ↵Eli Friedman2011-12-153-3/+10
| | | | | | and friends, so we compute fixups correctly. PR11586. llvm-svn: 146709
* llvm-config: Update help text for removal of "backend" pseudo component.Daniel Dunbar2011-12-151-1/+0
| | | | llvm-svn: 146708
* build/unittests: Fix llvm-config names for gtest libraries, and bring MakefileDaniel Dunbar2011-12-154-7/+5
| | | | | | | library names in line with those used by CMake. - Patch by Johannes Obermayr, with tweaks by me. llvm-svn: 146706
* Move parts of lib/Target that use CodeGen into lib/CodeGen.Nick Lewycky2011-12-156-33/+34
| | | | llvm-svn: 146702
* Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a ↵Eli Friedman2011-12-151-1/+1
| | | | | | value that isn't a 32-bit value. (This is just to be safe; I don't think this actually causes any issues in practice.) llvm-svn: 146700
* ARM NEON VCLE is an alias for VCGE w/ the source operands reversed.Jim Grosbach2011-12-152-0/+62
| | | | llvm-svn: 146699
* [asan] add the name of the module to the description of a global variable. ↵Kostya Serebryany2011-12-151-1/+5
| | | | | | This improves the readability of global-buffer-overflow reports. llvm-svn: 146698
* Add MCTargetDesc library to Hexagon targetTony Linthicum2011-12-1515-30/+186
| | | | llvm-svn: 146692
* ARM NEON VTBL/VTBX assembly parsing and encoding.Jim Grosbach2011-12-155-51/+43
| | | | llvm-svn: 146691
* Enable proper constant island alignment by default.Jakob Stoklund Olesen2011-12-151-1/+1
| | | | | | | The code size increase is tiny (< 0.05%) because so little code uses 16-byte constant pool entries. llvm-svn: 146690
* Add missing zmovl AVX patterns which were causing crashes.Chad Rosier2011-12-152-0/+14
| | | | | | Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>! llvm-svn: 146689
* [asan] fix a bug (issue 19) where dlclose and the following mmap caused a ↵Kostya Serebryany2011-12-153-5/+35
| | | | | | false positive. compiler part. llvm-svn: 146688
* Silence warning.Jim Grosbach2011-12-151-1/+1
| | | | llvm-svn: 146686
* ARM NEON two-register double spaced register list parsing support.Jim Grosbach2011-12-151-14/+49
| | | | llvm-svn: 146685
* Fix assert in LowerBUILD_VECTOR for v16i16 type on AVX.Chad Rosier2011-12-152-2/+12
| | | | | | Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>! llvm-svn: 146684
* Zap unnecessary semicolons.Eli Friedman2011-12-151-2/+2
| | | | llvm-svn: 146682
* Set specific target cpu for testcase.Lang Hames2011-12-151-1/+1
| | | | llvm-svn: 146678
* Added test case for r146671.Lang Hames2011-12-151-0/+12
| | | | llvm-svn: 146675
* Use the proper comparator for set_intersection.Jakob Stoklund Olesen2011-12-151-1/+2
| | | | llvm-svn: 146674
* Fix VSELECT operand order. Was previously backwards, causing bogus vector ↵Lang Hames2011-12-151-3/+3
| | | | | | shift results - <rdar://problem/10559581>. llvm-svn: 146671
* Update DebugLoc while merging nodes at -O0.Devang Patel2011-12-153-7/+24
| | | | | | Patch by Kyriakos Georgiou! llvm-svn: 146670
* Add a test case to make sure that the nop really does follow the bl on ppc64 elfHal Finkel2011-12-151-0/+16
| | | | llvm-svn: 146666
* Virtual table holder field is either metadata or null. Devang Patel2011-12-151-1/+1
| | | | llvm-svn: 146665
* Ensure that the nop that should follow a bl call in PPC64 ELF actually doesHal Finkel2011-12-152-0/+14
| | | | llvm-svn: 146664
* Synthesize missing register class intersections.Jakob Stoklund Olesen2011-12-152-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function TRI::getCommonSubClass(A, B) returns the largest common sub-class of the register classes A and B. This patch teaches TableGen to synthesize sub-classes such that the answer is always maximal. In other words, every register that is in both A and B will also be present in getCommonSubClass(A, B). This introduces these synthetic register classes: ARM: GPRnopc_and_hGPR GPRnopc_and_hGPR hGPR_and_rGPR GPRnopc_and_hGPR GPRnopc_and_hGPR hGPR_and_rGPR tGPR_and_tcGPR hGPR_and_tcGPR X86: GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR64_NOSP_and_GR64_TC GR64_NOSP_and_GR64_TC GR64_NOREX_and_GR64_TC GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR64_NOSP_and_GR64_TC GR64_NOREX_and_GR64_TC GR64_NOREX_NOSP_and_GR64_TC GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR32_ABCD_and_GR32_NOAX GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR32_ABCD_and_GR32_NOAX GR32_NOAX_and_GR32_TC GR32_NOAX_and_GR32_NOSP GR64_NOSP_and_GR64_TC GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR64_NOREX_and_GR64_TC GR64_NOREX_NOSP_and_GR64_TC GR32_ABCD_and_GR32_NOAX GR64_ABCD_and_GR64_TC GR32_NOAX_and_GR32_TC GR32_AD_and_GR32_NOAX Other targets are unaffected. llvm-svn: 146657
* Pass optLevel to XCoreDAGToDAGISel.Richard Osborne2011-12-153-6/+8
| | | | | | Patch by Kyriakos Georgiou. llvm-svn: 146656
* Fix test.Eli Friedman2011-12-151-2/+2
| | | | llvm-svn: 146642
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