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* [mips] Split Instruction.Predicates into smaller lists and re-join them with ↵Daniel Sanders2014-05-077-77/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | !listconcat Summary: The overall idea is to chop the Predicates list into subsets that are usually overridden independently. This allows subclasses to partially override the predicates of their superclasses without having to re-add all the existing predicates. This patch starts the process by moving HasStdEnc into a new EncodingPredicates list and almost everything else into AdditionalPredicates. It has revealed a couple likely bugs where 'let Predicates' has removed the HasStdEnc predicate. No functional change (confirmed by diffing tablegen-erated files). Depends on D3549, D3506 Reviewers: vmedic Differential Revision: http://reviews.llvm.org/D3550 llvm-svn: 208184
* [tablegen] Add !listconcat operator with the similar semantics as !strconcatDaniel Sanders2014-05-078-4/+63
| | | | | | | | | | | | | | | | | | | | Summary: It concatenates two or more lists. In addition to the !strconcat semantics the lists must have the same element type. My overall aim is to make it easy to append to Instruction.Predicates rather than override it. This can be done by concatenating lists passed as arguments, or by concatenating lists passed in additional fields. Reviewers: dsanders Reviewed By: dsanders Subscribers: hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D3506 llvm-svn: 208183
* [mips] Move HasStdEnc to the front of the predicates lists.Daniel Sanders2014-05-075-61/+61
| | | | | | | | | | | | | | | | | | Summary: This will make it easier to prove that a more complicated change in the following commit is non-functional. No functional change. Depends on D3506 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3549 llvm-svn: 208179
* [BUG][REFACTOR]Zinovy Nis2014-05-074-43/+49
| | | | | | | | | 1) Fix for printing debug locations for absolute paths. 2) Location printing is moved into public method DebugLoc::print() to avoid re-inventing the wheel. Differential Revision: http://reviews.llvm.org/D3513 llvm-svn: 208177
* Second patch of patch series that improves MergeFunctions performance time ↵Stepan Dyatkovskiy2014-05-071-4/+278
| | | | | | | | | | | | | | | | | from O(N*N) to O(N*log(N)). The idea is to introduce total ordering among functions set. It allows to build binary tree and perform function look-up procedure in O(log(N)) time. This patch description: Introduced total ordering among constants implemented in cmpConstants method. Method performs lexicographical comparison between constants represented as hypothetical numbers of next format: <bitcastability-trait><raw-bit-contents> Please, read cmpConstants declaration comments for more details. llvm-svn: 208173
* Work-around MSVS build breakage due to r208148Timur Iskhodzhanov2014-05-071-2/+4
| | | | llvm-svn: 208171
* [asan] Add a flag to control asm instrumentation.Evgeniy Stepanov2014-05-075-5/+12
| | | | | | With this change, asm instrumentation is disabled by default. llvm-svn: 208167
* Allow using normal .eh_frame based unwinding on ARM. Use the sameJoerg Sonnenberger2014-05-075-1/+307
| | | | | | encodings as x86. Use this exception model for NetBSD. llvm-svn: 208166
* PR19562: DebugInfo temporary MDNode leak: Don't include a temporary node to ↵David Blaikie2014-05-071-2/+1
| | | | | | | | | | replace with a variable list for methods, since they're always declarations and thus never include variables This field is used for a list of variables to ensure they are not lost during optimization (they're only included when optimizations are enabled). llvm-svn: 208159
* [C++11] Add NArySCEV->Operands iterator rangeTobias Grosser2014-05-072-8/+11
| | | | llvm-svn: 208158
* [obj2yaml] Recognize input file format using llvm::object::ObjectFileSimon Atanasyan2014-05-076-25/+126
| | | | | | | | | | | interface methods isCOFF(). The '-coff' command line option has been removed. It was not used in any test cases. The patch reviewed by Michael Spencer. llvm-svn: 208157
* ARM: mark additional instructions as MachineFrameSetupSaleem Abdulrasool2014-05-071-5/+10
| | | | | | | | Mark up additional instructions which are part of the function prologue as MachineFrameSetup. These instructions are part of the function prologue, emitted by the PEI pass to setup the stack for use in the activating frame. llvm-svn: 208153
* ARM: fix WoA PEI instruction selectionSaleem Abdulrasool2014-05-072-1/+29
| | | | | | | | | | | The ARM::BLX instruction is an ARM mode instruction. The Windows on ARM target is limited to Thumb instructions. Correctly use the thumb mode tBLXr instruction. This would manifest as an errant write into the object file as the instruction is 4-bytes in length rather than 2. The result would be a corrupted object file that would eventually result in an executable that would crash at runtime. llvm-svn: 208152
* llvm-cov: Document --no-output in the command guideJustin Bogner2014-05-071-0/+5
| | | | llvm-svn: 208151
* llvm-cov: Handle missing source files as GCOV doesJustin Bogner2014-05-076-14/+133
| | | | | | | | | | | If the source files referenced by a gcno file are missing, gcov outputs a coverage file where every line is simply /*EOF*/. This also occurs for lines in the coverage that are past the end of a file that is found. This change mimics gcov. llvm-svn: 208149
* llvm-cov: Implement --no-outputJustin Bogner2014-05-075-22/+66
| | | | | | | | In gcov, there's a -n/--no-output option, which disables the writing of any .gcov files, so that it emits only the summary info on stdout. This implements the same behaviour in llvm-cov. llvm-svn: 208148
* [Support/MemoryBuffer] Remove the assertion that the file size did not shrink.Argyrios Kyrtzidis2014-05-061-3/+0
| | | | | | This can happen in practice with the user changing files and we can recover from it. llvm-svn: 208143
* Fix ASan init function detection after clang r208128.Nico Weber2014-05-061-3/+24
| | | | llvm-svn: 208141
* Special case aliases in GlobalValue::getSection.Rafael Espindola2014-05-063-3/+8
| | | | | | | | This is similar to the getAlignment patch, but is done just for completeness. It looks like we never call getSection on an alias. All the tests still pass if the if is replaced with an assert. llvm-svn: 208139
* Update an embarassing out-of-date comment.Andrew Trick2014-05-061-5/+6
| | | | llvm-svn: 208137
* Use a range based for loop for the SubtargetFeatures print function.Eric Christopher2014-05-061-2/+2
| | | | llvm-svn: 208132
* Revert "Try simplifying LexicalScopes ownership again."David Blaikie2014-05-062-135/+130
| | | | | | | | | Speculatively reverting due to a suspicious failure on a Windows buildbot. This reverts commit 10c37a012ea11596d44cd9059fe09c959caf30c8. llvm-svn: 208131
* Fix odd formatting that snuck into last patch.Eric Christopher2014-05-061-3/+3
| | | | llvm-svn: 208130
* If a function needs a frame pointer, but r11 (aka fp) has not been used,Joerg Sonnenberger2014-05-066-36/+42
| | | | | | | | remove it from the list of unspilled registers. Otherwise the following attempt to keep the stack aligned by picking an extra GPR register to spill will not work as it picks up r11. llvm-svn: 208129
* ArrayRef-ize the Feature and Processor tables for SubtargetFeatures.Eric Christopher2014-05-065-98/+73
| | | | | | | | This removes arguments passed everywhere and allows the use of standard iteration over lists. Should be no functional change. llvm-svn: 208127
* Copy the full TailCallKind in CallInst::clone_implReid Kleckner2014-05-062-1/+34
| | | | | | | Split from the musttail inliner change. This will be covered by an opt test when the inliner change lands. llvm-svn: 208126
* Do not make -pass-remarks additive.Diego Novillo2014-05-062-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | Summary: When I initially introduced -pass-remarks, I thought it would be a neat idea to make it additive. So, if one used it as: $ llc -pass-remarks=inliner --pass-remarks=loop.* the compiler would build the regular expression '(inliner)|(loop.*)'. The more I think about it, the more I regret it. This is not how other flags work. The standard semantics are right-to-left overrides. This is how clang interprets -Rpass. And I think the two should be compatible in this respect. Reviewers: qcolombet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D3614 llvm-svn: 208122
* TTI: Estimate @llvm.fmuladd cost as fmul + fadd when FMA's aren't legal on ↵Benjamin Kramer2014-05-062-1/+35
| | | | | | the target. llvm-svn: 208115
* [X86] Improve the lowering of BITCAST dag nodes from type f64 to type v2i32 ↵Andrea Di Biagio2014-05-063-3/+124
| | | | | | | | | | | | | | | | | | | | (and vice versa). Before this patch, the backend always emitted a store+load sequence to bitconvert from f64 to i64 the input operand of a ISD::BITCAST dag node that performed a bitconvert from type MVT::f64 to type MVT::v2i32. The resulting i64 node was then used to build a v2i32 vector. With this patch, the backend now produces a cheaper SCALAR_TO_VECTOR from MVT::f64 to MVT::v2f64. That SCALAR_TO_VECTOR is then followed by a "free" bitcast to type MVT::v4i32. The elements of the resulting v4i32 are then extracted to build a v2i32 vector (which is illegal and therefore promoted to MVT::v2i64). This is in general cheaper than emitting a stack store+load sequence to bitconvert the operand from type f64 to type i64. llvm-svn: 208107
* Implememting named register intrinsicsRenato Golin2014-05-0629-0/+376
| | | | | | | | | | | This patch implements the infrastructure to use named register constructs in programs that need access to specific registers (bare metal, kernels, etc). So far, only the stack pointer is supported as a technology preview, but as it is, the intrinsic can already support all non-allocatable registers from any architecture. llvm-svn: 208104
* Special case aliases in GlobalValue::getAlignment.Rafael Espindola2014-05-064-4/+22
| | | | | | | | | An alias has the address of what it points to, so it also has the same alignment. This allows a few optimizations to see past aliases for free. llvm-svn: 208103
* Have the SubtargetFeature help routine just not return a number andEric Christopher2014-05-062-7/+12
| | | | | | | | fall back to the normal path without a cpu. While doing this fix llc to just exit when we don't have a module to process instead of asserting. llvm-svn: 208102
* Add some details to the llvm-cov documentation. <rdar://problem/15819496>Bob Wilson2014-05-061-13/+96
| | | | llvm-svn: 208098
* Be more strict about not allowing setSection on aliases.Rafael Espindola2014-05-062-5/+6
| | | | llvm-svn: 208095
* Be more strict about not calling setAlignment on global aliases.Rafael Espindola2014-05-062-6/+15
| | | | | | | The fact that GlobalAlias::setAlignment exists at all is a side effect of how the classes are organized, it should never be used. llvm-svn: 208094
* AArch64/ARM64: implement diagnosis of unpredictable loads & storesTim Northover2014-05-063-21/+70
| | | | llvm-svn: 208091
* AArch64/ARM64: add two more MC tests to ARM64 set.Tim Northover2014-05-062-0/+4
| | | | llvm-svn: 208085
* AArch64/ARM64: enable MC-level diagnostic tests for NEON insts.Tim Northover2014-05-062-392/+663
| | | | | | | | | Obviously we can't expect the two backends to produce identical diagnostics, since what's possible depends quite a bit on how the .td files are structured. I think the ARM64 diagnostics are basically of the same quality in all the changed cases, so I've split the CHECK lines. llvm-svn: 208084
* AArch64/ARM64: make NEON vector list parsing a bit more robustTim Northover2014-05-062-3/+6
| | | | | | | It doesn't change the results, but it seems silly not to diagnose obvious problems early on. llvm-svn: 208083
* AArch64/ARM64: add more specific diagnostic for floating imm 0.0.Tim Northover2014-05-061-4/+5
| | | | llvm-svn: 208082
* AArch64/ARM64: add more specific diagnostic for invalid vector lanesTim Northover2014-05-062-4/+21
| | | | llvm-svn: 208081
* AArch64/ARM64: produce more informative diagnostic assembling some immediatesTim Northover2014-05-064-50/+56
| | | | | | | No tests here, they'll be added when the entire neon-diagnostics.s test from AArch64 is enabled. llvm-svn: 208079
* ARM: For thumb fixups store halfwords high first and low secondChristian Pirker2014-05-062-37/+58
| | | | llvm-svn: 208076
* [ARM64] Enable alignment control option in front-end for ARM64.Kevin Qin2014-05-062-4/+16
| | | | | | This is the modification in llvm part. llvm-svn: 208074
* Disable -Wcomment when building with GCC.Evgeniy Stepanov2014-05-062-11/+22
| | | | | | | | GCC version of -Wcomment is not compatible with ascii art graph diagrams. Reverts r207629. llvm-svn: 208073
* Update programmers manual to cover llvm::function_ref, and add a note to theRichard Smith2014-05-062-0/+74
| | | | | | coding standard suggesting using it instead of the (unavailable) std::function. llvm-svn: 208067
* Use X86 memory operand enums instead of hardcoding.Craig Topper2014-05-061-16/+20
| | | | llvm-svn: 208064
* Fix some obvious Doxygen comment bugs.Owen Anderson2014-05-061-3/+4
| | | | llvm-svn: 208059
* Update comment from a recent commit.David Blaikie2014-05-061-3/+3
| | | | llvm-svn: 208057
* [Build] Add rule to generate fully-expanded .td fileAdam Nemet2014-05-061-1/+7
| | | | | | | | I found it useful in the past and now again to have a version of the .td file where all the records are expanded. This adds a makefile rule to generate this on demand. llvm-svn: 208056
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