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llvm-svn: 93283
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It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.
llvm-svn: 93280
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flag doesn't exist there, and this is an x86 test.
llvm-svn: 93279
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where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
llvm-svn: 93278
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dumper doesn't really do what I want yet, but
at least it doesn't crash now.
llvm-svn: 93272
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ValueList
llvm-svn: 93270
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llvm-svn: 93261
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llvm-svn: 93259
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in JT.
2) When cloning blocks for PHI or xor conditions, use
instsimplify to simplify the code as we go. This allows us to
squish common cases early in JT which opens up opportunities for
subsequent iterations, and allows it to completely simplify the
testcase.
llvm-svn: 93253
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llvm-svn: 93251
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llvm-svn: 93249
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llvm-svn: 93247
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patterns first.
llvm-svn: 93245
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llvm-svn: 93244
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on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix
llvm-svn: 93242
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llvm-svn: 93235
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to not touch Cygwin: the change caused llvm-gcc build failures due to
long double getting the wrong size. Patch by Aaron Gray.
llvm-svn: 93234
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llvm-svn: 93230
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llvm-svn: 93229
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llvm-svn: 93228
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llvm-svn: 93227
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llvm-svn: 93222
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condition is a xor with a phi node. This eliminates nonsense
like this from 176.gcc in several places:
LBB166_84:
testl %eax, %eax
- setne %al
- xorb %cl, %al
- notb %al
- testb $1, %al
- je LBB166_85
+ je LBB166_69
+ jmp LBB166_85
This is rdar://7391699
llvm-svn: 93221
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llvm-svn: 93220
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instruction is copy like where the source and destination registers can
overlap. This is to be used by the coalescable to coalesce the source and
destination registers of instructions like X86::MOVSX64rr32. Apparently
some crazy people believe the coalescer is too simple.
llvm-svn: 93210
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on branches by renaming it and checking for a branch at the call site.
llvm-svn: 93208
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llvm-svn: 93206
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autogen them after 93152 and 93191.
llvm-svn: 93204
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llvm-svn: 93203
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uses,
codegen has no apparent problem with the trunc version of this, because it turns
into a simple subreg idiom
llvm-svn: 93202
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the
trunc has multiple uses. Codegen is not able to coalesce the subreg case
correctly and so this leads to higher register pressure and spilling (see PR5997).
This speeds up 256.bzip2 from 8.60 -> 8.04s on my machine, ~7%.
llvm-svn: 93200
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and ConvertValIDToValue into a more powerful ConvertValIDToValue() that does all three's work
llvm-svn: 93197
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llvm-svn: 93195
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Implement the same interface as already available for dominators.
llvm-svn: 93194
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overlap, then select as an ADD instead.
llvm-svn: 93191
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llvm-svn: 93189
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llvm-svn: 93187
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llvm-svn: 93185
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BRCOND was constant folded.
This fixes PR5980.
llvm-svn: 93184
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llvm-svn: 93183
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llvm-svn: 93182
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then a load if the
loads are not in the default address space because the transformation discards src value info.
llvm-svn: 93180
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llvm-svn: 93174
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llvm-svn: 93172
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documentation.
Patch by Dustin Laurence!
llvm-svn: 93170
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convention.
llvm-svn: 93167
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llvm-svn: 93165
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have a fix.
llvm-svn: 93163
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- getToken is modeled after StringRef::split but it can split on multiple
separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
same behaviour as getToken.
llvm-svn: 93161
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has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.
FileCheckize, tidy, and extend a testcase to cover this case.
This fixes rdar://7527390.
llvm-svn: 93160
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