summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* Add some tests for NVPTX lowering of cmpxchgEli Bendersky2014-07-211-0/+14
| | | | llvm-svn: 213586
* Match semantics of PointerMayBeCapturedBefore to its name by defaultHal Finkel2014-07-213-7/+17
| | | | | | | | | | | | | | | As it turns out, the capture tracker named CaptureBefore used by AA, and now available via the PointerMayBeCapturedBefore function, would have been more-aptly named CapturedBeforeOrAt, because it considers captures at the instruction provided. This is not always what one wants, and it is difficult to get the strictly-before behavior given only the current interface. This adds an additional parameter which controls whether or not you want to include captures at the provided instruction. The default is not to include the instruction provided, so that 'Before' matches its name. No functionality change intended. llvm-svn: 213582
* Revert "Recommit r212203: Don't try to construct debug LexicalScopes ↵David Blaikie2014-07-219-314/+44
| | | | | | | | hierarchy for functions that do not have top level debug information." This reverts commit r212649 while I investigate/reduce/etc PR20367. llvm-svn: 213581
* test-release.sh: Add support for dot releasesTom Stellard2014-07-211-1/+1
| | | | llvm-svn: 213580
* R600: silence GCC warningSaleem Abdulrasool2014-07-211-0/+1
| | | | | | | | | | GCC believes it may be possible to not return a value from the switch: lib/Target/R600/SIRegisterInfo.cpp:187:1: warning: control reaches end of non-void function [-Wreturn-type] Add an unreachable label to indicate that this is not possible and still permit switch coverage checking. llvm-svn: 213572
* R600/SI: Refactor VOP3 instruction definitionsTom Stellard2014-07-212-21/+52
| | | | llvm-svn: 213571
* R600/SI: Separate encoding and operand definitions into their own classesTom Stellard2014-07-211-132/+174
| | | | llvm-svn: 213570
* Replace the result usages while legalizing cmpxchg.Logan Chien2014-07-213-5/+98
| | | | | | | | | | | | | | | | | | | | | | | | | We should update the usages to all of the results; otherwise, we might get assertion failure or SEGV during the type legalization of ATOMIC_CMP_SWAP_WITH_SUCCESS with two or more illegal types. For example, in the following sequence, both i8 and i1 might be illegal in some target, e.g. armv5, mipsel, mips64el, %0 = cmpxchg i8* %ptr, i8 %desire, i8 %new monotonic monotonic %1 = extractvalue { i8, i1 } %0, 1 Since both i8 and i1 should be legalized, the corresponding ATOMIC_CMP_SWAP_WITH_SUCCESS dag will be checked/replaced/updated twice. If we don't update the usage to *ALL* of the results in the first round, the DAG for extractvalue might be processed earlier. The GetPromotedInteger() will result in assertion failure, because its operand (i.e. the success bit of cmpxchg) is not promoted beforehand. llvm-svn: 213569
* R600/SI: Initailize encoding fields of unused VOP3 modifiers to 0Tom Stellard2014-07-211-0/+5
| | | | llvm-svn: 213564
* R600/SI: Initialize unused VOP3 sources to 0 instead of SIOperand.ZEROTom Stellard2014-07-211-6/+6
| | | | llvm-svn: 213563
* Revert "[C++11] Add predecessors(BasicBlock *) / successors(BasicBlock *) ↵Duncan P. N. Exon Smith2014-07-2141-167/+230
| | | | | | | | | iterator ranges." This reverts commit r213474 (and r213475), which causes a miscompile on a stage2 LTO build. I'll reply on the list in a moment. llvm-svn: 213562
* R600/SI: Add instruction shrinking passTom Stellard2014-07-2113-5/+223
| | | | | | This pass converts 64-bit instructions to 32-bit when possible. llvm-svn: 213561
* Fix Sphinx warnings.Dan Liew2014-07-212-5/+2
| | | | llvm-svn: 213559
* R600/SI: VOPC instructions explicitly define VCCTom Stellard2014-07-211-1/+1
| | | | | | Therefore we don't need to add it to the implict defs list. llvm-svn: 213558
* Correct the ownership passing semantics of object::createBinary and make ↵David Blaikie2014-07-214-10/+7
| | | | | | | | | | | | | | | | them explicit in the type system. createBinary documented that it destroyed the parameter in error cases, though by observation it does not. By passing the unique_ptr by value rather than lvalue reference, callers are now explicit about passing ownership and the function implements the documented contract. Remove the explicit documentation, since now the behavior cannot be anything other than what was documented, so it's redundant. Also drops a unique_ptr::release in llvm-nm that was always run on a null unique_ptr anyway. llvm-svn: 213557
* Remove unnecessary use of unique_ptr::release() used to construct another ↵David Blaikie2014-07-211-2/+1
| | | | | | unique_ptr. llvm-svn: 213556
* Remove unused variable.David Blaikie2014-07-211-1/+0
| | | | llvm-svn: 213554
* R600/SI: Clean up some of the unused REGISTER_{LOAD,STORE} codeTom Stellard2014-07-213-165/+33
| | | | | | | | | There are a few more cleanups to do, but I ran into some problems with ext loads and trunc stores, when I tried to change some of the vector loads and stores from custom to legal, so I wasn't able to get rid of everything. llvm-svn: 213552
* R600/SI: Use scratch memory for large private arraysTom Stellard2014-07-2123-104/+507
| | | | llvm-svn: 213551
* R600/SI: Specify wavefront size for SI and CITom Stellard2014-07-211-2/+4
| | | | llvm-svn: 213550
* R600/SI: Remove vaddr operand from BUFFER_LOAD_*_OFFSET instructionsTom Stellard2014-07-212-4/+4
| | | | | | This operand is never used. llvm-svn: 213549
* [mips] Do not emit '.module fp=...' unless we really need to.Daniel Sanders2014-07-212-12/+22
| | | | | | | | | | | | We now emit this value when we need to contradict the default value. This restores support for binutils 2.24. When a suitable binutils has been released we can resume unconditionally emitting .module directives. This is preferable to omitting the .module directives since the .module directives protect against, for example, accidentally assembling FP32 code with -mfp64 and producing an unusuable object. llvm-svn: 213548
* [SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX512VL features.Robert Khasanov2014-07-2111-23/+105
| | | | | | | | | | | | Enabling HasAVX512{DQ,BW,VL} predicates. Adding VK2, VK4, VK32, VK64 masked register classes. Adding new types (v64i8, v32i16) to VR512. Extending calling conventions for new types (v64i8, v32i16) Patch by Zinovy Nis <zinovy.y.nis@intel.com> Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com> llvm-svn: 213545
* docs: Update relaease documents to include the patch number in the RELEASE tagsTom Stellard2014-07-211-17/+17
| | | | | | | This will make it easier to update the release scripts to support bug-fix releases. llvm-svn: 213544
* Export LLVM_ENABLE_ASSERTIONS in LLVMConfig.cmake so clients knowDan Liew2014-07-213-1/+9
| | | | | | | if the version of LLVM they are trying to use was built with or without assertions. llvm-svn: 213532
* R600/SI: Store constant initializer data in constant memoryTom Stellard2014-07-2118-31/+194
| | | | | | | | | | | | This implements a solution for constant initializers suggested by Vadim Girlin, where we store the data after the shader code and then use the S_GETPC instruction to compute its address. This saves use the trouble of creating a new buffer for constant data and then having to pass the pointer to the kernel via user SGPRs or the input buffer. llvm-svn: 213530
* R600/SI: Add isCFDepth0 Predicate to SALU addc patternTom Stellard2014-07-211-10/+16
| | | | llvm-svn: 213529
* R600/SI: Use VALU for i1 XORTom Stellard2014-07-213-6/+12
| | | | llvm-svn: 213528
* R600/SI: Use a custom encoding method for simm16 in SOPP branch instructionsTom Stellard2014-07-216-14/+89
| | | | | | | This allows us to explicitly define the type of fixup that is needed, so we can distinguish this from future fixup types. llvm-svn: 213527
* R600/SI: Rename SOPP operands to match the encoding fieldsTom Stellard2014-07-212-19/+19
| | | | llvm-svn: 213526
* [mips] Add MipsOptionRecord abstraction and use it to implement ↵Daniel Sanders2014-07-2110-46/+320
| | | | | | | | | | | | | | | .reginfo/.MIPS.options This abstraction allows us to support the various records that can be placed in the .MIPS.options section in the future. We currently use it to record register usage information (the ODK_REGINFO record in our ELF64 spec). Each .MIPS.options record should subclass MipsOptionRecord and provide an implementation of EmitMipsOptionRecord. Patch by Matheus Almeida and Toma Tabacu llvm-svn: 213522
* TableGen: Allow AddedComplexity values to be negativeTom Stellard2014-07-214-7/+48
| | | | | | | | | | This is useful for cases when stand-alone patterns are preferred to the patterns included in the instruction definitions. Instead of requiring that stand-alone patterns set a larger AddedComplexity value, which can be confusing to new developers, the allows us to reduce the complexity of the included patterns to achieve the same result. llvm-svn: 213521
* Move the CapturesBefore tracker from AA into CaptureTrackingHal Finkel2014-07-213-50/+96
| | | | | | | | | | | | | | | | | There were two generally-useful CaptureTracker classes defined in LLVM: the simple tracker defined in CaptureTracking (and made available via the PointerMayBeCaptured utility function), and the CapturesBefore tracker available only inside of AA. This change moves the CapturesBefore tracker into CaptureTracking, generalizes it slightly (by adding a ReturnCaptures parameter), and makes it generally available via a PointerMayBeCapturedBefore utility function. This logic will be needed, for example, to perform noalias function parameter attribute inference. No functionality change intended. llvm-svn: 213519
* This declaration has no definition, which is causing MSVC to emit several ↵Aaron Ballman2014-07-211-4/+0
| | | | | | "no suitable definition provided for explicit template instantiation request" C4661 warnings. llvm-svn: 213517
* Fixing an MSVC conversion warning about implicitly converting the shift ↵Aaron Ballman2014-07-211-1/+1
| | | | | | results to 64-bits. No functional change intended. llvm-svn: 213515
* Move isIdentifiedFunctionLocal from BasicAA to AAHal Finkel2014-07-213-11/+18
| | | | | | | | | | The ability to identify function locals will exist outside of BasicAA (for example, logic for inferring noalias function arguments will need this), so make this concept generally accessible without code duplication. No functionality change. llvm-svn: 213514
* [mips] Try to fix the test/ExecutionEngine tests on a MIPS host.Daniel Sanders2014-07-211-2/+49
| | | | | | | | | | | | | Fix a dangerous default case that caused MipsCodeEmitter to discard pseudo instructions it didn't recognize. It will now call llvm_unreachable() for unrecognized pseudo's and explicitly handles PseudoReturn, PseudoReturn64, PseudoIndirectBranch, PseudoIndirectBranch64, CFI_INSTRUCTION, IMPLICIT_DEF, and KILL. There may be other pseudos that need handling but this was enough for the ExecutionEngine tests to pass on my test system. llvm-svn: 213513
* [mips] Do not emit '.module [no]oddspreg' unless we really need to.Daniel Sanders2014-07-212-7/+16
| | | | | | | | | | | | We now emit this directive when we need to contradict the default value (e.g. -mno-odd-spreg is given) or an option changed the default value (e.g. -mfpxx is given). This restores support for the currently available head of binutils. However, at this point binutils 2.24 is still not sufficient since it does not support '.module fp=...'. llvm-svn: 213511
* FileCheck-ize a test.Chandler Carruth2014-07-211-5/+25
| | | | llvm-svn: 213508
* CodeGen: emit IR-level f16 conversion intrinsics as fptrunc/fpextTim Northover2014-07-215-99/+28
| | | | | | | | | | | | | | | | | This makes the first stage DAG for @llvm.convert.to.fp16 an fptrunc, and correspondingly @llvm.convert.from.fp16 an fpext. The legalisation path is now uniform, regardless of the input IR: fptrunc -> FP_TO_FP16 (if f16 illegal) -> libcall fpext -> FP16_TO_FP (if f16 illegal) -> libcall Each target should be able to select the version that best matches its operations and not be required to duplicate patterns for both fptrunc and FP_TO_FP16 (for example). As a result we can remove some redundant AArch64 patterns. llvm-svn: 213507
* [SDAG,cleanup] Switch the DAG combiner over to use the spellingChandler Carruth2014-07-211-179/+179
| | | | | | | | | | | | | | | | | | 'Worklist' consistently rather than a deeply confusing mixture of 'WorkList' and 'Worklist'. Notably, the very 'WorkList' of the DAG combiner was exposed to target specific DAG combines under an interface 'AddToWorklist' which was implemented by in turn calling 'AddToWorkList' in the combiner. This has sent me circling with the wrong case in grep one too many times. I chose to normalize on 'Worklist' because that one won the grep-vote for llvm/lib/... by a hundered hits or so, and it is used in places relatively "canonical" such as InstCombine's Worklist. Let's all jsut pick this casing, whether "correct", "good", or "bad" and be consistent... llvm-svn: 213506
* [SDAG] Rather than using a narrow test against the one dummy node on theChandler Carruth2014-07-211-1/+6
| | | | | | | | | | | | stack, filter all handle nodes from the DAG combiner worklist. This will also handle cases where other handle nodes might be (erroneously) added to the worklist and then cause bugs and explosions when deleted. For example, when running the legalizer within the DAG combiner, there are times when other handle nodes are used and can end up here. llvm-svn: 213505
* [DAGCombiner] Improve the shuffle-vector folding logic.Andrea Di Biagio2014-07-213-0/+398
| | | | | | | | | | | | | | | | Canonicalize shuffles according to rules: * shuffle(A, shuffle(A, B)) -> shuffle(shuffle(A,B), A) * shuffle(B, shuffle(A, B)) -> shuffle(shuffle(A,B), B) * shuffle(B, shuffle(A, Undef)) -> shuffle(shuffle(A, Undef), B) This patch helps identifying more shuffle pairs that could be combined reusing the already existing rules in the DAGCombiner. Added new test 'combine-vec-shuffle-5.ll' to verify that the canonicalized shuffles are now folded into a single shuffle node by the DAGCombiner. Added more test cases to 'combine-vec-shuffle-4.ll'. llvm-svn: 213504
* [DAG] Refactor some logic. No functional change.Andrea Di Biagio2014-07-213-28/+33
| | | | | | | | This patch removes function 'CommuteVectorShuffle' from X86ISelLowering.cpp and moves its logic into SelectionDAG.cpp as method 'getCommutedVectorShuffles'. This refactoring is in preperation of an upcoming change to the DAGCombiner. llvm-svn: 213503
* Fix for regression: [Bug 20369] wrong code at -O3 on x86_64-linux-gnu in ↵Gerolf Hoflehner2014-07-211-1/+9
| | | | | | | | | 64-bit mode Prevents hoisting of loads above stores and sinking of stores below loads in MergedLoadStoreMotion.cpp (rdar://15991737) llvm-svn: 213497
* [PowerPC] ELFv2 aggregate passing supportUlrich Weigand2014-07-215-51/+502
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds infrastructure support for passing array types directly. These can be used by the front-end to pass aggregate types (coerced to an appropriate array type). The details of the array type being used inform the back-end about ABI-relevant properties. Specifically, the array element type encodes: - whether the parameter should be passed in FPRs, VRs, or just GPRs/stack slots (for float / vector / integer element types, respectively) - what the alignment requirements of the parameter are when passed in GPRs/stack slots (8 for float / 16 for vector / the element type size for integer element types) -- this corresponds to the "byval align" field Using the infrastructure provided by this patch, a companion patch to clang will enable two features: - In the ELFv2 ABI, pass (and return) "homogeneous" floating-point or vector aggregates in FPRs and VRs (this is similar to the ARM homogeneous aggregate ABI) - As an optimization for both ELFv1 and ELFv2 ABIs, pass aggregates that fit fully in registers without using the "byval" mechanism The patch uses the functionArgumentNeedsConsecutiveRegisters callback to encode that special treatment is required for all directly-passed array types. The isInConsecutiveRegs / isInConsecutiveRegsLast bits set as a results are then used to implement the required size and alignment rules in CalculateStackSlotSize / CalculateStackSlotAlignment etc. As a related change, the ABI routines have to be modified to support passing floating-point types in GPRs. This is necessary because with homogeneous aggregates of 4-byte float type we can now run out of FPRs *before* we run out of the 64-byte argument save area that is shadowed by GPRs. Any extra floating-point arguments that no longer fit in FPRs must now be passed in GPRs until we run out of those too. Note that there was already code to pass floating-point arguments in GPRs used with vararg parameters, which was done by writing the argument out to the argument save area first and then reloading into GPRs. The patch re-implements this, however, in favor of code packing float arguments directly via extension/truncation, BITCAST, and BUILD_PAIR operations. This is required to support the ELFv2 ABI, since we cannot unconditionally write to the argument save area (which the caller might not have allocated). The change does, however, affect ELFv1 varags routines too; but even here the overall effect should be advantageous: Instead of loading the argument into the FPR, then storing the argument to the stack slot, and finally reloading the argument from the stack slot into a GPR, the new code now just loads the argument into the FPR, and subsequently loads the argument into the GPR (via BITCAST). That BITCAST might imply a save/reload from a stack temporary (in which case we're no worse than before); but it might be implemented more efficiently in some cases. The final part of the patch enables up to 8 FPRs and VRs for argument return in PPCCallingConv.td; this is required to support returning ELFv2 homogeneous aggregates. (Note that this doesn't affect other ABIs since LLVM wil only look for which register to use if the parameter is marked as "direct" return anyway.) Reviewed by Hal Finkel. llvm-svn: 213493
* [PowerPC] ELFv2 explicit CFI for CR fieldsUlrich Weigand2014-07-212-1/+37
| | | | | | | | | | | | | | | | | | | | This is a minor improvement in the ELFv2 ABI. In ELFv1, DWARF CFI would represent a saved CR word (holding CR fields CR2, CR3, and CR4) using just a single CFI record refering to CR2. In ELFv2 instead, each of the CR fields is represented by its own CFI record. The advantage is that the compiler can now chose to save just a single (or two) CR fields instead of all of them, if those are the only ones that actually need saving. That can lead to more efficient code using mf(o)crf instead of the (slow) mfcr instruction. Note that this patch does not (yet) implement this more efficient code generation, but it does implement the part that is required to be ABI compliant: creating multiple CFI records if multiple CR fields are saved. Reviewed by Hal Finkel. llvm-svn: 213492
* [PowerPC] ELFv2 dynamic loader supportUlrich Weigand2014-07-205-20/+75
| | | | | | | | | | | | | | | | | | | | | This patch enables the new ELFv2 ABI in the runtime dynamic loader. The loader has to implement the following features: - In the ELFv2 ABI, do not look up a function descriptor in .opd, but instead use the local entry point when resolving a direct call. - Update the TOC restore code to use the new TOC slot linkage area offset. - Create PLT stubs appropriate for the ELFv2 ABI. Note that this patch also adds common-code changes. These are necessary because the loader must check the newly added ELF flags: the e_flags header bits encoding the ABI version, and the st_other symbol table entry bits encoding the local entry point offset. There is currently no way to access these, so I've added ObjectFile::getPlatformFlags and SymbolRef::getOther accessors. Reviewed by Hal Finkel. llvm-svn: 213491
* [PowerPC] ELFv2 stack space reductionUlrich Weigand2014-07-206-27/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ELFv2 ABI reduces the amount of stack required to implement an ABI-compliant function call in two ways: * the "linkage area" is reduced from 48 bytes to 32 bytes by eliminating two unused doublewords * the 64-byte "parameter save area" is now optional and need not be present in certain cases (it remains mandatory in functions with variable arguments, and functions that have any parameter that is passed on the stack) The following patch implements this required changes: - reducing the linkage area, and associated relocation of the TOC save slot, in getLinkageSize / getTOCSaveOffset (this requires updating all callers of these routines to pass in the isELFv2ABI flag). - (partially) handling the case where the parameter save are is optional This latter part requires some extra explanation: Currently, we still always allocate the parameter save area when *calling* a function. That is certainly always compliant with the ABI, but may cause code to allocate stack unnecessarily. This can be addressed by a follow-on optimization patch. On the *callee* side, in LowerFormalArguments, we *must* track correctly whether the ABI guarantees that the caller has allocated the parameter save area for our use, and the patch does so. However, there is one complication: the code that handles incoming "byval" arguments will currently *always* write to the parameter save area, because it has to force incoming register arguments to the stack since it must return an *address* to implement the byval semantics. To fix this, the patch changes the LowerFormalArguments code to write arguments to a freshly allocated stack slot on the function's own stack frame instead of the argument save area in those cases where that area is not present. Reviewed by Hal Finkel. llvm-svn: 213490
* [PowerPC] ELFv2 function call changesUlrich Weigand2014-07-206-3/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch builds upon the two preceding MC changes to implement the basic ELFv2 function call convention. In the ELFv1 ABI, a "function descriptor" was associated with every function, pointing to both the entry address and the related TOC base (and a static chain pointer for nested functions). Function pointers would actually refer to that descriptor, and the indirect call sequence needed to load up both entry address and TOC base. In the ELFv2 ABI, there are no more function descriptors, and function pointers simply refer to the (global) entry point of the function code. Indirect function calls simply branch to that address, after loading it up into r12 (as required by the ABI rules for a global entry point). Direct function calls continue to just do a "bl" to the target symbol; this will be resolved by the linker to the local entry point of the target function if it is local, and to a PLT stub if it is global. That PLT stub would then load the (global) entry point address of the final target into r12 and branch to it. Note that when performing a local function call, r2 must be set up to point to the current TOC base: if the target ends up local, the ABI requires that its local entry point is called with r2 set up; if the target ends up global, the PLT stub requires that r2 is set up. This patch implements all LLVM changes to implement that scheme: - No longer create a function descriptor when emitting a function definition (in EmitFunctionEntryLabel) - Emit two entry points *if* the function needs the TOC base (r2) anywhere (this is done EmitFunctionBodyStart; note that this cannot be done in EmitFunctionBodyStart because the global entry point prologue code must be *part* of the function as covered by debug info). - In order to make use tracking of r2 (as needed above) work correctly, mark direct function calls as implicitly using r2. - Implement the ELFv2 indirect function call sequence (no function descriptors; load target address into r12). - When creating an ELFv2 object file, emit the .abiversion 2 directive to tell the linker to create the appropriate version of PLT stubs. Reviewed by Hal Finkel. llvm-svn: 213489
OpenPOWER on IntegriCloud